LTC3601 1.5A, 15V Monolithic Synchronous Step-Down Regulator DESCRIPTION FEATURES n n n n n n n n n n n n n n 4V to 15V Operating Input Voltage Range 1.5A Output Current Up to 96% Efficiency Very Low Duty Cycle Operation: 5% at 2.25MHz Adjustable Switching Frequency: 800kHz to 4MHz External Frequency Synchronization Current Mode Operation for Excellent Line and Load Transient Response User Selectable Burst Mode® (No Load IQ = 300μA) or Forced Continuous Operation 0.6V Reference Allows Low Output Voltages Short-Circuit Protected Output Voltage Tracking Capability Programmable Soft-Start Power Good Status Output Available in Small, Thermally Enhanced, 16-Pin QFN (3mm × 3mm) and MSOP Packages APPLICATIONS n n n Distributed Power Systems Lithium-Ion Battery-Powered Instruments Point-of-Load Power Supply L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611. The LTC®3601 is a high efficiency, monolithic synchronous buck regulator using a phase-lockable controlled on-time, current mode architecture capable of supplying up to 1.5A of output current. The operating supply voltage range is from 4V to 15V, making it suitable for a wide range of power supply applications. The operating frequency is programmable from 800kHz to 4MHz with an external resistor enabling the use of small surface mount inductors. For switching noise sensitive applications, the LTC3601 can be externally synchronized over the same frequency range. An internal phase-locked loop aligns the on-time of the top power MOSFET to the internal or external clock. This unique constant frequency/ controlled on-time architecture is ideal for high step-down ratio applications that demand high switching frequencies and fast transient response. The LTC3601 offers two operational modes: Burst Mode operation and forced continuous mode to allow the user to optimize output voltage ripple, noise, and light load efficiency for a given application. Maximum light load efficiency is achieved with the selection of Burst Mode operation while forced continuous mode provides minimum output ripple and constant frequency operation. TYPICAL APPLICATION Efficiency and Power Loss vs Load Current 100 1000 90 0.1μF 2.2μH PGOOD TRACK SW VON LTC3601 2.2μF 80 BOOST INTVCC FB ITH RT MODE/SYNC SGND PGND 180k 40k 10pF VOUT 3.3V 1.5A 22μF EFFICIENCY (%) 22μF VIN RUN 70 100 60 50 40 10 30 POWER LOSS (mW) VIN 4V TO 15V 20 3601 TA01a VIN = 5V VIN = 12V 10 0 0.001 0.01 0.1 1 LOAD CURRENT (A) 1 10 3601 TA01b 3601f 1 LTC3601 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN ............................................................. –0.3V to 16V VIN Transient Voltage .................................................18V BOOST .................................................... –0.3V to 18.6V BOOST-SW ................................................ –0.3V to 3.6V INTVCC ...................................................... –0.3V to 3.6V ITH, RT ....................................... –0.3V to INTVCC + 0.3V MODE/SYNC, FB ........................ –0.3V to INTVCC + 0.3V TRACK ....................................... –0.3V to INTVCC + 0.3V PGOOD, VON .............................................. –0.3V to 16V SW, RUN .......................................... –0.3V to VIN + 0.3V SW Source Current (DC) .............................................2A Peak SW Source Current..........................................3.5A Operating Junction Temperature Range (Notes 2, 3) ........................................... –40°C to 125°C Storage Temperature Range................... –65°C to 125°C Lead Temperature (Soldering, 10 sec) MSOP ............................................................... 300°C RUN VIN VIN TOP VIEW TRACK PIN CONFIGURATION TOP VIEW 16 15 14 13 MODE/SYNC 1 12 ITH PGOOD 2 11 FB 17 SW 3 10 RT SW 4 9 SGND 8 1 2 3 4 5 6 7 8 17 16 15 14 13 12 11 10 9 PGOOD MODE/SYNC VIN VIN RUN TRACK ITH FB MSE PACKAGE 16-LEAD PLASTIC MSOP VON 7 INTVCC NC 6 BOOST 5 SW SW PGND PGND BOOST INTVCC VON RT TJMAX = 125°C, θJA = 38°C/W EXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCB UD PACKAGE 16-LEAD (3mm s 3mm) PLASTIC QFN TJMAX = 125°C, θJA = 45°C/W EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3601EUD#PBF LTC3601EUD#TRPBF LFJC 16-Lead (3mm × 3mm) Plastic QFN –40°C to 85°C LTC3601IUD#PBF LTC3601IUD#TRPBF LFJC 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C LTC3601EMSE#PBF LTC3601EMSE#TRPBF 3601 16-Lead Plastic MSOP –40°C to 85°C LTC3601IMSE#PBF LTC3601IMSE#TRPBF 3601 16-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3601f 2 LTC3601 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VVIN = 12V, unless otherwise specified. SYMBOL V VIN IQ PARAMETER Input Supply Range Input DC Supply Current Forced Continuous Operation Sleep Current Shutdown Feedback Reference Voltage VFB ΔVLINEREG Reference Voltage Line Regulation ΔVLOADREG Output Voltage Load Regulation Feedback Pin Input Current IFB Error Amplifier Transconductance gm(EA) Minimum On-Time tON(MIN) Minimum Off-Time tOFF(MIN) Valley Switch Current Limit ILIM Oscillator Frequency fOSC RDS(ON) V VIN-OV Top Switch On-Resistance Bottom Switch On-Resistance VIN Overvoltage Lockout Threshold VRUN INTVCC Voltage INTVCC Load Regulation (Note 4) INTVCC Undervoltage Lockout Threshold RUN Threshold IRUN(LKG) VFB_GB RUN Leakage Current PGOOD Good-to-Bad Threshold VFB_BG PGOOD Bad-to-Good Threshold tPGOOD RPGOOD ISW(LKG) tSS VFB_TRACK ITRACK VMODE/ Power Good Filter Time PGOOD Pull-Down Resistance Switch Leakage Current Internal Soft-Start Time TRACK Pin TRACK Pull-Up Current MODE Threshold Voltage VINTVCC ΔINTVCC VUVLO SYNC IMODE SYNC Threshold Voltage MODE Input Current CONDITIONS l MIN 4 MODE = 0V MODE = INTVCC, VFB > 0.6V RUN = 0V l 0.594 V VIN = 4V to 15V ITH = 0.6V to 1.6V V FB = 0.6V ITH = 1.2V VON = 1V, VIN = 4V VIN = 6V 1.7 1.4 1.7 3.4 VIN Rising VIN Falling 4V < VIN < 15V IINTVCC = 0mA to 20mA INTVCC Rising, VIN = INTVCC INTVCC Falling, VIN = INTVCC RUN Rising RUN Falling V VIN = 15V FB Rising FB Falling FB Rising FB Falling l l l l 16.8 15.8 3.15 1.21 0.97 –3 3 20 10mA Load VRUN = 0V VFB from 10% to 90% Full Scale TRACK = 0.3V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. MAX 15 UNITS V 700 300 14 0.600 0.01 0.1 1000 500 25 0.606 μA μA μA V %/V % nA mS ns ns A MHz MHz MHz mΩ mΩ V V V % V V V V μA % % % % μs Ω μA μs mV μA V V V μA μA ±30 VRT = INTVCC RRT = 160k RRT = 80k MODE VIH MODE VIL SYNC VIH MODE = 0V MODE = INTVCC TYP 0.28 l l 1.0 l 0.95 2.0 20 40 2.2 2 2 4 130 100 17.5 16.5 3.3 0.6 2.75 2.45 1.25 1.0 0 8 –8 –5 5 40 15 0.01 400 0.3 1.4 60 2.8 2.6 2.3 4.6 18 17 3.45 2.9 1.29 1.03 ±3 10 –10 1 700 0.315 0.4 –1.5 1.5 Note 2: The LTC3601E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. The LTC3601I is guaranteed over the –40°C to 125°C operating junction temperature range. 3601f 3 LTC3601 ELECTRICAL CHARACTERISTICS Note 3: TJ is calculated from the ambient temperature, TA, and power dissipation, PD, according to the following formula: TJ = TA + (PD • θJA) where θJA = 45°C/W for the QFN package and θJA = 38°C/W for the MSOP package. Note 4: Maximum allowed current draw when used as a regulated output is 5mA. This supply is only intended to provide additional DC load current as needed and not intended to regulate large transient or ac behavior as these waveforms may impact LTC3601 operation. TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VIN = 12V, fO = 1MHz, L = 2.2μH unless otherwise noted. Efficiency vs Load Current Burst Mode Operation 100 100 VOUT = 1.8V 90 Efficiency vs Load Current 100 VOUT = 1.8V 80 70 70 50 40 30 EFFICIENCY (%) 80 70 60 60 50 40 0.01 0.1 1 LOAD CURRENT (A) 0 0.001 0.01 0.1 1 LOAD CURRENT (A) ILOAD = 100mA ILOAD = 500mA 90 EFFICIENCY (%) EFFICIENCY (%) 92 ILOAD = 1.5A 80 ILOAD = 10mA 75 12 10 INPUT VOLTAGE (V) 0.605 VOUT =1.8V ILOAD = 500mA 0.603 88 L = 2.2μH 0.601 86 L = 1μH 0.599 84 0.597 82 14 16 3601 G04 10 Reference Voltage vs Temperature 70 65 VOUT = 1.8V FIGURE 7 CIRCUIT 60 6 8 4 0.01 0.1 1 LOAD CURRENT (A) 3601 G03 Efficiency vs Frequency Forced Continuous Mode 100 85 0 0.001 3601 G02 Efficiency vs Input Voltage Burst Mode Operation 90 VOUT = 3.3V VOUT = 5V 10 10 3601 G01 95 40 20 VIN = 4V VIN = 8V VIN = 12V 10 10 50 VREF (V) 0 0.001 20 VIN = 4V VIN = 8V VIN = 12V 10 FORCED CONTINUOUS 60 30 30 20 BURST 90 80 EFFICIENCY (%) EFFICIENCY (%) 90 Efficiency vs Load Current Forced Continuous Mode 80 0.5 1.0 1.5 2.0 FREQUENCY (MHz) 2.5 3.0 3601 G05 0.595 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 3601 G06 3601f 4 LTC3601 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VIN = 12V, fO = 1MHz, L = 2.2μH unless otherwise noted. RDS(ON) vs Temperature 200 6000 380 VDS = 12V SWITCH LEAKAGE (nA) TOP SWITCH RDS(ON) 120 BOTTOM SWITCH RDS(ON) 80 40 QUIESCENT CURRENT (μA) 5000 160 RDS(ON) (mΩ) Quiescent Current vs Supply Voltage Switch Leakage vs Temperature 4000 3000 2000 TOP SWITCH 340 300 260 1000 BOTTOM SWITCH 0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 0 –50 125 220 –25 50 25 75 0 TEMPERATURE (°C) 100 3601 G07 2.75 2.0 1.5 1.8 ITRACK (μA) FREQUENCY (MHz) 1.6 2.25 2.00 1.75 1.50 –2.0 –50 –25 75 50 25 TEMPERATURE (°C) 0 100 1.25 –50 –25 125 50 25 75 0 TEMPERATURE (°C) 100 50 25 75 0 TEMPERATURE (°C) 100 125 3601 G23 Load Regulation 3.5 1.2 3.0 1.0 2.5 0.8 ΔVOUT/VOUT (%) ILIM (A) 0.6 –50 –25 125 3601 G22 Bottom Switch Current Limit vs Temperature 2.0 1.5 0.4 0.2 0.5 0 100 125 3601 G11 Burst Mode OPERATION FORCED CONTINUOUS 0.6 1.0 50 25 75 0 TEMPERATURE (°C) 1.2 0.8 3601 G10 0 –50 –25 1.4 1.0 –1.0 –1.5 16 2.0 RT = INTVCC 2.50 –0.5 14 TRACK Pull-Up Current vs Temperature 1.0 0 8 10 12 SUPPLY VOLTAGE (V) 3601 G09 Oscillator Internal Set Frequency vs Temperature 0.5 6 3601 G08 Oscillator Frequency vs Temperature FREQUENCY VARIATION (%) 4 125 –0.2 0 250 500 750 1000 ILOAD (mA) 1250 1500 3601 G21 3601f 5 LTC3601 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VIN = 12V, fO = 1MHz, L = 2.2μH unless otherwise noted. Output Voltage vs Time Burst Mode Operation Output Voltage vs Time Forced Continuous Mode Output Tracking VOUT SW 5V/DIV SW 5V/DIV TRACK VOUT 20mV/DIV AC COUPLED VOUT 20mV/DIV AC COUPLED IL 1A/DIV VFB IL 1A/DIV VIN = 12V VOUT = 1.8V ILOAD = 100mA 3601 G12 2μs/DIV VIN = 12V VOUT = 1.8V ILOAD = 100mA Start-Up from Shutdown Burst Mode Operation VOUT 2V/DIV IL 1A/DIV 200μs/DIV 3601 G15 VOUT 100mV AC COUPLED VOUT 1V/DIV IL 1A/DIV IL 1A/DIV ILOAD 1A/DIV VIN = 12V VOUT = 1.8V ILOAD = 1.5A 200μs/DIV 3601 G16 10μs/DIV VIN = 12V VOUT = 1.8V ILOAD = 150mA TO 1.5A PGOOD 2V/DIV IL 1A/DIV VOUT 1V/DIV 3601 G18 3601 G17 RUN 10V/DIV PGOOD 5V/DIV VOUT 1V/DIV IL 2A/DIV ILOAD 1A/DIV 3601 G14 Start-Up Into Pre-Biased Output (1V Pre-Bias) Burst Mode Operation Short-Circuit Waveforms Forced Continuous Mode VOUT 100mV AC COUPLED 2ms/DIV Load Step Burst Mode Operation RUN 2V/DIV Load Step Forced Continuous Mode 10μs/DIV VIN = 12V VOUT = 1.8V ILOAD = 150mA TO 1.5A VIN = 12V VOUT = 1.8V RLOAD = 36Ω Start-Up from Shutdown Forced Continuous Mode RUN 2V/DIV PGOOD 5V/DIV VIN = 12V VOUT = 1.8V ILOAD = 20mA 3601 G13 2μs/DIV IL 1A/DIV VIN = 12V VOUT = 1.8V 100μs/DIV 3601 G19 VIN = 12V VOUT = 1.8V ILOAD = 5mA 1ms/DIV 3601 G20 3601f 6 LTC3601 PIN FUNCTIONS (QFN/MSE) MODE/SYNC (Pin 1/Pin 15): Mode Selection and External Synchronization Input Pin. This pin places the LTC3601 into forced continuous operation when tied to ground. High efficiency Burst Mode operation is enabled by either floating this pin or by tying this pin to INTVCC. When driven with an external clock, an internal phase-locked loop will synchronize the phase and frequency of the internal oscillator to that of the incoming clock signal. During external clock synchronization, the LTC3601 will default to forced continuous operation. PGOOD (Pin 2/Pin 16): Open-Drain Power Good Output Pin. PGOOD is pulled to ground when the voltage at the FB pin is not within 8% (typical) of the internal 0.6V reference. PGOOD becomes high impedance once the voltage at the FB pin returns to within ±5% (typical) of the internal reference. SW (Pins 3, 4/Pins 1, 2): Switch Node Output Pin. Connect this pin to the SW side of the external inductor. The normal operation voltage swing of this pin ranges from ground to PVIN. BOOST (Pin 6/Pin 5): Boosted Floating Driver Supply Pin. The (+) terminal of the external bootstrap capacitor connects to this pin while the (–) terminal connects to the SW pin. The normal operation voltage swing of this pin ranges from a diode voltage drop below INTVCC up to PVIN + INTVCC. INTVCC (Pin 7/Pin 6): Internal 3.3V Regulator Output Pin. This pin should be decoupled to PGND with a low ESR ceramic capacitor of 1μF or more. VON (Pin 8/Pin 7): On-Time Voltage Input Pin. This pin sets the voltage trip point for the on-time comparator. Connect this pin to the regulated output to make the on-time proportional to the output voltage. The pin impedance is normally 180kΩ. SGND (Pin 9/Pin 17): Signal Ground Pin. This pin should have a low noise connection to reference ground. The feedback resistor network, external compensation network and RT resistor should be connected to this ground. In the MSE package, this pin must be soldered to the PCB to provide a good thermal contact to the PCB. RT (Pin 10/Pin 8): Oscillator Frequency Program Pin. Connect an external resistor, between 80k to 400k, from this pin to SGND to program the LTC3601 switching frequency from 800kHz to 4MHz. When RT is tied to INTVCC, the switching frequency will default to 2MHz. FB (Pin 11/Pin 9): Output Voltage Feedback Pin. Input to the error amplifier that compares the feedback voltage to the internal 0.6V reference voltage. Connect this pin to the appropriate resistor divider network to program the desired output voltage. ITH (Pin 12/Pin 10): Error Amplifier Output and Switching Regulator Compensation Pin. Connect this pin to appropriate external components to compensate the regulator loop frequency response. Connect this pin to INTVCC to use the default internal compensation. TRACK/SS (Pin 13/Pin 11): Output Voltage Tracking and Soft-Start Input Pin. Forcing a voltage below 0.6V on this pin overrides the internal reference input to the error amplifier. The LTC3601 will servo the FB pin to the TRACK voltage under this condition. Above 0.6V, the tracking function stops and the internal reference resumes control of the error amplifier. An internal 1.4μA pull-up current from INTVCC allows a soft-start function to be implemented by connecting an external capacitor between this pin and ground. See Applications Information section for more details. RUN (Pin 14/Pin 12): Regulator Enable Pin. Enables chip operation by applying a voltage above 1.25V. A voltage below 1V on this pin places the part into shutdown. Do not float this pin. VIN (Pins 15, 16/Pins 13, 14): Main Power Supply Input Pins. These pins should be closely decoupled to PGND with a low ESR capacitor of 10μF or more. PGND (Pin 17/Pins 3, 4): Power Ground Pin. The (–) terminal of the input bypass capacitor, CIN, and the (–) terminal of the output capacitor, COUT , should be tied to this pin with a low impedance connection. In the QFN package this pin must be soldered to the PCB to provide low impedance electrical contact to ground and good thermal contact to the PCB. 3601f 7 LTC3601 FUNCTIONAL BLOCK DIAGRAM QFN Package CIN VON VON 0.72V 180k VIN VIN 6V 3.3V REG ION CONTROLLER VIN ION INTVCC V tON = VON IION RT CVCC R S Q BOOST OSC TG RRT ON 15k + + IREV ICMP MODE/SYNC – OSC PLL-SYNC CBOOST M1 SWITCH LOGIC AND ANTISHOOT THROUGH SW L1 COUT SENSE+ – SENSE– RUN BG M2 PGND FOLDBACK DISABLED AT START-UP + INTVCC PGOOD 0.3V FOLDBACK – – Q2 Q4 ITHB 0.648V OV R2 FB + Q6 R1 SGND Q1 – UV + EA – SS + – RUN + 1.4μA – + + 0.48V 0.6V REF INTERNAL SOFT-START 0.552V INTVCC 1.25V ITH RC RUN CC1 TRACK CSS 3605 BD 3601f 8 LTC3601 OPERATION The LTC3601 is a current mode, monolithic, step-down regulator capable of providing up to 1.5A of output current. Its unique controlled on-time architecture allows extremely low step-down ratios while maintaining a constant switching frequency. Part operation is enabled by raising the voltage on the RUN pin above 1.25V nominally. Main Control Loop In normal operation the internal top power MOSFET is turned on for a fixed interval determined by an internal one-shot timer (“ON” signal in the Block Diagram). When the top power MOSFET turns off, the bottom power MOSFET turns on until the current comparator, ICMP , trips, thus restarting the one-shot timer and initiating the next cycle. The inductor current is monitored by sensing the voltage drop across the SW and PGND nodes of the bottom power MOSFET. The voltage at the ITH pin sets the ICMP comparator threshold corresponding to the inductor valley current. The error amplifier EA adjusts this ITH voltage by comparing an internal 0.6V reference to the feedback signal, VFB, derived from the output voltage. If, for example, the load current increases, the feedback voltage will decrease relative to the internal 0.6V reference. The ITH voltage then rises until the average inductor current matches that of the load current. The operating frequency is determined by the value of the RT resistor, which programs the current for the internal oscillator. An internal phase-locked loop servos the switching regulator on-time to track the internal oscillator edge and force a constant switching frequency. A clock signal can be applied to the SYNC/MODE pin to synchronize the switching frequency to an external source. The regulator defaults to forced continuous operation once the clock signal is applied. At low load currents the inductor current can drop to zero or become negative. If the LTC3601 is configured for Burst Mode operation, this inductor current condition is detected by the current reversal comparator, IREV , which in turn shuts off the bottom power MOSFET and places the part into a low quiescent current sleep state resulting in discontinuous operation and increased efficiency at low load currents. Both power MOSFETs will remain off with the part in sleep and the output capacitor supplying the load current until the ITH voltage rises sufficiently to initiate another cycle. Discontinuous operation is disabled by tying the MODE/SYNC pin to ground placing the LTC3601 into forced continuous mode. During forced continuous mode, continuous synchronous operation occurs regardless of the output load current. “Power Good” Status Output The PGOOD open-drain output will be pulled low if the regulator output exits a ±8% window around the regulation point. This condition is released once regulation within a 5% window is achieved. To prevent unwanted PGOOD glitches during transients or dynamic VOUT changes, the LTC3601 PGOOD falling edge includes a filter time of approximately 40μs. VIN Overvoltage Protection In order to protect the internal power MOSFET devices against transient voltage spikes, the LTC3601 constantly monitors the VIN pin for an overvoltage condition. When VIN rises above 17.5V, the regulator suspends operation by shutting off both power MOSFETs. Once VIN drops below 16.5V, the regulator immediately resumes normal operation. The regulator does not execute its soft-start function when exiting an overvoltage condition. Short-Circuit Protection Foldback current limiting is provided in the event the output is inadvertently shorted to ground. During this condition the internal current limit (ILIM) will be lowered to approximately one-third its normal value. This feature reduces the heat dissipation in the LTC3601 during shortcircuit conditions and protects both the IC and the input supply from any potential damage. 3601f 9 LTC3601 APPLICATIONS INFORMATION A general LTC3601 application circuit is shown on the first page of this data sheet. External component selection is largely driven by the load requirement and begins with the selection of the inductor L. Once the inductor is chosen, the input capacitor, CIN, the output capacitor, COUT , the internal regulator capacitor, CINTVCC, and the boost capacitor, CBOOST, can be selected. Next, the feedback resistors are selected to set the desired output voltage. Finally, the remaining optional external components can be selected for functions such as external loop compensation, track/soft-start, externally programmed oscillator frequency and PGOOD. Operating Frequency Selection of the operating frequency is a trade-off between efficiency and component size. High frequency operation allows the use of smaller inductor and capacitor values. Operation at lower frequencies improves efficiency by reducing internal gate charge losses but requires larger inductance values and/or capacitance to maintain low output ripple voltage. The operating frequency, fO, of the LTC3601 is determined by an external resistor that is connected between the RT pin and ground. The value of the resistor sets the ramp current that is used to charge and discharge an internal timing capacitor within the oscillator and can be calculated by using the following equation: 3.2 E11 fO where RRT is in Ω and fO is in Hz. RRT = Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the inductor ripple current. More specifically, the inductor ripple current decreases with higher inductor value or higher operating frequency according to the following equation: V V IL = OUT 1– OUT VIN f • L where ΔIL = inductor ripple current, f = operating frequency and L = inductor value. A trade-off between component size, efficiency and operating frequency can be seen from this equation. Accepting larger values of ΔIL allows the use of lower value inductors but results in greater core loss in the inductor, greater ESR loss in the output capacitor, and larger output ripple. Generally, highest efficiency operation is obtained at low operating frequency with small ripple current. A reasonable starting point for setting the ripple current is about 40% of IOUT(MAX). Note that the largest ripple current occurs at the highest VIN. To guarantee the ripple current does not exceed a specified maximum the inductance should be chosen according to: V V OUT 1– OUT L = f • IL(MAX) VIN(MAX) 6000 5000 FREQUENCY (kHz) Connecting the RT pin to INTVCC will default the converter to fO = 2MHz; however, this switching frequency will be more sensitive to process and temperature variations than when using a resistor on RT (see Typical Performance Characteristics). Once the value for L is known the type of inductor must be selected. Actual core loss is independent of core size for a fixed inductor value but is very dependent on the inductance selected. As the inductance increases, core loss decreases. Unfortunately, increased inductance requires more turns of wire leading to increased copper loss. 4000 3000 2000 1000 0 0 100 200 300 400 RT (kΩ) 500 600 3601 F01 Figure 1. Switching Frequency vs RT Ferrite designs exhibit very low core loss and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core materials saturate “hard,” meaning the inductance collapses abruptly when the peak design current is 3601f 10 LTC3601 APPLICATIONS INFORMATION exceeded. This collapse will result in an abrupt increase in inductor ripple current, so it is important to ensure the core will not saturate. Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price versus size requirements and any radiated field/EMI requirements. New designs for surface mount inductors are available from Toko, Vishay, NEC/Tokin, Cooper, Coilcraft, TDK and Würth Electronik. Table 1 gives a sampling of available surface mount inductors. Table 1. Inductor Selection Table INDUCTANCE DCR (μH) (mΩ) MAX DIMENSIONS CURRENT (mm) (A) Würth Electronik WE-PD2 Typ MS Series 0.56 9.5 6.5 5.2 × 5.8 0.82 14 5.4 1.2 21 4.8 1.7 27 4 2.2 36 3.6 Vishay IHLP-2020BZ-01 Series 0.47 8.8 11.5 5.2 × 5.5 0.68 12.4 10 1 20 7 2.2 50.1 4.2 Toko DE3518C Series 0.56 24 3.3 3.5 × 3.7 1.2 30 2.4 1.7 35 2.1 Sumida CDRH2D18/HP Series 0.56 33 3.7 3.2 × 3.2 0.82 39 2.9 1.1 43 2.5 Cooper SD18 Series 0.47 20.1 3.58 5.5 × 5.5 0.82 24.7 3.24 1.2 29.4 2.97 1.5 34.5 2.73 2.2 39.8 2.55 Coilcraft LPS4018 Series 0.56 30 4.8 4×4 1 40 2.8 2.2 70 2.7 TDK VLS252012 Series 0.47 56 3.3 2.5 × 2 1 88 2.4 1.5 126 2 2.2 155 1.8 HEIGHT (mm) 2 2 1.8 2 1.8 1.7 1.2 CIN and COUT Selection The input capacitance, CIN, is needed to filter the trapezoidal wave current at the drain of the top power MOSFET. To prevent large voltage transients from occurring a low ESR input capacitor sized for the maximum RMS current is recommended. The maximum RMS current is given by: IRMS = IOUT(MAX ) ( VOUT VIN – VOUT ) VIN where IOUT(MAX) equals the maximum average output current. This formula has a maximum at VIN = 2VOUT , where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further de-rate the capacitor or choose a capacitor rated at a higher temperature than required. Several capacitors may be paralleled to meet the requirements of the design. For low input voltage applications sufficient bulk input capacitance is needed to minimize transient effects during output load changes. Even though the LTC3601 design includes an overvoltage protection circuit, care must always be taken to ensure input voltage transients do not pose an overvoltage hazard to the part. The selection of COUT is primarily determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients. The output ripple, ΔVOUT, is determined by: ESR + 1 VOUT < IL 8 • f • COUT The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic, and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer low ESR but have lower capacitance density than other types. Tantalum capacitors have the 3601f 11 LTC3601 APPLICATIONS INFORMATION highest capacitance density, but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long-term reliability. Ceramic capacitors have excellent low ESR characteristics and small footprints. Their relatively low value of bulk capacitance may require multiple capacitors in parallel. Using Ceramic Input and Output Capacitors Higher value, lower cost ceramic capacitors are now available in small case sizes. Their high voltage rating and low ESR make them ideal for switching regulator applications. However, due to the self-resonant and high-Q characteristics of some types of ceramic capacitors, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input, and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the VIN input. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. For a more detailed discussion, refer to Application Note 88. When choosing the input and output ceramic capacitors choose the X5R or X7R dielectric formulations. These dielectrics provide the best temperature and voltage characteristics for a given value and size. INTVCC Regulator Bypass Capacitor An internal low dropout (LDO) regulator produces a 3.3V supply voltage used to power much of the internal LTC3601 circuitry including the power MOSFET gate drivers. The INTVCC pin connects to the output of this regulator and must have a minimum of 1μF of decoupling capacitance to ground. The decoupling capacitor should have low impedance electrical connections to the INTVCC and PGND pins to provide the transient currents required by the LTC3601. The user may connect a maximum load current of 5mA to this pin but must take into account the increased power dissipation and die temperature that results. Furthermore, this supply is intended only to supply additional DC load currents as desired and not intended to regulate large transient or AC behavior this may impact LTC3601 operation. Boost Capacitor The boost capacitor, CBOOST , is used to create a voltage rail above the applied input voltage VIN. Specifically, the boost capacitor is charged to a voltage equal to approximately INTVCC each time the bottom power MOSFET is turned on. The charge on this capacitor is then used to supply the required transient current during the remainder of the switching cycle. When the top MOSFET is turned on, the BOOST pin voltage will be equal to approximately VIN + 3.3V. For most applications a 0.1μF ceramic capacitor will provide adequate performance. Output Voltage Programming The LTC3601 will adjust the output voltage such that VFB equals the reference voltage of 0.6V according to: R1 VOUT = 0.6V 1+ R2 The desired output voltage is set by appropriate selection of resistors R1 and R2 as shown in Figure 2. Choosing large values for R1 and R2 will result in improved efficiency but may lead to undesirable noise coupling or phase margin reduction due to stray capacitances at the FB node. Care should be taken to route the FB line away from any noise source, such as the SW line. To improve the frequency response of the main control loop a feedforward capacitor, CF , may be used as shown in Figure 2. VOUT R1 CF FB LTC3601 R2 SGND 3601 F02 Figure 2. Optional Feedforward Capacitor 3601f 12 LTC3601 APPLICATIONS INFORMATION Minimum Off-Time/On-Time Considerations The minimum off-time is the smallest amount of time that the LTC3601 can turn on the bottom power MOSFET, trip the current comparator and turn the power MOSFET back off. This time is typically 40ns. For the controlled on-time current mode control architecture, the minimum off-time limit imposes a maximum duty cycle of: ( DC(MAX ) = 1 – f • tOFF(MIN) ) where f is the switching frequency and tOFF(MIN) is the minimum off-time. If the maximum duty cycle is surpassed, due to a dropping input voltage for example, the output will drop out of regulation. The minimum input voltage to avoid this dropout condition is: VIN(MIN) = VOUT ( 1 − f • tOFF(MIN) ) Conversely, the minimum on-time is the smallest duration of time in which the top power MOSFET can be in its “on” state. This time is typically 20ns. In continuous mode operation, the minimum on-time limit imposes a minimum duty cycle of: ( DC(MIN) = f • tON(MIN) ) where tON(MIN) is the minimum on-time. As the equation shows, reducing the operating frequency will alleviate the minimum duty cycle constraint. In the rare cases where the minimum duty cycle is surpassed, the output voltage will still remain in regulation, but the switching frequency will decrease from its programmed value. This is an acceptable result in many applications, so this constraint may not be of critical importance in most cases, and high switching frequencies may be used in the design without any fear of severe consequences. As the sections on Inductor and Capacitor Selection show, high switching frequencies allow the use of smaller board components, thus reducing the footprint of the application circuit. Internal/External Loop Compensation The LTC3601 provides the option to use a fixed internal loop compensation network to reduce both the required external component count and design time. The internal loop compensation network can be selected by connecting the ITH pin to the INTVCC pin. To ensure stability, it is recommended that the output capacitance be at least 47μF when using internal compensation. Alternatively, the user may choose specific external loop compensation components to optimize the main control loop transient response as desired. External loop compensation is chosen by simply connecting the desired network to the ITH pin. Suggested compensation component values are shown in Figure 3. For a 2MHz application, an R-C network of 220pF and 13kΩ provides a good starting point. The bandwidth of the loop increases with decreasing C. If R is increased by the same factor that C is decreased, the zero frequency will be kept the same, thereby keeping the phase the same in the most critical frequency range of the feedback loop. A 10pF bypass capacitor on the ITH pin is recommended for the purposes of filtering out high frequency coupling from stray board capacitance. In addition, a feedforward capacitor CF can be added to improve the high frequency response, as previously shown in Figure 2. Capacitor CF provides phase lead by creating a high frequency zero with R1 which improves the phase margin. ITH LTC3601 RCOMP 13k CCOMP 220pF CBYP SGND 3601 F03 Figure 3. Compensation Components 3601f 13 LTC3601 APPLICATIONS INFORMATION Checking Transient Response The regulator loop response can be checked by observing the response of the system to a load step. When configured for external compensation, the availability of the ITH pin not only allows optimization of the control loop behavior but also provides a DC coupled and AC filtered closed-loop response test point. The DC step, rise time, and settling behavior at this test point reflect the system’s closed-loop response. Assuming a predominantly second order system, the phase margin and/or damping factor can be estimated by observing the percentage of overshoot seen at this pin. The ITH external components shown in Figure 3 will provide an adequate starting point for most applications. The series R-C filter sets the pole-zero loop compensation. The values can be modified slightly, from approximately 0.5 to 2 times their suggested values, to optimize transient response once the final PC layout is done and the particular output capacitor type and value have been determined. The output capacitors need to be selected because their various types and values determine the loop feedback factor gain and phase. An output current pulse of 20% to 100% of full load current with a rise time of 1μs to 10μs will produce output voltage and ITH pin waveforms that will give a sense of the overall loop stability without breaking the feedback loop When observing the response of VOUT to a load step, the initial output voltage step may not be within the bandwidth of the feedback loop. As a result, the standard second order overshoot/DC ratio cannot be used to estimate phase margin. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Linear Technology Application Note 76. As shown in Figure 2 a feedforward capacitor, CF , may be added across feedback resistor R1 to improve the high frequency response of the system. Capacitor CF provides phase lead by creating a high frequency zero with R1. In some applications severe transients can be caused by switching in loads with large (>10μF) input capacitors. The discharged input capacitors are effectively put in parallel with COUT , causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this output droop if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot Swap™ controller is designed specifically for this purpose and usually incorporates current limit, short-circuit protection and soft-start functions. MODE/SYNC Operation The MODE/SYNC pin is a multipurpose pin allowing both mode selection and operating frequency synchronization. Connecting this pin to INTVCC enables Burst Mode operation for superior efficiency at low load currents at the expense of slightly higher output voltage ripple. When the MODE/SYNC pin is pulled to ground, forced continuous mode operation is selected creating the lowest fixed output ripple at the expense of light load efficiency. The LTC3601 will detect the presence of the external clock signal on the MODE/SYNC pin and synchronize the internal oscillator to the phase and frequency of the incoming clock. The presence of an external clock will place the LTC3601 into forced continuous mode operation. Output Voltage Tracking and Soft-Start The LTC3601 allows the user to control the output voltage ramp rate by means of the TRACK pin. From 0V to 0.6V the TRACK pin will override the internal reference input to the error amplifier forcing regulation of the feedback voltage to that seen at the TRACK pin. When the voltage at the TRACK pin rises above 0.6V, tracking is disabled and the feedback voltage will be regulated to the internal reference voltage. The voltage at the TRACK pin may be driven from an external source, or alternatively, the user may leverage the internal 1.4μA pull-up current on TRACK to implement Hot Swap is a trademark of Linear Technology Corporation. 3601f 14 LTC3601 APPLICATIONS INFORMATION a soft-start function by connecting a capacitor from the TRACK pin to ground. The relationship between output rise time and TRACK capacitance is given by: tSS = 430,000 × CTRACK/SS A default internal soft-start timer forces a minimum softstart time of 400μs by overriding the TRACK pin input during this time period. Hence, capacitance values less than approximately 1000pF will not significantly affect soft-start behavior. When using the TRACK pin, the regulator defaults to Burst Mode operation until the output exceeds 80% of its final value (VFB > 0.48V). Once the output reaches this voltage, the operating mode of the regulator switches to the mode selected by the MODE/SYNC pin as described above. During normal operation, if the output drops below 10% of its final value (as it may when tracking down, for instance), the regulator will automatically switch to Burst Mode operation to prevent inductor saturation and improve TRACK pin accuracy. Output Power Good The PGOOD output of the LTC3601 is driven by a 15Ω (typical) open-drain pull-down device. This device will be turned off once the output voltage is within 5% (typical) of the target regulation point allowing the voltage at PGOOD to rise via an external pull-up resistor (100k typical). If the output voltage exits a 8% (typical) regulation window around the target regulation point the open-drain output will pull down with 15Ω output resistance to ground, thus dropping the PGOOD pin voltage. A filter time of 40μs (typical) acts to prevent unwanted PGOOD output changes during VOUT transient events. As a result, the output voltage must be within the target regulation window of 5% for 40μs before the PGOOD pin is pulled high. Conversely, the output voltage must exit the 8% regulation window for 40μs before the PGOOD pin pulls to ground (see Figure 4). NOMINAL OUTPUT PGOOD VOLTAGE VOUT 3601 F04 –8% –5% 0% 5% 8% Figure 4. PGOOD Pin Behavior Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: % Efficiency = 100% – (L1 + L2 + L3 +…) where L1, L2, etc. are the individual loss terms as a percentage of input power. Although all dissipative elements in the circuit produce losses, three main sources account for the majority of the losses in the LTC3601: 1) I2R loss, 2) switching losses and quiescent current loss, 3) transition losses and other system losses. 1. I2R loss is calculated from the DC resistances of the internal switches, RSW , and external inductor, RL. In continuous mode, the average output current will flow through inductor L but is “chopped” between the internal top and bottom power MOSFETs. Thus, the series resistance looking into the SW pin is a function of both the top and bottom MOSFET’s RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) 3601f 15 LTC3601 APPLICATIONS INFORMATION The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus to obtain I2R loss: Thermal Considerations Each time a power MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of INTVCC that is typically much larger than the DC control bias current. In continuous mode, IGATECHG = f(QT + QB), where QT and QB are the gate charges of the internal top and bottom power MOSFETs and f is the switching frequency. For estimation purposes, (QT + QB) on the LTC3601 is approximately 1nC. The LTC3601 requires the exposed package backplane metal (PGND pin on the QFN, SGND pin on the MSOP package) to be well soldered to the PC board to provide good thermal contact. This gives the QFN and MSOP packages exceptional thermal properties, compared to other packages of similar size, making it difficult in normal operation to exceed the maximum junction temperature of the part. In many applications, the LTC3601 does not dissipate much heat due to its high efficiency and low thermal resistance package backplane. However, in applications in which the LTC3601 is running at a high ambient temperature, high input voltage, high switching frequency, and maximum output current, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150°C, both power switches will be turned off until temperature decreases approximately 10°C. To calculate the total power loss from the LDO load, simply add the gate charge current and quiescent current and multiply by VIN: Thermal analysis should always be performed by the user to ensure the LTC3601 does not exceed the maximum junction temperature. “I2R LOSS” = IOUT2 · (RSW + RL) 2. The internal LDO supplies the power to the INTVCC rail. The total power loss here is the sum of the switching losses and quiescent current losses from the control circuitry. PLDO = (IGATECHG + IQ) • VIN 3. Other “hidden” losses such as transition loss, copper trace resistances, and internal load currents can account for additional efficiency degradations in the overall power system. Transition loss arises from the brief amount of time the top power MOSFET spends in the saturated region during switch node transitions. The LTC3601 internal power devices switch quickly enough that these losses are not significant compared to other sources. Other losses, including diode conduction losses during dead time and inductor core losses, generally account for less than 2% total additional loss. The temperature rise is given by: TRISE = PDθJA where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. Consider the example in which an LTC3601EUD is operating with IOUT = 1.5A, VIN = 12V, f = 4MHz, VOUT = 1.8V, and an ambient temperature of 70°C. From the Typical Performance Characteristics section the RDS(ON) of the top switch is found to be nominally 130mΩ while that of the bottom switch is nominally 100mΩ yielding an equivalent power MOSFET resistance RSW of: RDS(ON)TOP • 1.8/12 + RDS(ON)BOT • 10.2/12 = 105mΩ. 3601f 16 LTC3601 APPLICATIONS INFORMATION From the previous section, IGATECHG is ~4mA when f = 4MHz, and the spec table lists the typical IQ to be 1mA. Therefore, the total power dissipation due to resistive losses and LDO losses is: PD = IOUT2 • RSW + VIN • (IGATECHG + IQ) PD = (1.5)2 • (0.105) + 12V • 5mA = 296mW The QFN 3mm × 3mm package junction-to-ambient thermal resistance, θJA, is around 45°C/W. Therefore, the junction temperature of the regulator operating in a 70°C ambient temperature is approximately: TJ = 0.296 • 45 + 70 = 83.3°C which is well below the specified maximum junction temperature of 125°C. Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3601. 1. Do the capacitors CIN connect to VIN and PGND as close to the pins as possible? These capacitors provide the AC current to the internal power MOSFETs and drivers. The (–) plate of CIN should be closely connected to PGND and the (–) plate of COUT. 2. The output capacitor, COUT , and inductor L1 should be closely connected to minimize loss. The (–) plate of COUT should be closely connected to PGND and the (–) plate of CIN. 3. The resistive divider, R1 and R2, must be connected between the (+) plate of COUT and a ground line terminated near SGND. The feedback signal, VFB, should be routed away from noisy components and traces such as the SW line, and its trace length should be minimized. In addition, RT and the loop compensation components should be terminated to SGND. 4. Keep sensitive components away from the SW pin. The RRT resistor, the feedback resistors, the compensation components, and the INTVCC bypass capacitor should all be routed away from the SW trace and the inductor. 5. A ground plane is preferred, but if not available the signal and power grounds should be segregated with both connecting to a common, low noise reference point. The point at which the ground terminals of the VIN and VOUT bypass capacitors are connected makes a good, low noise reference point. The connection to the PGND pin should be made with a minimal resistance trace from the reference point. 6. Flood all unused areas on all layers with copper in order to reduce the temperature rise of power components. These copper areas should be connected to the exposed backside connection of the IC. 3601f 17 LTC3601 APPLICATIONS INFORMATION VIN CIN VIAS TO PGND VIAS TO GROUND PLANE PGND 16 15 14 13 1 12 2 11 17 3 SW R2 9 5 L1 CFWD 10 4 VIAS TO GROUND PLANE CBOOST 6 VIAS TO INTVCC 7 R1 8 VIA TO VOUT VIA TO PGND CINTVCC COUT VIAS TO PGND VIA TO R2 VOUT 3601 F05 Figure 5. QFN Layout Example VOUT PGND VIN COUT CIN PIN 1 L1 CBOOST 17 SW CFWD CINTVCC R2 VIA TO INTVCC VIA TO INTVCC VIA TO VOUT R1 VIA TO VOUT 3601 F06 Figure 6. MSE Layout Example 3601f 18 LTC3601 APPLICATIONS INFORMATION Design Example As a design example, consider using the LTC3601 in an application with the following specifications: Next, COUT is selected based on the required output transient performance and the required ESR to satisfy the output voltage ripple. For this design, a 22μF ceramic capacitor will be used. VIN = 12V, VOUT = 1.8V, IOUT(MAX) = 1.5A, IOUT(MIN) = 10mA, f = 1MHz CIN should be sized for a maximum current rating of: Because efficiency is important at both high and low load currents, Burst Mode operation is selected. First, the correct RRT resistor value for 1MHz switching frequency must be chosen. Based on the equation discussed earlier, RRT should be 324k. Next, determine the inductor value for approximately 40% ripple current using: 1.8V 1.8V L= 1– = 2.55μH 1MHz • 600mA 12V 1.8V 12V – 1.8V ( ) = 0.54A IRMS = 1.5A 12V Decoupling the VIN pins with a 22μF ceramic capacitor should be adequate for most applications. A 0.1μF boost capacitor should also work for most applications. To save board space the ITH pin is connected to the INTVCC pin to select an internal compensation network. The PGOOD pin is connected to VIN through a 100k resistor. A standard value 2.2μH inductor will work well for this application. VIN 4V TO 15V VIN CIN 22μF BOOST RUN MODE/SYNC 2.2μF 100k INTVCC LTC3601 SW VON C1 0.1μF L1 2.2μH R3 80k CFWD 10pF VOUT 1.8V COUT 1.5A 47μF FB PGOOD ITH TRACK R4 40k RT 324k SGND PGND 3601 F05 CIN: TDK C3225X5R1C226M COUT: TDK C3225X5R0J476M L1: VISHAY IHLP2020BZER2R2M01 Figure 7. 1.8V, 1.5A Regulator at 1MHz 3601f 19 LTC3601 TYPICAL APPLICATIONS 12V Input to 1.8V Output at 4MHz Synchronized Frequency with 6V UVLO and 4.3ms Soft-Start VIN 12V VIN CIN 22μF BOOST 0.1μF L1 154k 0.68μH RUN SW VON 40k 80k LTC3601 INTVCC 2.2μF 270pF COUT 22μF FB 40k 100k PGOOD ITH TRACK RT MODE/SYNC 10k 10pF VOUT 1.8V 1.5A 80k SGND PGND 10nF EXTERNAL CLOCK CIN: TDK C3225X5R1C226M COUT: TDK C3216X5R0J226M L1: VISHAY IHLP2020BZERR68M01 3601 TA02a Efficiency vs Load Current 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.01 0.1 1 LOAD CURRENT (A) 10 3601 TA02b 3601f 20 LTC3601 TYPICAL APPLICATIONS 8.4V Input to 3.3V Output at 2MHz Operating Frequency Using Forced Continuous Mode C2 2.2μF C1 47μF VIN RUN INTVCC ITH RT PGOOD MODE/SYNC TRACK BOOST LTC3601 L1 0.1μF 2.2μH SW VON SGND R1 90.9k FB PGND CFF 10pF VOUT 3.3V COUT 1.5A 47μF R2 C : TDK C3225X5R1C476M IN 20k C : TDK C3216X5R0J476M OUT L1: VISHAY IHLP2020BZER2R2M01 3601 TA03a Efficiency vs Load Current 100 90 80 EFFICIENCY (%) VIN 8.4V 70 60 50 40 30 20 10 0 0.01 0.1 1 LOAD CURRENT (A) 10 3601 TA03b 3601f 21 LTC3601 PACKAGE DESCRIPTION UD Package 16-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1691) 0.70 p0.05 3.50 p 0.05 1.45 p 0.05 (4 SIDES) 2.10 p 0.05 PACKAGE OUTLINE 0.25 p0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD 3.00 p 0.10 (4 SIDES) R = 0.115 TYP 0.75 p 0.05 PIN 1 NOTCH R = 0.20 TYP OR 0.25 s 45o CHAMFER 15 16 PIN 1 TOP MARK (NOTE 6) 0.40 p 0.10 1 1.45 p 0.10 (4-SIDES) 2 (UD16) QFN 0904 0.200 REF 0.00 – 0.05 0.25 p 0.05 0.50 BSC NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3601f 22 LTC3601 PACKAGE DESCRIPTION MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev A) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 p 0.102 (.112 p .004) 5.23 (.206) MIN 2.845 p 0.102 (.112 p .004) 0.889 p 0.127 (.035 p .005) 8 1 1.651 p 0.102 (.065 p .004) 1.651 p 0.102 3.20 – 3.45 (.065 p .004) (.126 – .136) 0.305 p 0.038 (.0120 p .0015) TYP 16 0.50 (.0197) BSC 4.039 p 0.102 (.159 p .004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 p 0.076 (.011 p .003) REF 16151413121110 9 DETAIL “A” 0o – 6o TYP 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) GAUGE PLANE 0.53 p 0.152 (.021 p .006) 1234567 8 DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP 0.50 NOTE: (.0197) 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.86 (.034) REF 0.1016 p 0.0508 (.004 p .002) MSOP (MSE16) 0608 REV A 3601f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTC3601 TYPICAL APPLICATION 1.2V Output at 2MHz Operating Frequency Efficiency vs Load Current 100 C2 2.2μF C1 22μF 90 VIN RUN INTVCC ITH RT PGOOD MODE/SYNC TRACK BOOST 80 0.1μF LTC3601 SW VON SGND L1 1μH R1 20k FB PGND CFF 10pF VOUT 1.2V COUT 1.5A 47μF EFFICIENCY (%) VIN 12V 70 60 VIN = 8V VIN = 15V 50 40 30 20 R2 20k 10 3601 TA04 0 0.01 CIN: TDK C3225X5R1C226M COUT: TDK C3225X5R0J476M L1: VISHAY IHLP2020BZER1R0M01 0.1 1 LOAD CURRENT (A) 10 3601 TA04b RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3412A 5.5V, 3A (IOUT ), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD < 1μA, TSSOP16E, 4mm × 4mm QFN16 LTC3413 5.5V, 3A (IOUT Sink/Source), 2MHz, Monolithic Synchronous Regulator for DDR/QDR Memory Termination 90% Efficiency, VIN: 2.25V to 5.5V, VREF/2, IQ = 280μA, ISD < 1μA, TSSOP16E LTC3414/ LTC3416 5.5V, 4A (IOUT ), 4MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 64μA, ISD < 1μA, TSSOP20E LTC3415 5.5V, 7A (IOUT ), 1.5MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 450μA, ISD < 1μA, 5mm × 7mm QFN38 LTC3418 5.5V, 8A (IOUT ), 4MHz, Synchronous Step-Down DC/DC Converter LTC3602 10V, 2.5A (IOUT ), 3MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 10V, VOUT(MIN) = 0.6V, IQ = 75μA, ISD < 1μA, 4mm × 4mm QFN20, TSSOP16E LTC3603 15V, 2.5A (IOUT ), 3MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 75μA, ISD < 1μA, 4mm × 4mm QFN20 LTC3605 15V, 5A (IOUT ), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 2mA, ISD < 15μA, 4mm × 4mm QFN24 LTC3610 24V, 12A (IOUT ), 1MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4V to 24V, VOUT(MIN) = 0.6V, IQ = 900μA, ISD < 15μA, 9mm × 9mm QFN64 LTC3611 32V, 10A (IOUT ), 1MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4V to 32V, VOUT(MIN) = 0.6V, IQ = 900μA, ISD < 15μA, 9mm × 9mm QFN64 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 380μA, ISD < 1μA, 5mm × 7mm QFN38 3601f 24 Linear Technology Corporation LT 0709 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2009