www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 TPS3103 DBV PACKAGE (TOP VIEW) features Precision Supply Voltage Supervision Range: 0.9 V, 1.2 V, 1.5 V, 1.6 V, 2 V, 3.3 V High Trip Point Accuracy: 0.75% Supply Current of 1.2 µA (Typ) RESET Defined With Input Voltages as Low as 0.4 V Power On Reset Generator With a Delay Time of 130 ms Push/Pull or Open-Drain RESET Outputs SOT23-6 Package Temperature Range . . . −40°C to 85°C RESET 1 6 VDD GND 2 5 PFO MR 3 4 PFI TPS3106 DBV PACKAGE (TOP VIEW) RSTVDD 1 6 VDD GND 2 5 RSTSENSE MR 3 4 SENSE typical applications Applications Using Low-Power DSPs, Microcontrollers or Microprocessors Portable/Battery-Powered Equipment Intelligent Instruments Wireless Communication Systems Programmable Controls Industrial Equipment Notebook/Desktop Computers Automotive Systems description The TPS310x, TPS311x families of supervisory circuits provide circuit initialization and timing supervision, primarily for DSP and processorbased systems. During power on, RESET is asserted when the supply voltage (VDD) becomes higher than 0.4 V. Thereafter, the supervisory circuit monitors VDD and keeps the RESET output active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state to ensure proper system reset. The delay time starts after VDD has risen above the VIT. When the VDD drops below the VIT, the output becomes active again. TPS3110 DBV PACKAGE (TOP VIEW) RESET 1 6 VDD GND 2 5 WDI MR 3 4 SENSE typical application circuit 3.3 V 1.6 V VDD TPS3106E33DBV Vcore R3 VIO DSP R1 MR RSTVDD RESET SENSE R2 RSTSENSE GND GND GND All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. !"#$ % &'!!($ #% )'*+&#$ ,#$(- !,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (#% %$!'"($% %$#,#!, /#!!#$0!,'&$ )!&(%%1 ,(% $ (&(%%#!+0 &+',( $(%$1 #++ )#!#"($(!%- Copyright 2001 − 2004 Texas Instruments Incorporated 1 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 description (continued) The TPS3103 and TPS3106 have an active-low, open drain RESET output. The TPS3110 has an active-low push/pull RESET. The product spectrum is designed for supply voltages of 0.9 V up to 3.3 V. The circuits are available in a 6-pin SOT-23 package. The TPS31xx family is characterized for operation over a temperature range of −40°C to 85°C. AVAILABLE OPTIONS DEVICE TPS3103 RESET OUTPUT WDI INPUT PFO OUTPUT SENSE INPUT Open drain TPS3106 TPS3110 RSTSENSE, RSTVDD OUTPUT Open drain Push-pull Open drain PACKAGE INFORMATION TA −40°C 85°C −40 C to 85 C DEVICE NAME THRESHOLD VOLTAGE, VIT MARKING TPS3103E12DBVR‡ TPS3103E15DBVR‡ TPS3103E12DBVT§ TPS3103E15DBVT§ 1.142 V PFWI 1.434 V PFXI TPS3103H20DBVR‡ TPS3103K33DBVR‡ TPS3103H20DBVT§ TPS3103K33DBVT§ 1.84 V PFYI 2.941 V PGRI TPS3106E09DBVR‡ TPS3106E16DBVR‡ TPS3106E09DBVT§ TPS3106E16DBVT§ TPS3106K33DBVR‡ TPS3110E09DBVR‡ 0.86 V PFZI 1.521 V PGSI TPS3106K33DBVT§ TPS3110E09DBVT§ 2.941 V PGBI 0.86 V PGII TPS3110E12DBVR‡ TPS3110E15DBVR‡ TPS3110E12DBVT§ TPS3110E15DBVT§ 1.142 V PGJI 1.434 V PGKI TPS3110K33DBVR‡ TPS3110K33DBVT§ 2.941 V PGLI † TPS3106E09 and TPS3110K33 will be available in August 2001; all other versions will be available in October 2001. ‡ The DBVR passive indicates tape and reel of 3000 parts. § The DBVT passive indicates tape and reel of 250 parts. 2 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 ordering information TPS31 03 E 15 DBV R Reel Package Nominal Supply Voltage Typical Reset Threshold Voltage Functionality Family DEVICE NAME NOMINAL SUPPLY VOLTAGE, VN(dc) DEVICE NAME TYPICAL RESET THRESHOLD VOLTAGE, VIT TPS310xx09DBV TPS311xx09DBV 0.9 V TPS310XEXXDBV TPS311XEXXDBV VN(dc) − 5% TPS310xx12DBV TPS311xx12DBV 1.2 V TPS310XHXXDBV VN(dc) − 8% TPS310xx15DBV TPS311xx15DBV 1.5 V TPS310XKXXDBV TPS311XKXXDBV VN(dc) − 11% TPS310xx16DBV 1.6 V TPS310xx20DBV 2V TPS310xx33DBVTPS311xx33DBV 3.3 V Function Tables TPS3110† MR VDD > VIT x RESET L V(SENSE) > 0.551 V x H 0 0 L H 0 1 L H 1 0 L H 1 1 H L † Function of watchdog-timer not shown x = Don’t care TPS3103 MR VDD > VIT x RESET L V(PFI) > 0.551 V 0 PFO L L L 1 x L H H 0 0 L L H 0 1 H L H 1 0 L H H 1 1 H H MR L V(SENSE) > 0.551 V x VDD > VIT x H 0 H 0 H 1 H 1 TPS3106 RSTVDD RSTSENSE L L 0 L L 1 H L 0 L H 1 H H 3 SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 functional block diagram TPS3103 VDD VIT− + _ MR Reset Logic and Timer + _ PFI RESET PFO 0.551 V GND TPS3106 VDD VIT− + _ MR + _ SENSE 0.551 V GND 4 Reset Logic and Timer Reset Logic and Timer RSTVDD RSTSENSE www.ti.com www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 functional block diagram (continued) TPS3110 VDD VIT− + _ MR RESET + _ SENSE Reset Logic and Timer 0.551 V WDI GND Watchdog Logic and Control 5 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 timing diagram VDD VIT 0.4 V t td SENSE VIT−(S) = 0.551 V td td td td t t RESET Output Condition Undefined Output Condition Undefined t MR t PFI VIT−(S) = 0.551 V t PFO Output Condition Undefined Output Condition Undefined t Figure 1. Timing Diagram for TPS3103 6 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 timing diagram VDD VIT 0.4 V td t td RSTVDD Output Condition Undefined Output Condition Undefined t SENSE VIT−(S) = 0.551 V RSTSENSE t td Output Condition Undefined Output Condition Undefined td t MR t Figure 2. Timing Diagram for TPS3106 7 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 timing diagram VDD VIT 0.4 V td t SENSE VIT−(S) = 0.551 V td td td t td RESET td Output Condition Undefined Output Condition Undefined t(tout) WDI x = Don’t Care MR t Figure 3. Timing Diagram for TPS3110 8 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 Terminal Functions TERMINAL NAME I/O DESCRIPTION PART NO. GND ALL 2 MR ALL 3 I Manual-reset input. Pull low to force a reset. RESET remains low as long as MR is low and for the timeout period after MR goes high. Leave unconnected or connect to VDD when unused. PFI TPS3103 4 I Power-fail input compares to 0.551 V with no additional delay. Connect to VDD if not used. PFO TPS3103 5 O Power-fail output. Goes high when voltage at PFI rises above 0.551 V. RESET TPS3103 TPS3110 1 O Active-low reset output. Either push-pull or open-drain output stage RSTSENSE TPS3106 5 O Active-low reset output. Logic level at RSTSENSE only depends on the voltage at SENSE and the status of MR. RSTVDD TPS3106 1 O Active-low reset output. Logic level at RSTVDD only depends on the voltage at VDD and the status of MR. SENSE TPS3106 TPS3110 4 4 I A reset will be asserted if the voltage at SENSE is lower than 0.551 V. Connect to VDD if unused ALL 6 TPS3110 5 VDD WDI GND Supply voltage. Powers the device and monitors its own voltage I Watchdog timer input. If WDI remains high or low longer than the time-out period, then reset is triggered. The timer clears when reset is asserted or when WDI sees a rising edge or a falling edge. detailed description watchdog The TPS3110 device integrates a watchdog timer that must be periodically triggered by a positive or negative transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, RESET becomes active for the time period (td). This event also reinitializes the watchdog timer. manual reset (MR) Many µC-based products require manual-reset capability, allowing an operator or logic circuitry to initiate a reset. Logic low at MR asserts reset. Reset remains asserted while MR is low and for a time period (td) after MR returns high. The input has an internal 100-kΩ pull-up resistor, so it can be left open if it is unused. Connect a normally open momentary switch from MR to GND to create a manual reset function. External debounce is not required. If MR is driven from long cables or if the device is used in noisy environments, connecting a 0.1-µF capacitor from MR to GND provides additional noise immunity. PFI, PFO The TPS3103 has an integrated power-fail (PFI) comparator with a separate open drain (PFO) output can be used for low-battery detection, power-fail warning, or for monitoring a power supply other than the main supply. An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail input (PFI) will be compared with an internal voltage reference of 0.551 V. If the input voltage falls below the power-fail threshold (VIT−(S)), the power-fail output (PFO) goes low. If it goes above 0.551 V plus approximately 15-mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to supervise any voltage above 0.551 V. The sum of both resistors should be approximately 1 MΩ, to minimize power consumption and to assure that the current into the PFI pin can be neglected compared with the current through the resistor network. The tolerance of the external resistors should be not more than 1% to ensure minimal variation of sensed voltage. If the power-fail comparator is unused, connect PFI to GND and leave PFO unconnected. For proper operation of the PFI-comparator the supply voltage (VDD) must be higher than 0.8 V. 9 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 SENSE The voltage at the SENSE input is compared with a reference voltage of 0.551 V. If the voltage at SENSE falls below the sense-threshold (VIT−(S)), reset is asserted. On the TPS3106, a dedicated RSTSENSE output is available. On the TPS3110, the logic signal from SENSE is OR-wired with the logic signal from VDD or MR. An internal timer delays the return of the output to the inactive state, once the voltage at SENSE goes above 0.551 V plus about 15 mV of hysteresis. For proper operation of the SENSE-comparator, the supply voltage must be higher than 0.8 V. ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE (UNLESS OTHERWISE NOTED)(1) Supply voltage, VDD (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 V All other pins (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 3.6 V Maximum low output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Maximum high output current, IOH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −5 mA Input clamp current, IIK (VI < 0 or VI > VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Output clamp current, IOK (VO < 0 or VO > VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Soldering temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. For reliable operation, the device must not be operated at 3.6 V for more than t=1000h continuously. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DBV 437 mW 3.5 mW/°C 280 mW 227 mW recommended operating conditions Supply voltage, VDD (1) Input voltage, VI High-level input voltage, VIH at MR, WDI MIN MAX 0.4 3.3 V 0 VDD + 0.3 V 0.7 × VDD Input transition rise and fall rate at ∆t/∆V at MR, WDI Operating free-air temperature range, TA (1) For proper operation of SENSE, PFI, and WDI functions: VDD ≥ 0.8 V 10 V 0.3 × VDD Low-level input voltage, VIL at MR, WDI −40 UNIT V 100 ns/V 85 °C www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 electrical characteristics over recommended operating conditions (unless otherwise noted) PARAMETERS VOH TEST CONDITIONS VDD = 3.3 V, IOH = −3 mA VDD = 1.8 V, IOH = −2 mA VDD = 1.5 V, IOH = −1 mA High-level output voltage VDD = 0.9 V, IOH = −0.4 mA VDD = 0.5 V, IOH = −5 µA VDD = 3.3 V, IOL = 3 mA VOL RESET only VIT− VIT−(S) Vhys T(K) Vhys Negative-going input threshold voltage (1) Low-level input current IOH High-level output current at RESET (2) 0.3 VDD = 0.4 V, IOL = 5 µA 1.133 1.142 1.151 TPS31xxE15 1.423 1.434 1.445 1.512 1.523 1.534 TPS31xxH20 1.829 1.843 1.857 TPS31xxK33 2.919 2.941 2.963 0.542 0.551 0.559 SENSE, PFI TA = 25°C VDD ≥ 0.8 V, TA = 25°C 0.8 V ≤ VIT < 1.5 V 20 1.6 V ≤ VIT < 2.4 V 2.5 V ≤ VIT < 3.3 V 30 −0.012 −0.019 15 −25 25 SENSE, PFI, WDI SENSE, PFI, WDI = VDD, VDD = 3.3 V −25 25 VDD = VIT + 0.2 V, VOH = 3.3 V Supply current −47 −33 −25 Internal pull-up resistor at MR nA −25 µA 25 nA 200 nA VDD > VIT (average current), VDD < 1.8 V 1.2 3 VDD > VIT (average current), VDD > 1.8 V 2 4.5 VDD < VIT, VDD < 1.8 V VDD < VIT, VDD > 1.8 V %/K mV MR = VDD, VDD = 3.3 V Open drain V mV MR MR = 0 V, VDD = 3.3 V SENSE, PFI, WDI = 0 V, VDD = 3.3 V V 50 TA = −40°C to 85°C VDD ≥ 0.8 V SENSE, PFI, WDI V 0.1 TPS31xxE12 MR IDD 0.7 × VDD 0.866 TPS31xxE16 UNIT V 0.86 Hysteresis at SENSE, PFI input IIL 0.8 × VDD 0.854 Temperature coefficient of VIT−, PFI, SENSE High-level input current MAX TPS31xxE09 Hysteresis at VDD input IIH TYP VDD = 1.5 V, IOL = 2 mA VDD = 1.2 V, IOL = 1 mA VDD = 0.9 V, IOL = 500 µA Low-level output voltage Negative-going input threshold voltage (1) MIN µA 22 27 70 100 130 kΩ Ci Input capacitance at MR, SENSE, PFI, WDI VI = 0 V to VDD 1 pF (1) To ensure the best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed close to the supply terminals. (2) Also refers to RSTVDD and RSTSENSE 11 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 TIMING REQUIREMENTS AT RL = 1 MΩ, CL = 50 PF, TA = −40°C TO 85°C PARAMETER tt(out) Time-out period TEST CONDITIONS at WDI at VDD Pulse width VDD ≥ 0.85 V VIH = 1.1 × VIT, VIL = 0.9 × VIT−, VIT− = 0.86 V 0.55 0.1 at PFI at WDI VDD ≥ VIT, 0.3 at SENSE VIL = 0.3 × VDD, VIH = 0.7 × VDD TYP 1.1 MAX 1.65 UNIT s 20 VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD VDD ≥ VIT, VIH = 1.1 × VIT−(S), VIL = 0.9 × VIT−(S) VDD ≥ 0.85 V, VIH = 1.1 × VIT−(S),VIL = 0.9 × VIT−(S) at MR tw MIN µs 20 20 SWITCHING CHARACTERISTICS AT RL = 1 MΩ, CL = 50 PF, TA = −40°C TO 85°C PARAMETER TEST CONDITIONS VDD ≥ 1.1 × VIT, MR = 0.7 × VDD, See timing diagram td Delay time tPHL Propagation delay time, high-to-low level output VDD to RESET or RSTVDD delay tPLH Propagation delay time, low-to-high level output VDD to RESET or RSTVDD delay tPHL Propagation delay time, high-to-low level output SENSE to RESET or RSTSENSE delay tPLH Propagation delay time, high-to-low level output SENSE to RESET or RSTSENSE delay tPHL Propagation delay time, high-to-low level output PFI to PFO delay tPLH Propagation delay time, low-to-high level output PFI to PFO delay tPHL Propagation delay time, low-to-high level output MR to RESET. RSTVDD, RSTSENSE delay Propagation delay time, low-to-high level output MR to RESET. RSTVDD, RSTSENSE delay tPLH 12 MIN 65 TYP 130 VIH = 1.1 × VIT, VIL = 0.9 × VIT VIH = 1.1 × VIT, VIL = 0.9 × VIT 195 UNIT ms 40 µs 40 VDD ≥ 0.8 V, VIH = 1.1 × VIT, VIL = 0.9 × VIT VDD ≥ 0.8 V, VIH = 1.1 × VIT, VIL = 0.9 × VIT VDD ≥ 0.8 V, VIH = 1.1 × VIT, VIL = 0.9 × VIT VDD ≥ 0.8 V, VIH = 1.1 × VIT, VIL = 0.9 × VIT VDD ≥ 1.1 × VIT, VIL = 0.3 × VDD, VIH = 0.7 × VDD MAX 1 40 µs 40 µs 40 µs 300 µs 5 µss www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Supply current vs Supply voltage at TA = −40°C, 0°C, 25°C, 85°C VOL VOH Low-level output voltage vs Low-level output current at TA = −40°C, 0°C, 25°C, 85°C at 0.9 V, 3.3 V 5, 6 High-level output voltage vs High-level output current at TA = −40°C, 0°C, 25°C, 85°C at 0.9 V, 3.3 V 7, 8 tw VIT Minimum pulse duration at VDD vs Threshold overdrive voltage Normalized threshold voltage vs Free-air temperature 9 10 TPS3110E09 TPS3110E09 SUPPLY CURRENT vs SUPPLY VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.30 TA = 85°C 18 16 TA = 25°C 14 TA = 0°C SENSE = VDD MR = Open RESET = Open WDI: Triggered 12 10 TA = −40°C 8 6 4 VOL − Low-Level Output Voltage − V 20 I DD − Supply Current −µ A 4 VDD = 0.9 V SENSE = GND MR = GND WDI = GND 0.25 0.20 TA = 85°C TA = 25°C 0.15 TA = 0°C 0.10 TA = −40°C 0.05 2 0 0 0 0.5 1 1.5 2 2.5 VDD − Supply Voltage − V Figure 4 3 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 IOL − Low-Level Output Current − mA 2 Figure 5 13 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 TPS3110E09 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT TPS3110E09 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.90 1 VDD = 3.3 V SENSE = GND MR = GND WDI = GND 0.8 TA = 85°C VOH − High-Level Output Voltage − V VOL − Low-Level Output Voltage − V 0.9 TA = 25°C 0.7 0.6 TA = 0°C 0.5 TA = −40°C 0.4 0.3 0.2 0.85 TA = 85°C 0.80 0.75 TA = 25°C TA = 0°C 0.70 VDD = 0.9 V SENSE = VDD MR = VDD WDI : Triggered 0.65 0.1 0 0 2 4 6 8 10 12 14 16 18 0.60 20 0 IOL − Low-Level Output Current − mA −0.2 −0.3 −0.4 −0.5 Figure 7 TPS3110K33 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT MINIMUM PULSE DURATION AT VDD vs THRESHOLD OVERDRIVE VOLTAGE 3.4 50 VDD = 3.3 V SENSE = VDD MR = VDD WDI : Triggered 3.2 tw − Minimum Pulse Duration at VDD − µ s VOH − High-Level output Voltage − V −0.1 IOH − High-Level Output Current − mA Figure 6 3 =−40°C TAT=A−40°C 2.8 TA = 0°C 2.6 TA = 25°C 2.4 TA = 85°C 2.2 2 MR : Open SENSE = VDD 45 40 35 30 25 VDD = 3.3 V 20 15 10 VDD = 0.9 V 5 0 0 −5 −10 −15 −20 IOH − Low-Level Output Current − mA Figure 8 14 TA = −40°C −25 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 VDD − Threshold Overdrive Voltage − V Figure 9 www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 NORMALIZED THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE VIT − Normalized Threshold Voltage − V 1.008 1.006 1.004 1.002 1 0.998 0.996 0.994 0.992 −50 0 50 100 TA − Free-Air Temperature − °C Figure 10 APPLICATION INFORMATION 3.3 V 1.5 V V (CORE_th) + 0.551 V R1 ) R2 R2 R1 VDD VCORE TPS3110K33 MR RESET SENSE RESET WDI R2 GND VIO DSP Px.y GND GND Figure 11. TPS3110 in a DSP-System Monitoring Both Supply Voltages 15 SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 APPLICATION INFORMATION 2V VDD VDD TPS3103H20 R1 MR RESET PFI R2 PFO GND † † MSP430 Low Power µC Px.x RESET Py.x GND −2 V V (neg_th) + 0.551 V * R2 R1 ǒVDD * 0.551 VǓ † Resistor may be integrated in µC Figure 12. TPS3103 Monitoring a Negative Voltage 16 Analog Circuit www.ti.com www.ti.com SLVS363B − AUGUST 2001 − REVISED SEPTEMBER 2004 APPLICATION INFORMATION The TPS310x family has a quiescent current in the 1-µA to 2-µA range. When RESET, triggered by the voltage monitored at VDD, is active, the quiescent current increases to about 20 µA (see electrical characteristics). In some applications it is necessary to minimize the quiescent current even during the reset period. This is especially true when the voltage of a battery is supervised and the RESET is used to shut down the system or for an early warning. In this case the reset condition will last for a longer period of time. Especially when the battery is discharged, the current drawn from the battery should almost be zero. For this kind of applications the TPS3103 or TPS3106 are a good fit. To minimize current consumption it must be assured to select a version where the threshold voltage is lower than the voltage monitored at VDD. The TPS3106 has two reset outputs. One output (RSTVDD) is triggered from the voltage monitored at VDD. The other output (RSTSENSE) is triggered from the voltage monitored at SENSE. In the application shown in Figure 13, the TPS3106E09 is used to monitor the input voltage of two NiCd or NiMH cells. The threshold voltage (V(th) = 0.86 V) was chosen as low as possible to ensure that the supply voltage is always higher than the threshold voltage at VDD. The voltage of the battery is monitored using the SENSE input. The voltage divider was calculated to assert a reset using the RSTSENSE output at 2 x 0.8 V = 1.6 V. R1 + R2 ǒ Ǔ V TRIP *1 V IT(S) Where: VTRIP is the voltage of the battery at which a reset is asserted VIT(S) is the threshold voltage at SENSE = 0.551 V. R1 was chosen for a resistor current in the 1-µA range. With VTRIP = 1.6 V: R1 ≈ 1.9 × R2 R1 = 820 k, R2 = 430 k VDD R1 TPS3106E09DBV R3 MR 2 Cell NiMH RSTVDD SENSE RSTSENSE R2 Reset Output GND Figure 13. Battery Monitoring With 3-µA Supply Current for Device and Resistor Divider 17 PACKAGE OPTION ADDENDUM www.ti.com 8-Aug-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS3103E12DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E12DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E12DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E12DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E15DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E15DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E15DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E15DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103H20DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103H20DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103H20DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103H20DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103K33DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103K33DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103K33DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103K33DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E09DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E09DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E09DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E09DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E16DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E16DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E16DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106K33DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106K33DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 8-Aug-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS3106K33DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106K33DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E09DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E09DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E09DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E09DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E12DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E12DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E12DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E12DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E15DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E15DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E15DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110K33DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110K33DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110K33DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110K33DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 8-Aug-2005 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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