M
MCP2150
IrDA® Standard Protocol Stack Controller
Supporting DTE Applications
Features
Package Types
®
PDIP, SOIC
MCP2150
1
2
3
4
5
6
7
8
9
10
BAUD0
TXIR
RXIR
RESET
VSS
VSS
EN
TX
RX
RI
BAUD1
CD
OSC1/CLKI
OSC2
VDD
RTS
CTS
DTR
DSR
20
19
18
17
16
15
14
13
12
11
BAUD1
CD
OSC1/CLKI
OSC2
VDD
VDD
RTS
CTS
DTR
DSR
Block Diagram
MCP2150
TX
EN
BAUD1
BAUD0
Low power, high-speed CMOS technology
Fully static design
Low voltage operation
Industrial temperature range
Low power consumption
- < 1 mA @ 3.3 V, 11.0592 MHz (typical)
- 3 µA typical @ 5.0 V when disabled
2002 Microchip Technology Inc.
18
17
16
15
14
13
12
11
10
SSOP
RX
CMOS Technology
•
•
•
•
•
1
2
3
4
5
6
7
8
9
BAUD0
TXIR
RXIR
RESET
VSS
EN
TX
RX
RI
MCP2150
• Implements the IrDA standard including:
- IrLAP
- IrLMP
- IAS
- TinyTP
- IrCOMM (9-wire “cooked” service class)
• Provides IrDA standard physical signal layer
support including:
- Bidirectional communication
- CRC implementation
- Data communication rates up to 115.2 kbaud
• Includes UART to IrDA standard encoder/decoder
functionality:
- Easily interfaces with industry standard
UARTs and infrared transceivers
• UART interface for connecting to Data Terminal
Equipment (DTE) systems
• Transmit/Receive formats (bit width) supported:
- 1.63 µs
• Hardware baud rate selection for UART:
- 9.6 kbaud
- 19.2 kbaud
- 57.6 kbaud
- 115.2 kbaud
• Infrared baud rates supported:
- 9.6 kbaud
- 19.2 kbaud
- 38.4 kbaud
- 57.6 kbaud
- 115.2 kbaud
• 64 Byte Data Packet Size
• Programmable Device ID String
• Operates as Secondary Device
RTS
CTS
DSR
DTR
CD
RI
Preliminary
Encode and
Protocol Handler
TXIR
Logic
Baud Rate
Generator
Protocol Handler
and Decode
RXIR
OSC1
OSC2
UART
Control
DS21655B-page 1
MCP2150
NOTES:
DS21655B-page 2
Preliminary
2002 Microchip Technology Inc.
MCP2150
1.0
DEVICE OVERVIEW
This document contains device specific information for
the following device:
• MCP2150
The MCP2150 is a cost effective, low pin count (18-pin),
easy to use device for implementing IrDA standard wireless connectivity. The MCP2150 provides support for
the IrDA standard protocol “stack” plus bit encoding/
decoding.
The serial interface baud rates are user selectable to
one of four IrDA standard baud rates between 9600
baud and 115.2 kbaud (9600, 19200, 57600, 115200).
The IR baud rates are user selectable to one of five
IrDA standard baud rates between 9600 baud and
115.2 kbaud (9600, 19200, 37400, 57600, 115200).
The serial interface baud rate will be specified by the
BAUD1:BAUD0 pins, while the IR baud rate is specified
by the Primary Device (during Discover phase). This
means that the baud rates do not need to be the same.
The MCP2150 operates in Data Terminal Equipment
(DTE) applications and sits between a UART and an
infrared optical transceiver.
2002 Microchip Technology Inc.
The MCP2150 encodes an asynchronous serial data
stream, converting each data bit to the corresponding
infrared (IR) formatted pulse. IR pulses received are
decoded and then handled by the protocol handler
state machine. The protocol handler sends the appropriate data bytes to the Host Controller in UART
formatted serial data.
The MCP2150 supports “point-to-point” applications.
That is, one Primary device and one Secondary device.
The MCP2150 operates as a Secondary device. It does
not support “multi-point” applications.
Sending data using IR light requires some hardware
and the use of specialized communication protocols.
These protocol and hardware requirements are
described, in detail, by the IrDA standard specifications. The encoding/decoding functionality of the
MCP2150 is designed to be compatible with the physical layer component of the IrDA standard. This part of
the standard is often referred to as “IrPHY”.
The complete IrDA standard specifications are available for download from the IrDA website
(www.IrDA.org).
Preliminary
DS21655B-page 3
MCP2150
1.1
Applications
The MCP2150 Infrared Communications Controller
supporting the IrDA standard provides embedded system designers the easiest way to implement IrDA standard wireless connectivity. Figure 1-1 shows a typical
application block diagram. Table 1-2 shows the pin
definitions.
TABLE 1-1:
OVERVIEW OF FEATURES
Features
MCP2150
Serial Communications
UART, IR
Baud Rate Selection
Hardware
Low Power Mode
Yes
Resets (and Delays)
RESET, POR
(PWRT and OST)
Packages
18-pin DIP, SOIC,
20-pin SSOP
Infrared communication is a wireless two-way data
connection, using infrared light generated by low-cost
transceiver signaling technology. This provides reliable
communication between two devices.
Infrared technology offers:
• Universal standard for connecting portable
computing devices
• Easy, effortless implementation
• Economical alternative to other connectivity
solutions
• Reliable, high-speed connection
• Safe to use in any environment (can even be
used during air travel)
• Eliminates the hassle of cables
• Allows PCs and other electronic devices (such as
PDAs, cell phones, etc.) to communicate with
each other
• Enhances mobility by allowing users to easily
connect
The MCP2150 allows the easy addition of IrDA standard wireless connectivity to any embedded application that uses serial data. Figure 1-1 shows typical
implementation of the MCP2150 in an embedded
system.
The IrDA protocols for printer support are not included
in the IrCOMM 9-wire “cooked” service class.
FIGURE 1-1:
SYSTEM BLOCK DIAGRAM
TX
UART
TX
EN
BAUD1
BAUD0
RTS
CTS
DSR
DTR
CD
RI
Encode
TXIR
TXD
Power Down
Logic
RX
RX
DS21655B-page 4
Optical
Transceiver
MCP2150
Host Controller
(Microcontroller)
Decode
RXIR
RXD
Baud Rate
Generator
UART
Control
Preliminary
2002 Microchip Technology Inc.
MCP2150
TABLE 1-2:
Pin Name
PIN DESCRIPTIONS
Pin Number
PDIP SOIC SSOP
Pin
Type
Buffer
Type
ST
BAUD1:BAUD0 specify the baud rate of the device.
Asynchronous transmit to Infrared transceiver.
Description
BAUD0
1
1
1
I
TXIR
2
2
2
O
—
RXIR
3
3
3
I
ST
Asynchronous receive from Infrared transceiver.
RESET
4
4
4
I
ST
Resets the device.
VSS
5
5
5, 6
—
P
EN
6
6
7
I
TTL
Device enable.
1 = Device is enabled.
0 = Device is disabled (low power). MCP2150 only monitors
this pin when in the NDM state.
TX
7
7
8
I
TTL
Asynchronous receive; from Host Controller UART.
Ground reference for logic and I/O pins.
RX
8
8
9
O
—
Asynchronous transmit; to Host Controller UART.
RI
9
9
10
—
—
Ring Indicator. The value on this pin is driven high.
DSR
10
10
11
O
—
Data Set Ready. Indicates that the MCP2150 has completed
reset.
1 = MCP2150 is initialized.
0 = MCP2150 is not initialized.
DTR
11
11
12
I
TTL
Data Terminal Ready. The value of this pin is ignored once
the MCP2150 is initialized. It is recommended that this pin be
connected so that the voltage level is either VSS or VCC. At
device power up, this signal is used with the RTS signal to
enter device ID programming.
1 = Enter Device ID programming mode (if RTS is cleared).
0 = Do not enter Device ID programming mode.
CTS
12
12
13
O
—
RTS
13
13
14
I
TTL
VDD
14
14
15, 16
—
P
Positive supply for logic and I/O pins.
OSC2
15
15
17
O
—
Oscillator crystal output.
OSC1/CLKIN
16
16
18
I
CD
17
17
19
O
18
18
20
I
BAUD1
Legend:
TTL = TTL compatible input
I = Input
P = Power
2002 Microchip Technology Inc.
Clear to Send. Indicates that the MCP2150 is ready to
receive data from the Host Controller.
1 = Host Controller should not send data.
0 = Host Controller may send data.
Request to Send. Indicates that a Host Controller is ready to
receive data from the MCP2150. The MCP2150 prepares to
send data, if available.
1 = Host Controller not ready to receive data.
0 = Host Controller ready to receive data.
At device power up, this signal is used with the DTR signal to
enter device ID programming.
1 = Do not enter Device ID programming mode.
0 = Enter Device ID programming mode (if DTR is set).
CMOS Oscillator crystal input/external clock source input.
—
Carrier Detect. Indicates that the MCP2150 has established a
valid link with a Primary Device.
1 = An IR link has not been established (No IR Link).
0 = An IR link has been established (IR Link).
ST
BAUD1:BAUD0 specify the baud rate of the device.
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input
Preliminary
DS21655B-page 5
MCP2150
1.1.1
SIGNAL DIRECTIONS
Table 1-3 shows the direction of the MCP2150 signals.
The MCP2150 is designed for use in Data Terminal
Equipment (DTE) applications.
TABLE 1-3:
DB-9
Pin No.
Signal
MCP2150 SIGNAL DIRECTION
Direction
Comment
1
CD
MCP2150 → HC
2
RX
MCP2150 → HC
Received Data
3
TX
HC → MCP2150
Transmit Data
4
DTR (1)
—
Data Terminal
Ready
5
GND
—
Ground
6
DSR
MCP2150 → HC
7
RTS
HC → MCP2150
Request to Send
8
CTS
MCP2150 → HC
Clear to Send
9
RI (1)
—
Ring Indicator
Carrier Detect
Data Set Ready
Legend: HC = Host Controller
Note 1: This signal is not implemented in the MCP2150.
DS21655B-page 6
Preliminary
2002 Microchip Technology Inc.
MCP2150
2.0
DEVICE OPERATION
TABLE 2-1:
The MCP2150 is a cost effective, low pin count (18pin), easy to use device for implementing IrDA standard wireless connectivity. The MCP2150 provides
support for the IrDA standard protocol “stack” plus bit
encoding/decoding. The Serial interface and IR baud
rates are independantly selectable.
2.1
Power Up
Any time the device is powered up (parameter D003),
the Power Up Timer delay (parameter 33) occurs, followed by an Oscillator Start-up Timer (OST) delay
(parameter 32). Once these delays complete, communication with the device may be initiated. This communication is from both the infrared transceiver’s side as
well as the controller’s UART interface.
2.2
Device Reset
The MCP2150 is forced into the reset state when the
RESET pin is in the low state. Once the RESET pin is
brought to a high state, the Device Reset sequence
occurs. Once the sequence completes, functional
operation begins.
2.3
Clock Source
The MCP2150 requires a clock source to operate. The
frequency of this clock is 11.0592 MHz (electrical specification parameter 1A). This clock can be supplied by
either a crystal/resonator or as an external clock input.
2.3.1
CRYSTAL OSCILLATOR / CERAMIC
RESONATORS
A crystal or ceramic resonator can be connected to the
OSC1 and OSC2 pins to establish oscillation
(Figure 2-1). The MCP2150 oscillator design requires
the use of a parallel cut crystal. Use of a series cut crystal may give a frequency outside of the crystal
manufacturers specifications.
FIGURE 2-1:
OSC2
C2
OSC1 (C1)
OSC2 (C2)
11.0592 MHz
10 - 22 pF
10 - 22 pF
TABLE 2-2:
CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR
Freq
OSC1 (C1)
OSC2 (C2)
11.0592 MHz
15 - 30 pF
15 - 30 pF
Higher capacitance increases the stability of the oscillator but also increases the start-up time. These values are for design guidance only. RS may be required
to avoid overdriving crystals with low drive level specification. Since each crystal has its own
characteristics, the user should consult the crystal
manufacturer for appropriate values of external
components.
2.3.2
EXTERNAL CLOCK IN
For applications where a clock is already available
elsewhere, users may directly drive the MCP2150 provided that this external clock source meets the AC/DC
timing requirements listed in Section 4.3. Figure 2-2
shows how an external clock circuit should be
configured.
FIGURE 2-2:
EXTERNAL CLOCK INPUT
OPERATION
Clock From
external
system
OSC1
Open
OSC2
MCP2150
To internal
logic
C1
XTAL
Freq
Higher capacitance increases the stability of the oscillator but also increases the start-up time. These values are for design guidance only. Since each
resonator has its own characteristics, the user should
consult the resonator manufacturer for appropriate
values of external components.
CRYSTAL OPERATION
(OR CERAMIC
RESONATOR)
OSC1
CAPACITOR SELECTION FOR
CERAMIC RESONATORS
RF
RS
Note
MCP2150
See Table 2-1 and Table 2-2 for recommended values of
C1 and C2.
Note:
A series resistor may be required for AT
strip cut crystals.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 7
MCP2150
2.4
Bit Clock
2.5
UART Interface
The device crystal is used to derive the communication
bit clock (BITCLK). There are 16 BITCLKs for each bit
time. The BITCLKs are used for the generation of the
start bit and the eight data bits. The stop bit uses the
BITCLK when the data is transmitted (not for
reception).
The UART interface communicates with the "controller". This interface is a half duplex interface, meaning
that the system is either transmitting or receiving, but
not both simultaneously.
This clock is a fixed frequency and has minimal
variation in frequency (specified by crystal
manufacturer).
The baud rate for the MCP2150 serial port (the TX and
RX pins) is configured by the state of the BAUD1 and
BAUD0 pins. These two device pins are used to select
the baud rate at which the MCP2150 will transmit and
receive serial data (not IR data). Table 2-3 shows the
baud rate configurations.
2.5.1
BAUD RATE
TABLE 2-3:
SERIAL BAUD RATE
SELECTION VS. FREQUENCY
BAUD1:BAUD0
Baud Rate @
11.0592 MHz
Bit Rate
00
01
10
11
9600
19200
57600
115200
FOSC / 1152
FOSC / 576
FOSC / 192
FOSC / 96
2.5.2
TRANSMITTING
When the controller sends serial data to the MCP2150,
the controller’s baud rate is required to match the baud
rate of the MCP2150’s serial port.
2.5.3
RECEIVING
When the controller receives serial data from the
MCP2150, the controller’s baud rate is required to
match the baud rate of the MCP2150’s serial port.
DS21655B-page 8
Preliminary
2002 Microchip Technology Inc.
MCP2150
2.6
Modulation
2.7
The data that the MCP2150 UART received (on the TX
pin) that needs to be transmitted (on the TXIR pin) will
need to be modulated. This modulated signal drives the
IR transceiver module. Figure 2-3 shows the encoding
of the modulated signal.
Note:
The signal on the TXIR pin does not actually line up in time with the bit value that
was transmitted on the TX pin, as shown in
Figure 2-3. The TX bit value is shown to
represent the value to be transmitted on
the TXIR pin.
The modulated signal (data) from the IR transceiver
module (on RXIR pin) needs to be demodulated to form
the received data (on RX pin). Once demodulation of
the data byte occurs, the data that is received is transmitted by the MCP2150 UART (on the RX pin).
Figure 2-4 shows the decoding of the modulated
signal.
Note:
Each bit time is comprised of 16-bit clocks. If the value
to be transmitted (as determined by the TX pin) is a
logic low, then the TXIR pin will output a low level for
7-bit clock cycles, a logic high level for 3-bit clock
cycles or a minimum of 1.6 µsec. (see parameter
IR121). The remaining 6-bit clock cycles will be low. If
the value to transmit is a logic high, then the TXIR pin
will output a low level for the entire 16-bit clock cycles.
FIGURE 2-3:
Demodulation
The signal on the RX pin does not actually
line up in time with the bit value that was
received on the RXIR pin, as shown in
Figure 2-4. The RXIR bit value is shown to
represent the value to be transmitted on
the RX pin.
Each bit time is comprised of 16-bit clocks. If the value
to be received is a logic low, then the RXIR pin will be
a low level for the first 3-bit clock cycles or a minimum
of 1.6 µs. The remaining 13-bit clock cycles (or difference up to the 16-bit clock time) will be high. If the value
to be received is a logic high, then the RXIR pin will be
a high level for the entire 16-bit clock cycles. The level
on the RX pin will be in the appropriate state for the
entire 16 clock cycles.
ENCODING
Start Bit
16 CLK
Data bit 0
Data bit 1
Data bit 2
Data bit ...
0
0
1
BITCLK
TX Bit
Value
7 CLK
TXIR
24 Tosc
0
FIGURE 2-4:
1
0
DECODING
Start Bit
Data bit 0
Data bit 1
Data bit 2
Data bit ...
16 CLK
16 CLK
16 CLK
0
0
16 CLK
BITCLK
(CLK)
RXIR Bit
Value
≥ 13 CLK
≥ 1.6 µs (up to 3 CLK)
16 CLK
16 CLK
16 CLK
RX
0
2002 Microchip Technology Inc.
1
Preliminary
1
0
DS21655B-page 9
MCP2150
2.8
Minimizing Power
2.9
The device can be placed in a low power mode by disabling the device (holding the EN pin at the low state).
The internal state machine is monitoring this pin for a
low level and, once this is detected, the device is
disabled and enters into a low power state.
2.8.1
RETURNING TO DEVICE
OPERATION
Network Layering Reference
Model
Figure 2-5 shows the ISO Network Layering Reference
Model. The shaded areas are implemented by the
MCP2150, the cross-hatched area is implemented by
an infrared transceiver. The unshaded areas should be
implemented by the Host Controller.
When disabled, the device is in a low power state.
When the EN pin is brought to a high level, the device
will return to the operating mode. The device requires
a delay of 1024 TOSC before data may be transmitted
or received.
FIGURE 2-5:
ISO REFERENCE LAYER MODEL
OSI REFERENCE LAYERS
Has to be implemented in Host
Controller firmware
(such as a PICmicro®
microcontroller)
Application
Presentation
Session
Regions implemented
by the MCP2150
Transport
Network
Regions implemented
by the Optical Transceiver logic
Data Link Layer
LLC (Logical Link Control)
Acceptance Filtering
Overload Notification
Recovery Management
Supervisor
MAC (Medium Access Control)
Data Encapsulation/Decapsulation
Frame Coding (stuffing, destuffing)
Medium Access Management
Error Detection
Error Signalling
Acknowledgment
Serialization/Deserialization
Fault
confinement
(MAC-LME)
Physical Layer
PLS (Physical Signalling)
Bit Encoding/Decoding
Bit Timing
Synchronization
Bus Failure
management
(PLS-LME)
PMA (Physical Medium Attachment)
Driver/Receiver Characteristics
MDI (Medium Dependent Interface)
Connectors
DS21655B-page 10
Preliminary
2002 Microchip Technology Inc.
MCP2150
The IrDA standard specifies the following protocols:
2.9.1
• Physical Signaling Layer (PHY)
• Link Access Protocol (IrLAP)
• Link Management Protocol/Information Access
Service (IrLMP/IAS)
The MCP2150 supports these required IrDA standard
protocols:
• Physical Signaling Layer (PHY)
• Link Access Protocol (IrLAP)
• Link Management Protocol/Information Access
Service (IrLMP/IAS)
The IrDA data lists optional protocols. They are:
•
•
•
•
•
•
•
Tiny TP
IrTran-P
IrOBEX
IrLAN
IrCOMM
IrMC
IrDA Lite
The MCP2150 also supports some of the optional protocols for IrDA data. The optional protocols that the
MCP2150 implements are:
• Tiny TP
• IrCOMM
Figure 2-6 shows the IrDA data protocol stack and
which components are implemented by the MCP2150.
FIGURE 2-6:
IrTran-P
LM-IAS
IrDA DATA PROTOCOLS
SUPPORTED BY MCP2150
IRDA DATA - PROTOCOL
STACKS
IrObex IrLan IrComm (1)
IrMC
Tiny Transport Protocol (Tiny TP)
IR Link Access Protocol (IrLAP)
Asynchronous
Synchronous Synchronous
(2)
4 PPM
Serial IR
Serial IR
(4 Mb/s)
(9600 -115200 b/s) (1.152 Mb/s)
Optional IrDA data
protocols not
supported by
the MCP2150
Physical Signal Layer (PHY)
The MCP2150 provides the following Physical Signal
Layer specification support:
• Bidirectional communication
• Data Packets are protected by a CRC
- 16-bit CRC for speeds up to 115.2 kbaud
• Data Communication Rate
- 9600 baud minimum data rate
The following Physical Layer Specification is dependant on the optical transceiver logic used in the
application. The specification states:
IR Link Management - Mux (IrLMP)
Supported by
the MCP2150
2.9.1.1
• Communication Range, which sets the end user
expectation for discovery, recognition and performance.
- Continuous operation from contact to at least
1 meter (typically 2 meters can be reached)
- A low power specification reduces the objective for operation from contact to at least
20 cm (low power and low power) or 30 cm
(low power and standard power).
Note 1: The MCP2155 implements the 9-wire
“cooked" service class serial replicator.
2: An optical transceiver is required.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 11
MCP2150
2.9.1.2
IrLAP
The MCP2150 supports the IrLAP protocol. The IrLAP
protocol provides:
• Management of communication processes on the
link between devices.
• A device-to-device connection for the reliable,
ordered transfer of data.
• Device discover procedures.
• Hidden node handling.
Figure 2-7 identifies the key parts and hierarchy of the
IrDA protocols. The bottom layer is the Physical layer,
IrPHY. This is the part that converts the serial data to
and from pulses of IR light. IR transceivers can’t transmit and receive at the same time. The receiver has to
wait for the transmitter to finish sending. This is sometimes referred to as a “Half-Duplex” connection. The IR
Link Access Protocol (IrLAP) provides the structure for
packets (or “frames”) of data to emulate data that would
normally be free to stream back and forth.
FIGURE 2-7:
IRDA STANDARD
PROTOCOL LAYERS
IrLMP
–
IAS
2: IrDA communication standards faster
than 115.2 kbaud use a different CRC
method and physical layer.
Protocols
resident in
MCP2150
IrLAP
IrPHY
The IrLAP frame begins with an address byte (“A”
field), then a control byte (“C” field). The control byte is
used to differentiate between different types of frames
and is also used to count frames. Frames can carry status, data or commands. The IrLAP protocol has a command syntax of it’s own. These commands are part of
the control byte. Lastly, IrLAP frames carry data. This
data is the information (or “I”) field. The integrity of the
frame is ensured with a 16-bit CRC, referred to as the
Frame Check Sequence (FCS). The 16-bit CRC value
is transmitted LSB first. The end of the frame is marked
with an EOF character, which is always a 0xC1. The
frame structure described here is used for all versions
of IrDA protocols used for serial wire replacement for
speeds up to 115.2 kbaud.
Note 1: Another IrDA standard that is entering
general usage is IR Object Exchange
(IrOBEX). This standard is not used for
serial connection emulation.
Host O.S. or Application
IrCOMM
Figure 2-8 shows how the IrLAP frame is organized.
The frame is proceeded by some number of Beginning
of Frame characters (BOFs). The value of the BOF is
generally 0xC0, but 0xFF may be used if the last BOF
character is a 0xC0. The purpose of multiple BOFs is to
give the other station some warning that a frame is
coming.
FIGURE 2-8:
IR pulses
transmitted
and
received
IRLAP FRAME
X BOFs BOF A C I FCS EOF
2
(1+N) of C0h payload bytes C1h
In addition to defining the frame structure, IrLAP provides the “housekeeping” functions of opening, closing
and maintaining connections. The critical parameters
that determine the performance of the link are part of
this function. These parameters control how many
BOFs are used, identify the speed of the link, how fast
either party may change from receiving to transmitting,
etc. IrLAP has the responsibility of negotiating these
parameters to the highest common set so that both
sides can communicate as quickly, and as reliably, as
possible.
DS21655B-page 12
Preliminary
2002 Microchip Technology Inc.
MCP2150
2.9.1.3
IrLMP
2.9.1.4
The MCP2150 implements the IrLMP protocol. The
IrLMP protocol provides:
• Multiplexing of the IrLAP layer. This allows multiple channels above an IrLAP connection.
• Protocol and service discovery. This is via the
Information Access Service (IAS).
When two devices that contain the IrDA standard feature are connected, there is generally one device that
has something to do and the other device that has the
resource to do it. For example, a laptop may have a job
to print and an IrDA standard compatible printer has the
resources to print it. In IrDA standard terminology, the
laptop is a Primary device and the printer is the Secondary device. When these two devices connect, the
Primary device must determine the capablities of the
Secondary device to determine if the Secondary device
is capable of doing the job. This determination is made
by the Primary device asking the Secondary device a
series of questions. Depending on the answers to
these questions, the Primary device may or may not
elect to connect to the Secondary device.
The queries from the Primary device are carried to the
Secondary device using IrLMP. The responses to these
queries can be found in the Information Access Service
(IAS) of the Secondary device. The IAS is a list of the
resources of the Secondary device. The Primary
device compares the IAS responses with its requirements and then makes the decision if a connection
should be made.
Link Management - Information
Access Service (LM-IAS)
The MCP2150 implements the LM-IAS. Each LM-IAS
entity maintains an information database to provide:
• Information on services for other devices that
contain the IrDA standard feature (Discovery).
• Information on services for the device itself.
• Remote accessing of another device’s information
base.
This is required so that clients on a remote device can
find configuration information needed to access a
service.
2.9.1.5
Tiny TP
Tiny TP provides the flow control on IrLMP connections. An optional service of Segmentation and
Reassembly can be handled.
2.9.1.6
IrCOMM
IrCOMM provides the method to support serial and parallel port emulation. This is useful for legacy COM
applications, such as printers and modem devices.
The IrCOMM standard is just a syntax that allows the
Primary device to consider the Secondary device as a
serial device. IrCOMM allows for emulation of serial or
parallel (printer) connections of various capabilities.
The MCP2150 supports the 9-wire “cooked” service
class of IrCOMM. Other service classes supported by
IrCOMM are shown in Figure 2-9.
The MCP2150 identifies itself to the Primary device as
a modem.
Note:
The MCP2150 identifies itself as a modem
to ensure that it is identified as a serial
device with a limited amount of memory.
The MCP2150 is not a modem, and the non-data circuits are not handled in a modem fashion.
FIGURE 2-9:
IRCOMM SERVICE CLASSES
IrCOMM Services
Uncooked Services
Cooked Services
Parallel
Serial
Parallel
Serial
IrLPT
3-wire Raw
Centronics
3-wire Cooked
IEEE 1284
9-wire Cooked
Supported by MCP2150
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 13
MCP2150
2.9.2
OTHER OPTIONAL IrDA DATA
PROTOCOLS
Other IrDA data protocols have been developed to specific application requirements. These optional protocols
are not supported by the MCP2150. These IrDA data
protocols are briefly described in the following sub-sections. For additional information, please refer to the
IrDA website (www.IrDA.org).
2.9.2.1
IrTran-P
IrTran-P provides the protocol to exchange images with
digital image capture devices/cameras.
2.9.2.2
IrOBEX
IrOBEX provides OBject EXchange services. This is
similar to HTTP.
2.9.2.3
IrLAN
IrLAN describes a protocol to support IR wireless
access to a Local Area Network (LAN).
2.9.2.4
IrMC
IrMC describes how mobile telephony and communication devices can exchange information. This information includes phonebook, calender and message data.
Also how call control and real-time voice are handled
(RTCON).
2.9.2.5
IrDA Lite
IrDA Lite describes how to reduce the application code
requirements, while maintaining compatibility with the
full implementation.
DS21655B-page 14
Preliminary
2002 Microchip Technology Inc.
MCP2150
2.9.3
HOW DEVICES CONNECT
When two devices implementing the IrDA standard feature establish a connection using the IrCOMM protocol,
the process is analogous to connecting two devices
with serial ports using a cable. This is referred to as a
"point-to-point" connection. This connection is limited
to half-duplex operation because the IR transceiver
cannot transmit and receive at the same time. The purpose of the IrDA protocol is to allow this half-duplex link
to emulate, as much as possible, a full-duplex connection. In general, this is done by dividing the data into
“packets”, or groups of data. These packets can then
be sent back and forth, when needed, without risk of
collision. The rules of how and when these packets are
sent constitute the IrDA protocols. The MCP2150 supports elements of this IrDA protocol to communicate
with other IrDA standard compatible devices.
When a wired connection is used, the assumption is
made that both sides have the same communications
parameters and features. A wired connection has no
need to identify the other connector because it is
assumed that the connectors are properly connected.
In the IrDA standard, a connection process has been
defined to identify other IrDA compatible devices and
establish a communication link. There are three steps
that these two devices go through to make this
connection. They are:
• Normal Disconnect Mode (NDM)
• Discovery Mode
• Normal Connect Mode (NCM)
ital Assistant (PDA), the PDA that supports the IrDA
standard feature would be the Primary device and the
cellphone would be the Secondary device.
When a Primary device polls for another device, a
nearby Secondary device may respond. When a Secondary device responds, the two devices are defined to
be in the Normal Disconnect Mode (NDM) state. NDM
is established by the Primary device broadcasting a
packet and waiting for a response. These broadcast
packets are numbered. Usually 6 or 8 packets are sent.
The first packet is number 0, the last packet is usually
number 5 or 7. Once all the packets are sent, the Primary device sends an ID packet, which is not numbered.
The Secondary device waits for these packets and then
responds to one of the packets. The packet it responds
to determines the “time slot” to be used by the Secondary device. For example, if the Secondary device
responds after packet number 2, then the Secondary
device will use time slot 2. If the Secondary device
responds after packet number 0, then the Secondary
device will use time slot 0. This mechanism allows the
Primary device to recognize as many nearby devices
as there are time slots. The Primary device will continue to generate time slots and the Secondary device
should continue to respond, even if there’s nothing to
do.
Note 1: The MCP2150 can only be used to
implement a Secondary device.
2: The MCP2150 supports a system with
only one Secondary device having exclusive use of the IrDA standard infrared link
(known as "point-to-point" communication).
Figure 2-10 shows the connection sequence.
2.9.3.1
Normal Disconnect Mode (NDM)
When two IrDA standard compatible devices come into
range they must first recognize each other. The basis
of this process is that one device has some task to
accomplish and the other device has a resource
needed to accomplish this task. One device is referred
to as a Primary device and the other is referred to as a
Secondary device. This distinction between Primary
device and Secondary device is important. It is the
responsibility of the Primary device to provide the
mechanism to recognize other devices. So the Primary
device must first poll for nearby IrDA standard compatible devices. During this polling, the defaut baud rate of
9600 baud is used by both devices.
For example, if you want to print from an IrDA
equipped laptop to an IrDA printer, utilizing the IrDA
standard feature, you would first bring your laptop in
range of the printer. In this case, the laptop is the one
that has something to do and the printer has the
resource to do it. The laptop is called the Primary
device and the printer is the Secondary device. Some
data-capable cellphones have IrDA standard infrared
ports. If you used such a cellphone with a Personal Dig-
2002 Microchip Technology Inc.
3: The MCP2150 always responds to packet
number 2. This means that the MCP2150
will always use time slot 2.
4: If another Secondary device is nearby,
the Primary device may fail to recognize
the MCP2150, or the Primary device may
not recognize either of the devices.
During NDM, the MCP2150 handles all of the
responses to the Primary device (Figure 2-10) without
any communication with the Host Controller. The Host
Controller is inhibited by the CTS signal of the
MCP2150 from sending data to the MCP2150.
Preliminary
DS21655B-page 15
MCP2150
2.9.3.2
Discovery Mode
2.9.3.3
Discovery mode allows the Primary device to determine the capabilities of the MCP2150 (Secondary
device). Discovery mode is entered once the MCP2150
(Secondary device) has sent an XID response to the
Primary device and the Primary device has completed
sending the XIDs and then sends a Broadcast ID. If this
sequence is not completed, then a Primary and
Secondary device can stay in NDM indefinitely.
When the Primary device has something to do, it
initiates Discovery. Discovery has two parts. They are:
• Link initialization
• Resource determination
The first step is for the Primary and Secondary devices
to determine, and then adjust to, each other’s hardware
capabilities. These capabilities are parameters like:
•
•
•
•
Data rate
Turn around time
Number of packets without a response
How long to wait before disconnecting
Both the Primary and Secondary device begin communications at 9600 baud, which is the default baud rate.
The Primary device sends its parameters, then the
Secondary device responds with its parameters. For
example, if the Primary supports all data rates up to
115.2 kbaud and the Secondary device only supports
19.2 kbaud, the link will be established at 19.2 kbaud.
Note:
The MCP2150 is limited to a data rate of
115.2 kbaud.
Once the hardware parameters are established, the
Primary device must determine if the Secondary device
has the resources it requires. If the Primary device has
a job to print, then it must know if it’s talking to a printer,
not a modem or other device. This determination is
made using the Information Access Service (IAS). The
job of the Secondary device is to respond to IAS queries made by the Primary device. The Primary device
must ask a series of questions like:
Normal Connect Mode (NCM)
Once discovery has been completed, the Primary
device and MCP2150 (Secondary device) can freely
exchange data.
The MCP2150 can receive IR data or serial data, but
not both simultaneously. The MCP2150 uses a hardware handshake to stop the local serial port from
sending data while the MCP2150 is receiving IR data.
Note:
Data loss will result if this hardware
handshake is not observed.
Both the Primary device and the MCP2150 (Secondary
device) check to make sure that data packets are
received by the other without errors. Even when data is
required to be sent, the Primary and Secondary
devices will still exchange packets to ensure that the
connection hasn’t, unexpectedly, been dropped. When
the Primary device has finished, it then transmits the
close link command to the MCP2150 (Secondary
device). The MCP2150 will confirm the close link command and both the Primary device and the MCP2150
(Secondary device) will revert to the NDM state.
Note:
If the NCM mode is unexpectedly terminated for any reason (including the Primary
device not issuing a close link command),
the MCP2150 will revert to the NDM state
10 seconds after the last frame has been
received.
It is the responsability of the Host Controller program to
understand the meaning of the data received and how
the program should respond to it. It’s just as if the data
were being received by the Host Controller from a
UART.
• What is the name of your service?
• What is the address of this service?
• What are the capabilities of this device?
When all the Primary device’s questions are answered,
the Primary device can access the service provided by
the Secondary device.
During Discovery mode, the MCP2150 handles all
responses to the Primary device (see Figure 2-10)
without any communication with the Host Controller.
The Host Controller is inhibited by the CTS signal of the
MCP2150 from sending data to the MCP2150.
DS21655B-page 16
Preliminary
2002 Microchip Technology Inc.
MCP2150
FIGURE 2-10:
CONNECTION SEQUENCE
Primary Device
Secondary Device
(ex. MCP2150)
Normal Disconnect Mode (NDM)
Send XID Commands
(timeslots n, n+1, ...)
(approximately 70ms
between XID commands)
No Response
XID Response in timeslot y,
claiming this timeslot, (MCP2150
always claims timeslot 2)
Finish sending XIDs
(max timeslots - y frames)
No Response to these XIDs
Broadcast ID
No Response to Broadcast ID
Discovery
Send SNRM Command
(w/ parameters and
connection address)
UA response with parameters
using connect address
Open channel for IAS Queries
Confirm channel open for IAS
Send IAS Queries
Provide IAS responses
Open channel for data
Confirm channel open for data
Normal Response Mode (NRM)
(MCP2150 CD pin driven low)
Send Data or Status
Send Data or Status
Send Data or Status
Send Data or Status
Shutdown link
Confirm shutdown
(back to NDM state)
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 17
MCP2150
2.10
Operation
2.10.2
The maximum IR data rate of the MCP2150 is
115.2 kbaud. The actual throughput will be less, due to
several factors. The most significant factors are under
the control of the developer. One factor beyond the
control of the designer is the overhead associated with
the IrDA standard. The MCP2150 uses a fixed data
block size of 64 bytes. To carry 64 bytes of data, the
MCP2150 must send 72 bytes (64+8). The additional 8
bytes are used by the protocol. When the Primary
device receives the frame, it must wait for a minimum
latency period before sending a packet of its own. This
turnaround time is set by IrLAP when the parameters of
the link are negotiated. A common turnaround time is
1 ms, although longer and shorter times may be
encountered. 1 ms represents approximately 12 byte
times at a data rate of 115.2 kbaud. The minimum size
frame the Primary device can respond with is 6 bytes.
The MCP2150 will add the 12 byte-time latency on its
own, again assuming a 1 ms latency. This means that
the maximum throughput will be 64 data bytes out of a
total of 64 + 38 byte times. Thus, the maximum theoretical throughput will be limited to about 64/(64+38)=63%
of the IR data rate. Actual maximum throughput will be
dependent on both the MCP2150 and the
characteristics of the Primary device.
The MCP2150 emulates a null modem connection. The
application on the DTE device sees a virtual serial port.
This serial port emulation is provided by the IrDA standard protocols. The link between the DTE device and
the embedded application is made using the
MCP2150. The connection between the MCP2150 and
the embedded application is wired as if there were a
null modem connection.
The Carrier Detect (CD) signal of the MCP2150 is used
to indicate that a valid IrDA standard infrared link has
been established between the MCP2150 and the Primary device. The CD signal should be monitored
closely to make sure that any communication tasks can
be completed. The MCP2150 DSR signal indicates that
the device has powered-up, successfully initialized and
is ready for service. This signal is intended to be connected to the DSR input of the Host Controller. If the
Host Controller was directly connected to an IrDA standard Primary device using a serial cable (the MCP2150
is not present), the Host Controller would be connected
to the Primary device’s DTR output signal.
The MCP2150 generates the CTS signal locally
because of buffer limitations.
Note 1: The MCP2150
signals locally.
generates
non-data
The most significant factor in data throughput is how
well the data frames are filled. If only 1 byte is sent at a
time, then the maximum throughput is 1/(1+38)=2.5%
of the IR data rate. The best way to maximize throughput is to align the amounts of data with the packet size
of the MCP2150. Throughput examples are shown in
Table 2-4.
2: Only transceiver’s TXD and RXD signals
are carried back and forth to the Primary
device. The MCP2150 emulates a 3-wire
serial connection (TXD, RXD and GND).
2.10.1
HARDWARE HANDSHAKING
The MCP2150 uses a 64-byte buffer for incoming data
from the IR Host. Another 64-byte buffer is provided to
buffer data from the UART serial port. When an IR
packet begins the IrComm, the MCP2150 handles IR
data exclusively (the UART serial port buffer is not
available). A hardware handshaking pin (CTS) is provided to inhibit the Host Controller from sending serial
data while IR Data is being sent or received.
Note:
BUFFERS AND THROUGHPUT
Note:
IrDA throughput is based on many factors
associated with characteristics of the Primary and Secondary devices. These characteristics may cause your application
throughput to be less than the theoretical
example shown in Table 2-4.
When the CTS output from the IrComm is
high, no data should be sent from the Host
Controller. The UART FIFO will store up to
2 bytes. Any additional data bytes will be
lost.
TABLE 2-4:
THEORETICAL IrDA STANDARD THROUGHPUT EXAMPLES @ 115.2 KBAUD
Primary Device
Primary Device
MCP2150
Total Bytes Throughput
MCP2150
Turn-around Time(1) Turn-around Transmitted % (Data/Total)
Minimum
Data Packet Overhead
Response (Bytes)
Time(1) (Bytes)
Size (Bytes) (Bytes)
(Bytes)
64
8
6
12
12
102
62.7%
1
8
6
12
12
39
2.6%
Note 1: Number of bytes calculated based on a common turnaround time of 1 ms.
DS21655B-page 18
Preliminary
2002 Microchip Technology Inc.
MCP2150
2.11
Turnaround Latency
TABLE 2-5:
An IR link can be compared to a one-wire data connection. The IR transceiver can transmit or receive, but not
both at the same time. A delay of one bit time is recommended between the time a byte is received and
another byte is transmitted.
2.12
IR Port Baud Rate
DTR
RTS
0
X
Enter Normal Mode
Programmable Device ID
The MCP2150 has a flexible feature that allows the
MCP2150 Device ID to be changed by the Host Controller. The default ID is “Generic IrDA” and is stored in
non-volatile, electrically erasable programmable memory (EEPROM). The maximum ID String length is 19
bytes. The format of the ID EEPROM is shown in
Figure 2-11.
1
0
Enter Programmable Device ID
1
1
Enter Normal Mode
Once the MCP2150 is ready to receive data, the CTS
pin will be forced low. Data may now be transferred, following the format in Figure 2-11. The CTS pin determines the flow control and the Host Controller must
monitor this signal to ensure that the data byte may be
sent.
Once the Host Controller has sent its last byte, the DTR
pin must be set low. This ensures that, if another reset
occurs, the MCP2150 will not reenter ID String programming mode. The MCP2150 uses the String Length
(1st byte transmitted) to determine when the ID String
programming mode has completed. This returns the
MCP2150 to normal operation.
Note 1: If a non-valid ID String (containing an ASCII
character not in the valid range) is
programmed, the MCP2150 will not create
a link with a Primary device.
The ID String must only contain the ASCII characters
from 20h to 7Ah (inclusive).
2: The communication program supplied with
Microsoft’s Windows® operating system
(called HyperTerminal) may leave the DTR
signal high and the RTS signals low when
the program disconnects, or is closed. Care
should be taken to ensure that this does not
accidently cause the MCP2150 to enter
Device ID String Programming.
The MCP2150 enters into ID String programming when
it exits the reset state and detects that the DTR pin is
high and the RTS pin is low.
A Host Controller connected to the MCP2150 would,
typically, perform the following steps to place the
MCP2150 into ID String programming mode:
1.
2.
3.
4.
Force the MCP2150 into reset (RESET pin
forced low).
Force the DTR pin high and the RTS pin low.
Release the MCP2150 from reset (RESET pin
forced high).
Wait for device to complete initialization.
FIGURE 2-11:
After Device Reset *
* Until device initialization is complete.
The baud rate for the MCP2150 IR port (the TXIR and
RXIR pins) is, initially, at the default rate of 9600 baud.
The Primary device determines the maximum baud
rate that the MCP2150 will operate at. This information
is used during NDM, with the Primary device setting the
baud rate of the IR link. The maximum IR baud rate is
not required to be the same as the MCP2150’s serial
port (UART) baud rate (as determined by the
BAUD1:BAUD0 pins).
2.13
DTR/RTS STATE & DEVICE
MODE
Example 2-1 shows the firmware code for a
PIC16CXXX acting as the Host Controller to modify the
MCP2150 Device ID String.
ID STRING FORMAT
1st Byte
Transferred
Last Byte
Transferred
Length
ID String
1 Byte
1 to 19 Bytes
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 19
MCP2150
EXAMPLE 2-1:
PIC16FXX Code to Program the Device ID
;#define
dtr
PORTx, Pinx
; Must specify which Port and Which Pin
;#define
cts
PORTx, Pinx
; Must specify which Port and Which Pin
;#define
rts
PORTx, Pinx
; Must specify which Port and Which Pin
;#define
clr
PORTx, Pinx
; Must specify which Port and Which Pin
;
;*****************************************************************
; String Table
; This table stores a string, breg is the offset. The string
; is terminated by a null character.
;*****************************************************************
string1 clrf
PCLATH
; this routine is on page 0
movf
breg, W
; get the offset
addwf PCL, F
; add the offset to PC
DT
D'15'
; the first byte is the byte count
DT
"My IR ID String"
;
UpdateID
call
deviceInit
; Initialize the PIC16Fxxx
bcf
clr
; place the MCP2150 in reset
bsf
dtr
; Force the DTR pin high for program mode
bcf
rts
; Force the RTS pin low for program mode
call
delay1mS
; delay for 1 ms.
bsf
clr
; allow the MCP2150 to come out of reset
;
clrf
LoopCnt
; LoopCnt = 0
ctsLP1 call
delay1mS
; delay for 1 ms.
btfss cts
; if cts=0 then we're ready to program
goto
ctsLow
; MCP2150 is ready to receive data
decfsz LoopCnt, F
;
goto
ctsLP1
; NO, wait for MCP2150 to be ready
goto
StuckReset
; The MCP2150 did not exit reset, do your recovery
;
in this routine.
DS21655B-page 20
Preliminary
2002 Microchip Technology Inc.
MCP2150
EXAMPLE 2-1:
ctsLow
;
sndlp
sndwt
PIC16FXX Code to Program the Device ID (Continued)
clrf
call
breg
string1
areg
sndwt
;
;
;
;
;
;
;
;
clear the offset
get the byte count
(ID length byte + # bytes in string)
use creg as the loop counter
add 1 to the loop count since
we're jumping into the middle
save the count in areg to send it
start sending the count + ID string
movwf
incf
creg
creg, f
movwf
goto
call
movwf
btfsc
goto
call
incf
decfsz
goto
string1
areg
cts
sndwt
txser
breg,f
creg, f
sndlp
;
;
;
;
;
;
;
;
get the byte
save the byte
check the cts input
wait if cts=1
send the byte using the Transmit Routine
increment the table pointer
more bytes to send?
YES, send more bytes
bcf
bcf
bsf
call
bsf
clr
dtr
rts
delay1mS
clr
;
;
;
;
;
NO, place
Force the
Force the
delay for
allow the
btfss
goto
goto
cts
; if cts=1 then MCP2150 is in Normal mode
ctsLP2
; NO, wait for MCP2150 to be ready
NormalOperation ; The MCP2150 in now programmed with new ID,
; and is ready to establish an IR link
;
;
ctsLP2
2002 Microchip Technology Inc.
the MCP2150 in reset
DTR pin low for normal mode
RTS pin high for normal mode
1 ms.
MCP2150 to come out of reset
Preliminary
DS21655B-page 21
MCP2150
2.14
Optical Transceiver
2.15
The MCP2150 requires an infrared transceiver. The
transceiver can be an integrated solution. Table 2-6
shows a list of common manufacturers of integrated
optical transceivers. A typical optical transceiver circuit, using a Vishay/Temic TFDS4500, is shown in
Figure 2-12.
FIGURE 2-12:
R13
47 Ω
C18
.1 µF
The IrDA Standards download page can be found at:
http://www.irda.org/standards/specifications
Some common manufacturers of Optical Transceivers
are shown in Table 2-6.
TABLE 2-6:
TYPICAL OPTICAL
TRANSCEIVER
CIRCUIT
RXIR
(To MCP2150
Pin 3)
+5 V
1
2
3
4
Company
Infineon
+5 V
R11
22 Ω
U6
8
7
6
5
References
COMMON OPTICAL
TRANSCEIVER
MANUFACTURERS
Company Web Site Address
www.infineon.com
Agilent
www.agilent.com
Vishay/Temic
www.vishay.com
Rohm
www.rohm.com
TXIR
(To MCP2150
Pin 2)
TFDS4500
The optical transceiver logic can be implemented with
discrete components for cost savings. Care must be
taken in the design and layout of the photo detect circuit, due to the small signals that are being detected
and their sensitivity to noise. A discrete implementation
of the optical transceiver logic is implemented on the
MCP2120 and MCP2150 Developer’s Kit boards.
Note:
The discrete optical transceiver implementation on the MCP2120 and MCP2150
Developer’s Kit boards may not meet the
IrDA specifications for the physical layer
(IrPHY). Any discrete solution will require
appropriate validation for the user’s
application.
DS21655B-page 22
Preliminary
2002 Microchip Technology Inc.
MCP2150
DEVELOPMENT TOOLS
The MCP2150 is supported by the MCP2120/
MCP2150 Developer’s Kit (order number DM163008).
This kit allows the user to evaluate the operation of the
MCP2150.
Each kit comes with two MCP2120 Developer’s Boards
and one MCP2150 Developer’s Board to demonstrate
transmission/reception of infrared data streams.
Figure 3-1 shows a block diagram of the MCP2150
Developer’s Board.
As can be seen, the user has jumper options for both
the interface to the Host Controller (UART or Header)
and the transceiver solution (Integrated or discrete
component).
FIGURE 3-1:
The UART interface allows a direct connection to a PC
(use a terminal emulation program), or a header, to
allow easy connection to host prototypes (or one of the
Microchip PICDEM™ boards).
The transceiver logic is jumpered to allow the selection
of either a single chip transceiver solution, or a low cost
discrete solution. This low cost discrete solution allows
a lower system cost to be achieved. With the lower cost
come some trade-offs of the IrDA standard physical
layer specifications. These trade-offs need to be evaluated to ensure the characteristics of the component
solution meet the requirements of the system.
This kit comes with two identical MCP2120 Developer’s Boards and a single MCP2150 Developer’s
Board. This allows a complete system (Transmitter and
Receiver) to be implemented with either system
requirement (simple encoder/decoder or IrDA standard
protocol stack plus encoder/decoder).
MCP2150 DEVELOPER’S KIT BLOCK DIAGRAM
Power
Power LED
Power
Supply
9V Battery
SP3238E
MCP2150
DB9
7
Transceiver
+5V GND
4
MCP601
3.0
Component
Integrated
4
Header
2002 Microchip Technology Inc.
Host Interface
Encoder/
Decoder
Preliminary
DS21655B-page 23
MCP2150
NOTES:
DS21655B-page 24
Preliminary
2002 Microchip Technology Inc.
MCP2150
4.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Ambient Temperature under bias ........................................................................................................... –40°C to +125°C
Storage Temperature ............................................................................................................................. –65°C to +150°C
Voltage on VDD with respect to VSS ......................................................................................................... -0.3 V to +6.5 V
Voltage on RESET with respect to VSS .................................................................................................... -0.3 V to +14 V
Voltage on all other pins with respect to VSS ............................................................................... –0.3 V to (VDD + 0.3 V)
Total Power Dissipation (1) ................................................................................................................................... 800 mW
Max. Current out of VSS pin .................................................................................................................................. 300 mA
Max. Current into VDD pin ..................................................................................................................................... 250 mA
Input Clamp Current, IIK (VI < 0 or VI > VDD) ................................................................................................................... ±20 mA
Output Clamp Current, IOK (V0 < 0 or V0 > VDD)............................................................................................................. ±20 mA
Max. Output Current sunk by any Output pin.......................................................................................................... 25 mA
Max. Output Current sourced by any Output pin..................................................................................................... 25 mA
Note 1: Power Dissipation is calculated as follows:
PDIS = V DD x {IDD - ∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOL x IOL)
†NOTICE:
Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 25
MCP2150
VOLTAGE-FREQUENCY GRAPH, -40°C ≤ TA ≤ +85°C
FIGURE 4-1:
6.0
5.5
5.0
VDD
(Volts)
4.5
4.0
3.5
3.0
2.5
0
4
8
10
12
11.0592
16
20
Frequency (MHz)
DS21655B-page 26
Preliminary
2002 Microchip Technology Inc.
MCP2150
4.1
DC Characteristics
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified)
Operating Temperature: -40°C ≤ TA ≤ +85°C (industrial)
DC Specifications
Param.
No.
Sym
D001
VDD
D002
Min
Typ(1)
Max
Units
Supply Voltage
3.0
—
5.5
V
See Figure 4-1
VDR
RAM Data Retention
Voltage (2)
2.0
—
—
V
Device Oscillator/Clock stopped
D003
VPOR
VDD Start Voltage to
ensure Power-on Reset
—
VSS
—
V
D004
SVDD
VDD Rise Rate to
ensure Power-on Reset
0.05
—
—
V/ms
D010
IDD
Supply Current (3)
—
—
—
4.0
2.2
7.0
mA
mA
FOSC = 11.0592 MHz, VDD = 3.0 V
FOSC = 11.0592 MHz, VDD = 5.5 V
D020
IPD
Device Disabled
Current (3, 4)
—
—
—
—
2.2
9
µA
µA
VDD = 3.0 V
VDD = 5.5 V
Characteristic
Conditions
Note 1: Data in the Typical (“Typ”) column is based on characterization results at 25°C. This data is for design
guidance only and is not tested.
2: This is the limit to which VDD can be lowered without losing RAM data.
3: The supply current is mainly a function of the operating voltage and frequency. Pin loading, pin rate and
temperature have an impact on the current consumption.
a)
b)
The test conditions for all IDD measurements are made when device is enabled (EN pin is high):
OSC1 = external square wave, from rail-to-rail; all input pins pulled to V SS, RXIR = VDD,
RESET = VDD;
When device is disabled (EN pin is low), the conditions for current measurements are the same.
4: When the device is disabled (EN pin is low), current is measured with all input pins tied to VDD or VSS and
the output pins driving a high or low level into infinite impedance.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 27
MCP2150
4.1
DC Characteristics (Continued)
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified)
Operating temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating voltage VDD range as described in DC spec Section 4.1.
DC Specifications
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
VSS
—
0.8 V
V
4.5 V ≤ VDD ≤ 5.5 V
VSS
—
0.15 VDD
V
otherwise
VSS
—
0.2 VDD
V
Input Low Voltage
VIL
D030
Input pins
with TTL buffer
(TX, RI, DTR, RTS, and EN)
D030A
D031
with Schmitt Trigger buffer
(BAUD1, BAUD0, and RXIR)
D032
RESET
VSS
—
0.2 VDD
V
D033
OSC1
VSS
—
0.3 VDD
V
Input High Voltage
VIH
D040
Input pins
with TTL buffer
(TX, RI, DTR, RTS, and EN)
D040A
D041
with Schmitt Trigger buffer
(BAUD1, BAUD0, and RXIR)
—
2.0
—
VDD
V
0.25 VDD
+ 0.8
—
VDD
V
0.8 VDD
—
VDD
V
4.5 V ≤ VDD ≤ 5.5 V
otherwise
D042
RESET
0.8 VDD
—
VDD
V
D043
OSC1
0.7 VDD
—
VDD
V
Input pins
—
—
±1
µA
VSS ≤ VPIN ≤ VDD, Pin at
high-impedance
D061
RESET
—
—
±5
µA
VSS ≤ VPIN ≤ VDD
D063
OSC1
—
—
±5
µA
VSS ≤ VPIN ≤ VDD
Input Leakage Current
(Notes 1, 2)
D060
IIL
Note 1: The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
2: Negative current is defined as coming out of the pin.
DS21655B-page 28
Preliminary
2002 Microchip Technology Inc.
MCP2150
4.1
DC Characteristics (Continued)
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified)
Operating temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating voltage VDD range as described in DC spec Section 4.1
DC Specifications
Param
No.
Sym
D080
VOL
Characteristic
Min
Typ
Max
Units
Conditions
TXIR, RX, DSR, CTS, and
CD pins
—
—
0.6
V
IOL = 8.5 mA, VDD = 4.5 V
OSC2
—
—
0.6
V
IOL = 1.6 mA, VDD = 4.5 V
TXIR, RX, DSR, CTS, and
CD pins (Note 1)
VDD - 0.7
—
—
V
IOH = -3.0 mA, VDD = 4.5 V
OSC2
VDD - 0.7
—
—
V
IOH = -1.3 mA, VDD = 4.5 V
OSC2 pin
—
—
15
pF
when external clock is used
to drive OSC1.
All Input or Output pins
—
—
50
pF
Output Low Voltage
D083
Output High Voltage
D090
VOH
D092
Capacitive Loading Specs
on Output Pins
D100
COSC2
D101
CIO
Note 1: Negative current is defined as coming out of the pin.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 29
MCP2150
4.2
Timing Parameter Symbology and Load Conditions
The timing parameter symbols have been created following one of the following formats:
4.2.1
TIMING CONDITIONS
The temperature and voltages specified in Table 4-2 apply to all timing specifications unless otherwise noted. Figure 4-2
specifies the load conditions for the timing specifications.
TABLE 4-1:
SYMBOLOGY
1. TppS2ppS
T
F
Frequency
E
Error
Lowercase letters (pp) and their meanings:
pp
io
Input or Output pin
rx
Receive
bitclk
RX/TX BITCLK
drt
Device Reset Timer
Uppercase letters and their meanings:
S
F
Fall
H
High
I
Invalid (high-impedance)
L
Low
TABLE 4-2:
T
Time
osc
tx
RST
Oscillator
Transmit
Reset
P
R
V
Z
Period
Rise
Valid
High-impedance
AC TEMPERATURE AND VOLTAGE SPECIFICATIONS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise stated):
Operating temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating voltage VDD range as described in DC spec Section 4.1.
AC Specifications
FIGURE 4-2:
2. TppS
LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS
CL
PIN
CL = 50 pF for all pins except OSC2
15 pF for OSC2 when external clock is used to drive OSC1
VSS
DS21655B-page 30
Preliminary
2002 Microchip Technology Inc.
MCP2150
4.3
Timing Diagrams and Specifications
FIGURE 4-3:
EXTERNAL CLOCK TIMING
Q4
Q1
Q3
Q2
Q4
Q1
OSC1
1
3
3
4
4
2
TABLE 4-3:
EXTERNAL CLOCK TIMING REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifcations
Param.
No.
Sym
Characteristic
Min
Typ(1)
Max
Units
Conditions
1
TOSC
External CLKIN Period (2, 3)
90.422
90.422
—
—
90.422
—
ns
ns
Device Operation
Disable Clock for low power
Oscillator Period (2)
90.422
—
90.422
ns
11.0592
—
11.0592
MHz
1A
FOSC External CLKIN
Frequency (2, 3)
Oscillator Frequency (2)
11.0592
—
11.0592
MHz
FERR
Error in Frequency
—
—
± 0.01
%
1C
ECLK
External Clock Error
—
—
± 0.01
%
4
TosR, Clock in (OSC1)
TosF Rise or Fall Time
—
—
15
ns
1B
Note 1: Data in the Typical (“Typ”) column is at 5 V, 25°C unless otherwise stated. These parameters are for design
guidance only and are not tested.
2: All specified values are based on oscillator characterization data under standard operating conditions.
Exceeding these specified limits may result in unstable oscillator operation and/or higher than expected
current consumption. When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for
all devices.
3: A duty cycle of no more than 60% (High time/Low time or Low time/High time) is recommended for external
clock inputs.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 31
MCP2150
FIGURE 4-4:
OUTPUT WAVEFORM
Q1
Q4
Q2
Q3
OSC1
Output Pin
New Value
Old Value
20, 21
Note:
TABLE 4-4:
Refer to Figure 4-2 for load conditions.
OUTPUT TIMING REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
Characteristic
20
ToR
ToF
21
Min
Typ(1)
Max
Units
RX and TXIR pin rise time (2)
—
10
25
ns
(2)
—
10
25
ns
RX and TXIR pin fall time
Conditions
Note 1: Data in the Typical (“Typ”) column is at 5 V, 25°C unless otherwise stated.
2: See Figure 4-2 for loading conditions.
DS21655B-page 32
Preliminary
2002 Microchip Technology Inc.
MCP2150
FIGURE 4-5:
RESET AND DEVICE RESET TIMING
VDD
RESET
30
Reset
Detected
33
PWRT
Timeout
32
OSC
Timeout
Internal
RESET
34
34
Output Pin
TABLE 4-5:
RESET AND DEVICE RESET REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
Characteristic
Min
Typ(1)
Max
Units
30
TRSTL RESET Pulse Width (low)
2000
—
—
ns
32
TOST
1024
—
1024
TOSC
28
72
132
ms
—
—
2
µs
33
34
Oscillator Start-up Timer Period
TPWRT Power up Timer Period
TIOZ
Output High-impedance from
RESET Low or device Reset
Conditions
VDD = 5.0 V
VDD = 5.0 V
Note 1: Data in the Typical (“Typ”) column is at 5 V, 25°C unless otherwise stated.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 33
MCP2150
FIGURE 4-6:
UART ASYNCHRONOUS TRANSMISSION WAVEFORM
Start Bit
Data Bit
IR100
IR100
Data Bit
Data Bit
IR100
IR100
TX pin
IR103
IR103
Note:
Refer to Figure 4-2 for load conditions.
TABLE 4-6:
UART ASYNCHRONOUS TRANSMISSION REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
IR100
Sym
Characteristic
TTXBIT Transmit Baud rate
Min
Typ
Max
Units
1152
—
1152
TOSC
BAUD2:BAUD0 = 00
576
—
576
TOSC
BAUD2:BAUD0 = 01
192
—
192
TOSC
BAUD2:BAUD0 = 10
BAUD2:BAUD0 = 11
96
—
96
TOSC
IR101
ETXBIT Transmit (TX pin) Baud rate
Error (into MCP2150)
—
—
±2
%
IR102
ETXIRBIT Transmit (TXIR pin) Baud rate
Error (out of MCP2150) (1)
—
—
±1
%
IR103
TTXRF TX pin rise time and fall time
—
—
25
ns
Conditions
Note 1: This error is not additive to IR101 parameter.
DS21655B-page 34
Preliminary
2002 Microchip Technology Inc.
MCP2150
FIGURE 4-7:
UART ASYNCHRONOUS RECEIVE TIMING
Start Bit
Data Bit
Data Bit
Data Bit
IR110
IR110
IR110
IR110
RX pin
IR113
IR113
Note:
TABLE 4-7:
Refer to Figure 4-2 for load conditions.
UART ASYNCHRONOUS RECEIVE REQUIREMENTS
Electrical Characterisitcs:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
IR110
Sym
Characteristic
TRXBIT Receive Baud Rate
Min
Typ
Max
Units
1152
—
1152
TOSC
BAUD2:BAUD0 = 00
576
—
576
TOSC
BAUD2:BAUD0 = 01
192
—
192
TOSC
BAUD2:BAUD0 = 10
BAUD2:BAUD0 = 11
96
—
96
TOSC
IR111
ERXBIT Receive (RXIR pin) Baud rate
Error (into MCP2150)
—
—
±1
%
IR112
ERXBIT Receive (RX pin) Baud rate
Error (out of MCP2150) (1)
—
—
±1
%
IR113
TTXRF RX pin rise time and fall time
—
—
25
ns
Conditions
Note 1: This error is not additive to the IR111 parameter.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 35
MCP2150
FIGURE 4-8:
TXIR WAVEFORMS
Start Bit
Data bit 7
Data bit 6
Data bit 5
Data bit ...
IR100A
BITCLK
IR122
IR122
IR122
IR122
IR122
IR122
TXIR
IR121
0
TABLE 4-8:
1
0
0
1
0
TXIR REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
Param.
No.
Sym
IR100A
TTXIRBIT
Characteristic
Transmit Baud Rate
Min
Typ
Max
Units
1152
—
1152
TOSC
BAUD = 9600
576
—
576
TOSC
BAUD = 19200
288
—
288
TOSC
BAUD = 38400
192
—
192
TOSC
BAUD = 57600
BAUD = 115200
96
—
96
TOSC
IR121
TTXIRPW
TXIR pulse width
24
—
24
TOSC
IR122
TTXIRP
TXIR bit period (1)
—
16
—
TBITCLK
Conditions
Note 1: TBITCLK = TTXBIT/16.
DS21655B-page 36
Preliminary
2002 Microchip Technology Inc.
MCP2150
FIGURE 4-9:
RXIR WAVEFORMS
Start Bit
Data bit 7
Data bit 6
Data bit 5
Data bit ...
IR131B
IR131B
IR131B
IR131B
0
Data bit 6
0
Data bit 5
1
Data bit ...
IR110A
BITCLK
RXIR
IR131A
IR131B
0
Start Bit
TABLE 4-9:
1
Data bit 7
Param.
No.
Sym
IR110A
TRXIRBIT
IR132
0
RXIR REQUIREMENTS
Electrical Characteristics:
Standard Operating Conditions (unless otherwise specified):
Operating Temperature: -40°C ≤ TA ≤ +85°C (industrial)
Operating Voltage VDD range is described in Section 4.1
AC Specifications
IR131A
IR131B
Characteristic
Receive Baud Rate
Min
Typ
Max
Units
1152
—
1152
TOSC
BAUD = 9600
576
—
576
TOSC
BAUD = 19200
288
—
288
TOSC
BAUD = 38400
192
—
192
TOSC
BAUD = 57600
BAUD = 115200
96
—
96
TOSC
TRXIRPW
RXIR pulse width
2
—
24
TOSC
TRXIRP
RXIR bit period (1)
—
16
—
TBITCLK
Conditions
Note 1: TBITCLK = TRXBIT/16.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 37
MCP2150
NOTES:
DS21655B-page 38
Preliminary
2002 Microchip Technology Inc.
MCP2150
5.0
DC AND AC CHARACTERISTICS GRAPHS AND TABLES
Not available at this time.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 39
MCP2150
NOTES:
DS21655B-page 40
Preliminary
2002 Microchip Technology Inc.
MCP2150
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
18-Lead PDIP (300 mil)
Example:
MCP2150-I/P
XXXXXXXXXXXXXXXXX
XXXXXYYWWNNN
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
XXXXXYYWWNNN
18-Lead SOIC (300 mil)
Example:
MCP2150-I/SO
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
XXXXXYYWWNNN
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXX
XXXXXYYWWNNN
20-Lead SSOP (209 mil, 5.30 mm)
XXXXXXXXXXX
MCP2150I/SS
XXXXXXXXXXX
XXXXXXXXXXX
XXXYYWWNNN
Legend:
Note:
*
Example:
XX...X
YY
WW
NNN
XXXYYWWNNN
Customer specific information*
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard device marking consists of Microchip part number, year code, week code and traceability code.
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 41
MCP2150
18-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
α
1
E
A2
A
L
c
A1
B1
β
p
B
eB
Units
Dimension Limits
n
p
INCHES*
NOM
18
.100
.140
.155
.115
.130
.015
.300
.313
.240
.250
.890
.898
.125
.130
.008
.012
.045
.058
.014
.018
.310
.370
5
10
5
10
MIN
MAX
MILLIMETERS
NOM
18
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
22.61
22.80
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
Number of Pins
Pitch
Top to Seating Plane
A
.170
Molded Package Thickness
A2
.145
Base to Seating Plane
A1
Shoulder to Shoulder Width
E
.325
Molded Package Width
E1
.260
Overall Length
D
.905
Tip to Seating Plane
L
.135
c
Lead Thickness
.015
Upper Lead Width
B1
.070
Lower Lead Width
B
.022
eB
Overall Row Spacing
§
.430
α
Mold Draft Angle Top
15
β
Mold Draft Angle Bottom
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-007
DS21655B-page 42
Preliminary
MAX
4.32
3.68
8.26
6.60
22.99
3.43
0.38
1.78
0.56
10.92
15
15
2002 Microchip Technology Inc.
MCP2150
18-Lead Plastic Small Outline (SO) – Wide, 300 mil (SOIC)
E
p
E1
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
A1
MIN
.093
.088
.004
.394
.291
.446
.010
.016
0
.009
.014
0
0
INCHES*
NOM
18
.050
.099
.091
.008
.407
.295
.454
.020
.033
4
.011
.017
12
12
MAX
.104
.094
.012
.420
.299
.462
.029
.050
8
.012
.020
15
15
MILLIMETERS
NOM
18
1.27
2.36
2.50
2.24
2.31
0.10
0.20
10.01
10.34
7.39
7.49
11.33
11.53
0.25
0.50
0.41
0.84
0
4
0.23
0.27
0.36
0.42
0
12
0
12
MIN
MAX
2.64
2.39
0.30
10.67
7.59
11.73
0.74
1.27
8
0.30
0.51
15
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-013
Drawing No. C04-051
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 43
MCP2150
20-Lead Plastic Shrink Small Outline (SS) – 209 mil, 5.30 mm (SSOP)
E
E1
p
D
B
2
1
n
α
c
A2
A
φ
L
A1
β
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Foot Length
Lead Thickness
Foot Angle
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
A
A2
A1
E
E1
D
L
c
φ
B
α
β
MIN
.068
.064
.002
.299
.201
.278
.022
.004
0
.010
0
0
INCHES*
NOM
20
.026
.073
.068
.006
.309
.207
.284
.030
.007
4
.013
5
5
MAX
.078
.072
.010
.322
.212
.289
.037
.010
8
.015
10
10
MILLIMETERS
NOM
20
0.65
1.73
1.85
1.63
1.73
0.05
0.15
7.59
7.85
5.11
5.25
7.06
7.20
0.56
0.75
0.10
0.18
0.00
101.60
0.25
0.32
0
5
0
5
MIN
MAX
1.98
1.83
0.25
8.18
5.38
7.34
0.94
0.25
203.20
0.38
10
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-150
Drawing No. C04-072
DS21655B-page 44
Preliminary
2002 Microchip Technology Inc.
MCP2150
APPENDIX A:
REVISION HISTORY
Revision A
• This is a new data sheet
Revision B
•
•
•
•
Updated feature list
Enhanced pin descriptions. Refer to Table 1-2
Added description for programmable device ID
Standardize use of terms for Host Controller and
Primary Device
2002 Microchip Technology Inc.
Preliminary
DS21655B-page 45
MCP2150
NOTES:
DS21655B-page 46
Preliminary
2002 Microchip Technology Inc.
MCP2150
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web (WWW) site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Explorer. Files are also available for FTP download
from our FTP site.
Connecting to the Microchip Internet Web Site
Systems Information and Upgrade Hot Line
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive any currently available upgrade kits.The
Hot Line Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
013001
The Microchip web site is available by using your
favorite Internet browser to attach to:
www.microchip.com
The file transfer site is available by using an FTP service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
2002 Microchip Technology Inc.
DS21655B-page47
MCP2150
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this Data Sheet.
To:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Device: MCP2150
Y
N
Literature Number: DS21655B
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this data sheet easy to follow? If not, why?
4. What additions to the data sheet do you think would enhance the structure and subject?
5. What deletions from the data sheet could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
8. How would you improve our software, systems, and silicon products?
DS21655B-page48
2002 Microchip Technology Inc.
MCP2150
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Package
Device
MCP2150: Infrared Communications Controller
MCP2150T: Infrared Communications Controller
(Tape and Reel)
Temperature Range
I
=
Package
P
SO
SS
=
=
=
-40°C to
Examples:
a)
MCP2150-I/P = Industrial Temp.,
PDIP packaging
b)
MCP2150-I/SO = Industrial Temp.,
SOIC package
c)
MCP2150T-I/SS = Tape and Reel,
Industrial Temp., SSOP package
+85°C
Plastic DIP (300 mil, Body), 18-lead
Plastic SOIC (300 mil, Body), 18-lead
Plastic SSOP (209 mil, Body), 20-lead
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2002 Microchip Technology Inc.
DS21655B-page 49
MCP2150
NOTES:
DS21655B-page 50
2002 Microchip Technology Inc.
MCP2150
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, MXDEV, PIC, PICmicro,
PICMASTER, PICSTART, PRO MATE, SEEVAL and The
Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and
other countries.
dsPIC, dsPICDEM.net, ECONOMONITOR, FanSense,
FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP,
ICEPIC, microPort, Migratable Memory, MPASM, MPLIB,
MPLINK, MPSIM, MXLAB, PICC, PICDEM, PICDEM.net,
rfPIC, Select Mode and Total Endurance are trademarks of
Microchip Technology Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro ® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21655B-page 51
M
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
Corporate Office
Australia
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Rocky Mountain
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Shenzhen 518001, China
Tel: 86-755-2350361 Fax: 86-755-2366086
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Microchip Technology Inc.
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#07-02 Prime Centre
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Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Denmark
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France
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Germany
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Italy
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United Kingdom
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Austria
Microchip Technology Austria GmbH
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
05/16/02
DS21655B-page 52
2002 Microchip Technology Inc.