SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS073H – SEPTEMBER 1991 – REVISED AUGUST 2005 FEATURES • • • • • • • • SN54ABT16244 . . . WD PACKAGE SN74ABT16244A . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) Members of the Texas Instruments Widebus™ Family State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JESD 70 Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout High-Drive Outputs (–32-mA IOH, 64-mA IOL) Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings 1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE DESCRIPTION The SN54ABT16244 and SN74ABT16244A are 16-bit buffers and line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical OE (active-low output-enable) inputs. 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT16244 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ABT16244A is characterized for operation from –40°C to 85°C. FUNCTION TABLE (EACH BUFFER) INPUTS OE A OUTPUT Y L H H L L L H X Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, EPIC-IIB are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1991–2005, Texas Instruments Incorporated On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS073H – SEPTEMBER 1991 – REVISED AUGUST 2005 LOGIC SYMBOL(1) 1OE 2OE 1 48 25 3OE 4OE 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 3A1 3A2 3A3 3A4 4A1 4A2 4A3 4A4 24 47 EN1 EN2 EN3 EN4 1 1 2 46 3 44 5 43 6 41 8 40 1 2 9 38 11 37 12 36 13 35 1 3 14 33 16 32 17 30 1 4 19 29 20 27 22 26 23 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 3Y1 3Y2 3Y3 3Y4 4Y1 4Y2 4Y3 4Y4 (1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS073H – SEPTEMBER 1991 – REVISED AUGUST 2005 LOGIC DIAGRAM (POSITIVE LOGIC) 1OE 1A1 1A2 1A3 1A4 2OE 2A1 2A2 2A3 2A4 1 3OE 47 2 46 3 44 5 43 6 1Y1 3A1 1Y2 3A2 1Y3 3A3 1Y4 3A4 48 4OE 41 8 40 9 38 11 37 12 2Y1 4A1 2Y2 4A2 2Y3 4A3 2Y4 4A4 25 36 13 35 14 33 16 32 17 3Y1 3Y2 3Y3 3Y4 24 30 19 29 20 27 22 26 23 4Y1 4Y2 4Y3 4Y4 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 7 V VI Input voltage range (2) –0.5 7 V VO Voltage range applied to any output in the high or power-off state –0.5 5.5 V IO Current into any output in the low state IIK IOK SN54ABT16244 96 128 Input clamp current VI < 0 –18 mA Output clamp current VO < 0 –50 mA Package thermal impedance (3) Tstg Storage temperature range DGG package 89 DGV package 93 DL package (2) (3) mA SN74ABT16244A θJA (1) UNIT °C/W 94 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD 51. 3 SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS073H – SEPTEMBER 1991 – REVISED AUGUST 2005 Recommended Operating Conditions (1) SN54ABT16244 VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage VI Input voltage IOH High-level output current IOL Low-level output current ∆t/∆v Input transition rise or fall rate TA Operating free-air temperature (1) SN74ABT16244A MIN MAX MIN MAX 4.5 5.5 4.5 5.5 2 UNIT V 2 V 0.8 0 0.8 VCC Outputs enabled –55 0 V VCC V –24 –32 mA 48 64 mA 10 10 ns/V 85 °C 125 –40 All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS MIN TYP (2) SN54ABT16244 MAX MIN SN74ABT16244A MIN II = –18 mA VCC = 4.5 V, IOH = –3 mA 2.5 2.5 2.5 VCC = 5 V, IOH = –3 mA 3 3 3 IOH = –24 mA 2 2 IOH = –32 mA 2 (3) VCC = 4.5 V –1.2 MAX VCC = 4.5 V, VCC = 4.5 V VOL TA = 25°C (1) –1.2 UNIT V V 2 IOL = 48 mA 0.55 IOL = 64 mA 0.55 (3) Vhys –1.2 MAX 0.55 0.55 100 V mV II VCC = 5.5 V, VI = VCC or GND ±1 ±1 ±1 µA IOZH VCC = 5.5 V, VO = 2.7 V 10 (4) 10 10 (4) µA IOZL VCC = 5.5 V, VO = 0.5 V –10 (4) –10 –10 (4) µA Ioff VCC = 0, VI or VO ≤ 5.5 V ±100 µA ICEX VCC = 5.5 V, VO = 5.5 V Outputs high 50 µA IO (5) VCC = 5.5 V, VO = 2.5 V –180 mA ICC VCC = 5.5 V, IO = 0, VI = VCC or GND ∆ICC (6) ±100 50 –50 –100 –180 50 –50 –180 –50 Outputs high 3 2 3 Outputs low 32 32 32 Outputs disabled 3 2 3 VCC = 5.5 V, Outputs enabled One input at 3.4 V, Other inputs at Outputs disabled VCC or GND 0.05 1.5 0.05 Data inputs 0.05 1 0.05 Control inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND 0.05 1.5 0.05 mA mA Ci VI = 2.5 V or 0.5 V 3 pF Co VO = 2.5 V or 0.5 V 6 pF (1) (2) (3) (4) (5) (6) 4 Characteristics for TA = 25°C apply to the SN74ABT16244A only. All typical values are at VCC = 5 V. On products compliant to MIL-PRF-38535, this parameter does not apply. This data-sheet limit may vary among suppliers. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS073H – SEPTEMBER 1991 – REVISED AUGUST 2005 Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1 ) SN54ABT16244 PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A Y OE Y OE Y VCC = 5 V, TA = 25°C MIN MAX MIN TYP MAX 0.7 2.3 3.2 0.7 3.6 0.5 2.6 3.7 0.5 4.2 0.7 3 4 0.7 4.9 0.9 3.2 5.5 0.9 6.5 1.7 3.6 5 1.7 6 1.5 2.9 4.7 1.5 5.7 UNIT ns ns ns Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1 ) SN74ABT16244A PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A or B Y OE Y OE Y VCC = 5 V, TA = 25°C MIN MAX MIN TYP MAX 1 2.3 3.2 1 3.5 1 2.6 3.7 1 4.1 1 3 3.8 1 4.8 1 3.2 4 1 4.8 1 3.6 4.4 1 4.8 1 2.9 3.7 1 4.1 UNIT ns ns ns 5 SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS073H – SEPTEMBER 1991 – REVISED AUGUST 2005 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test S1 7V Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 3V th 3V Input 1.5 V 1.5 V 0V Data Input 1.5 V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION 3V 1.5 V Input 1.5 V 0V tPLH 1.5 V 1.5 V VOL tPHL 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 1.5 V 0V tPZL tPLZ Output Waveform 1 S1 at 7 V (see Note B) tPLH VOH Output 3V Output Control tPHL VOH Output 1.5 V Output Waveform 2 S1 at Open (see Note B) 1.5 V 3.5 V VOL + 0.3 V VOL tPHZ tPZH 1.5 V VOH − 0.3 V VOH ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 1 5962-9317401MXA ACTIVE CFP WD 48 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ABT16244ADGVRE4 ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16244ADGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16244ADGVR ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16244ADL ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16244ADLG4 ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16244ADLR ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT16244ADLRG4 ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54ABT16244WD ACTIVE CFP WD 48 TBD Call TI MSL Peak Temp (3) 74ABT16244ADGGRG4 1 TBD Lead/Ball Finish Call TI Level-NC-NC-NC Level-NC-NC-NC (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997 WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 48 LEADS SHOWN 0.120 (3,05) 0.075 (1,91) 0.009 (0,23) 0.004 (0,10) 1.130 (28,70) 0.870 (22,10) 0.370 (9,40) 0.250 (6,35) 0.390 (9,91) 0.370 (9,40) 0.370 (9,40) 0.250 (6,35) 48 1 0.025 (0,635) A 0.014 (0,36) 0.008 (0,20) 25 24 NO. OF LEADS** 48 56 A MAX 0.640 (16,26) 0.740 (18,80) A MIN 0.610 (15,49) 0.710 (18,03) 4040176 / D 10/97 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification only Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO -146AA GDFP1-F56 and JEDEC MO -146AB POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0.025 (0,635) 0.0135 (0,343) 0.008 (0,203) 48 0.005 (0,13) M 25 0.010 (0,25) 0.005 (0,13) 0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03) Gage Plane 0.010 (0,25) 1 0°–ā8° 24 0.040 (1,02) A 0.020 (0,51) Seating Plane 0.110 (2,79) MAX 0.004 (0,10) 0.008 (0,20) MIN PINS ** 28 48 56 A MAX 0.380 (9,65) 0.630 (16,00) 0.730 (18,54) A MIN 0.370 (9,40) 0.620 (15,75) 0.720 (18,29) DIM 4040048 / E 12/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MO-118 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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