PULSECORE PCS3P73U00A

PCS3P73U00A
March 2008
rev 0.2
USB 2.0 Peak EMI reduction IC
General Features
•
•
coupled to XIN / CLKIN) and locks on to it delivering a 1x
modulated clock output. PCS3P73U00A has a Frequency
•
•
1x Peak EMI Reduction IC
Input frequency:
10MHz - 60MHz @ 2.5V
10MHz - 70MHz @ 3.3V
Output frequency:
10MHz - 60MHz @ 2.5V
10MHz - 70MHz @ 3.3V
Supply Voltage: 2.5V±0.2V
3.3V ±0.3V
•
Analog Spread Selection up to ±0.5%
•
ModRate selection option
•
Commercial temperature range
•
8pin TSSOP, SOIC and TDFN(2X2) COL Package
•
•
Conforms to USB2.0 compliance standards
The First True Drop-in Solution
•
Selection (FS) control that facilitates selecting one of the
two frequency ranges within the operating frequency range.
Refer to the frequency Selection table for details.
PCS3P73U00A has an SSEXTR pin to select different
deviations depending upon the value of an external resistor
connected between SSEXTR and GND. Modulation Rate
(MR) control selects two different Modulation Rates.
PCS3P73U00A operates from a 3.3V / 2.5V supply and is
available in an 8 pin TSSOP, SOIC, and TDFN(2X2) COL
packages, over Commercial temperature range.
Applications
Product Description
PCS3P73U00A is targeted for USB applications.
Refer to SSEXTR Resistance Table for USB2.0
PCS3P73U00A is a versatile, 3.3V / 2.5V Peak EMI
compliance for commonly used frequencies.
reduction IC. PCS3P73U00A accepts an input clock either
from a Crystal or from an external reference (AC or DC
Block Diagram
FS
VDD
SSEXTR
XIN / CLKIN
XOUT
Crystal
Oscillator
PLL
MR
ModOUT
GND
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
PCS3P73U00A
March 2008
rev 0.2
Pin Configuration
XIN / CLKIN
1
XOUT
2
8
VDD
7
SSEXTR
FS 3
6
MR
GND 4
5
ModOUT
PCS3P73U00A
Pin Description
Pin # Pin Name Pin Type
1
XIN /
CLKIN
Description
I
Crystal connection or external reference clock input.
Crystal connection. If using an external reference, this pin should be left open.
2
XOUT
O
3
FS
I
Frequency Select.Pull LOW to select Low Frequency range. Selects High Frequency
range when pulled HIGH. Has an internal pull-up resistor
(see Frequency Selection table for details)
4
GND
P
Ground
5
ModOUT
O
Buffered Modulated clock output
MR
I
7
SSEXTR
I
Analog Spread Selection through external resistor to GND.
8
VDD
P
3.3V / 2.5V supply Voltage
6
Modulation Rate Select. When LOW selects Low Modulation Rate.
Selects High Modulation Rate when pulled HIGH. Has an internal pull-down resistor
Frequency Selection table
VDD(V)
2.5V
3.3V
FS
Frequency (MHz)
0
10-20
1
20-60
0
10-27
1
20-70
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A
March 2008
rev 0.2
Absolute Maximum Rating
Symbol
Rating
Unit
VDD
Voltage on any pin with respect to Ground
Parameter
-0.5 to +4.6
V
TSTG
Storage temperature
-65 to +125
°C
Ts
Max. Soldering Temperature (10 sec)
260
°C
TJ
Junction Temperature
150
°C
TDV
Static Discharge Voltage (As per JEDEC STD22- A114-B)
2
KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Parameter
VDD(3.3V)
VDD(2.5V)
Description
Min
Max
Unit
Supply Voltage
3.0
3.6
V
Supply Voltage
2.3
2.7
V
0
+70
°C
TA
Operating Temperature (Ambient Temperature)
CL
Load Capacitance
10
pF
CIN
Input Capacitance
7
pF
Electrical Characteristics for 3.3V Supply voltage
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
3.0
3.3
3.6
V
0.8
V
VDD
Supply Voltage
VIL
Input LOW Voltage
VIH
Input HIGH Voltage
IIL
Input LOW Current
VIN = 0V
-50
µA
IIH
Input HIGH Current
VIN = VDD
50
µA
VOL
Output LOW Voltage
IOL =8mA
0.4
V
VOH
Output HIGH Voltage
IOH = -8mA
ICC
Static Supply Current
XIN / CLKIN pulled to GND
IDD
Dynamic Supply Current
Unloaded outputs
Zo
Output Impedance
2.0
V
2.4
V
750
FS=0; @ 12MHz
8
FS=1; @ 48MHz
12
30
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
µA
mA
Ω
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Switching Characteristics for 3.3 Supply Voltage
Parameter
Test Conditions
Input Frequency
ModOUT
1,2
Duty Cycle
1,2
Rise Time
1,2
Fall Time
Cycle-Cycle Jitter
1,2
2
PLL Lock Time
Min
Typ
Max
FS=0
10
12
27
FS=1
20
48
70
FS=0
10
12
27
FS=1
20
48
70
Measured at VDD /2
45
50
55
Unit
MHz
%
Measured between 20% to 80%
1.1
nS
Measured between 80% to 20%
0.7
nS
±150
pS
Loaded outputs
Stable power supply, valid clock presented on XIN / CLKIN pin
3
mS
Notes: 1. All parameters are specified with 10pF loaded outputs.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production
Electrical Characteristics for 2.5V Supply voltage
Parameter
Description
VDD
Supply Voltage
Test Conditions
Min
Typ
Max
Unit
2.3
2.5
2.7
V
0.7
V
VIL
Input LOW Voltage
VIH
Input HIGH Voltage
IIL
Input LOW Current
VIN = 0V
-50
µA
IIH
Input HIGH Current
VIN = VDD
50
µA
VOL
Output LOW Voltage
IOL = 8mA
0.6
V
VOH
Output HIGH Voltage
IOH = -8mA
ICC
Static Supply Current
XIN / CLKIN pulled to GND
IDD
Dynamic Supply Current
Unloaded outputs
Zo
Output Impedance
1.7
V
1.8
V
500
FS=0; @ 12MHz
5
FS=1; @ 48MHz
8
µA
mA
Ω
40
Switching Characteristics for 2.5V Supply Voltage
Parameter
Test Conditions
Input Frequency
ModOUT
3,4
Duty Cycle
3,4
Rise Time
Fall Time3,4
Cycle-Cycle Jitter
2
PLL Lock Time
3,4
Min
Typ
Max
FS=0
10
12
20
FS=1
20
48
60
FS=0
10
12
20
FS=1
20
48
60
Measured at VDD /2
45
50
55
Unit
MHz
%
Measured between 20% to 80%
1.6
nS
Measured between 80% to 20%
0.8
nS
±200
pS
Loaded outputs
Stable power supply, valid clock presented on XIN / CLKIN pin
3
mS
Notes: 3. All parameters are specified with 10pF loaded outputs.
4. Parameter is guaranteed by design and characterization. Not 100% tested in production
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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rev 0.2
R
R1 = 510Ω
Crystal
C1 = 27 pF
C2 = 27 pF
Fig1: Typical Crystal Interface Circuit
Note: For AC Coupled Interface refer to Application Brief:CT100801
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
48MHz
Frequency tolerance
± 50 ppm or better at 25°C
Operating temperature range
-25°C to +85°C
Storage temperature
-40°C to +85°C
Load capacitance
18pF
Shunt capacitance
7pF maximum
ESR
25 Ω
RCompliance
The value of the compliance resistor , RCompliance sets the
For settings above 1000ppm the USB2.0 compliance
USB2.0 signaling rate (frequency) deviation to 1000ppm
pass/fail
peak-to-peak (+/-500ppm). It causes a -4dB peak power
functionality is maintained upto 3000ppm peak-to-peak
EMI reduction at the 480MHz fundamental USB2.0
signaling rate (frequency) deviation. The EMI tradeoff in
frequency. Higher harmonics are reduced more.
the
becomes
system
is
gradually
intermittent.
attenuation/compliance.
USB2.0
While
fully
functional (and compliant intermittent) the 2000ppm
If the RCompliance is set to a lower value than its
frequency deviation can provide -7dB of EMI attenuation
compliance limit, it will set the USB2.0 signaling rate
at the 480MHz fundamental.
(frequency) deviation to above 1000ppm peak-to-peak.
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A
March 2008
rev 0.2
-7dB
-4dB
-2dB
0
5
10
15
20
25
30
35
40
2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
12MHz_FS=0
15MHz_FS=0
24MHz_FS=0
24MHz_FS=1
25MHz_FS=0
25MHz_FS=1
30MHz_FS=1
48MHz_FS=1
USB Compliance
-7dB
-4dB
0
10
20
30
Resistance (KOhms)
40
50
60
70
80
90
480MHz Fundamental Frequency Attenuation[dB]
12MHz_FS=0
15MHz_FS=0
24MHz_FS=0
24MHz_FS=1
25MHz_FS=0
25MHz_FS=1
30MHz_FS=1
48MHz_FS=1
USB 2.0 Compliance
Pk-Pk Deviation (PPM)
2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
Deviation Vs Resistance (MR=1)
480MHz Fundamental Frequency Attenuation[dB]
Pk-Pk Deviation (PPM)
Deviation Vs Resistance (MR=0)
-2dB
100
Resistance (KOhms)
Fig2: Deviation VsResistance
for USB 2.0 Compliance (MR=0)
Fig3: Deviation VsResistance
for USB 2.0 Compliance (MR=1)
SSEXTR Resistance Table for USB2.0 compliance (RCompliance)
VDD=3.3V; MR=0
VDD=3.3V; MR=1
Frequency
(MHz)
FS
(MHz)
SSEXTR*
Resistance (KΩ)
Frequency
(MHz)
FS
(MHz)
SSEXTR*
Resistance (KΩ)
12
15
0
0
0
10
8.87
6.81
12
15
24
0
0
0
17.8
13
6.49
1
0
13.7
6.98
1
39.2
25
1
13.7
0
1
6.49
35.7
30
1
12.1
30
1
29.4
48
1
10
48
1
19.1
Frequency
(MHz)
FS
(MHz)
SSEXTR*
Resistance (KΩ)
Frequency
(MHz)
FS
(MHz)
SSEXTR*
Resistance (KΩ)
12
15
24
25
30
0
0
1
1
1
10
8.87
13.7
13.7
12.1
12
15
24
25
0
0
1
1
17.8
13
39.2
35.7
30
1
29.4
48
1
10
48
1
19.1
24
25
VDD=2.5V; MR=0
VDD=2.5V; MR=1
*:Standard 1% tolerance Resistors
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A
March 2008
rev 0.2
Fig4:Eye Diagram example (480MHz) computed from the USB-IF test pattern during USB2.0 compliance verification of
an existing HOST PHY ASIC clocked at 48MHz by PCS3P73U00A.
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
7 of 13
PCS3P73U00A
March 2008
rev 0.2
Fig5: EMI Radiated Emission Test Circuit (requires USB PHY ASIC, not shown here)
P
C
S
3
P
7
3
U
0
0
A
XIN /
CLKIN
CL
Xtal
XOUT
CL
ModOUT
XIN /CLKIN
XOUT
USB
ASIC
Fig6: Typical Application Circuit
Switching Waveforms
Duty Cycle Timing
t1
t2
VDD/2
VDD/2
VDD/2
OUTPUT
Output Rise/Fall Time
80%
80%
20%
VDD
20%
OUTPUT
0V
t3
t4
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A
March 2008
rev 0.2
Package Information
8-lead TSSOP (4.40-MM Body)
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Min
A
Millimeters
Max
Min
0.043
Max
1.10
A1
0.002
0.006
0.05
0.15
A2
0.033
0.037
0.85
0.95
B
0.008
0.012
0.19
0.30
c
0.004
0.008
0.09
0.20
D
0.114
0.122
2.90
3.10
E
0.169
0.177
4.30
4.50
e
0.026 BSC
0.65 BSC
H
0.252 BSC
6.40 BSC
L
0.020
0.028
0.50
0.70
θ
0°
8°
0°
8°
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A
March 2008
rev 0.2
8-Pin SOIC
H
E
D
A2
A
C
D
θ
e
A1
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A1
0.004
0.010
0.10
0.25
A
0.053
0.069
1.35
1.75
A2
0.049
0.059
1.25
1.50
B
0.012
0.020
0.31
0.51
C
0.007
0.010
0.18
0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L
0.016
0.050
0.41
1.27
θ
0°
8°
0°
8°
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A
March 2008
rev 0.2
TDFN COL 2x2 8L package Outline drawing
Dimensions
Symbol
A
A3
b
Inches
Min
Max
Millimeters
Min
Max
0.027
0.70
0.0315
0.008 BSC
0.008
0.012
0.80
0.203 BSC
0.20
0.30
D
0.079 BSC
2.00 BSC
E
0.078 BSC
2.00 BSC
e
L
0.020 BSC
0.020
0.024
0.50 BSC
0.50
0.60
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A
March 2008
rev 0.2
Ordering Codes
Marking
Part Number
PCS3P73U00AG-08-SR
3P73U00AG
Package
Temperature
8- Pin SOIC, Tape & Reel, Green
Commercial
PCS3P73U00AG -08-ST
3P73U00AG
8- Pin SOIC, Tube, Green
Commercial
PCS3P73U00AG -08-TR
3P73U00AG
8- Pin TSSOP, Tape & Reel, Green
Commercial
PCS3P73U00AG -08-TT
3P73U00AG
8- Pin TSSOP, Tube, Green
Commercial
PCS3P73U00AG -08-CR
AG1LL
8- Pin 2-mm TDFN, COL-Tape & Reel, Green
Commercial
LL = 2 Character LOT #
Device Ordering Information
P C S 3 P 7 3 U 0 0 A G - 0 8 - S T
R = Tape & Reel, T = Tube or Tray
O = TSOT23
S = SOIC
T = TSSOP
A = SSOP
V = TVSOP
B = BGA
Q = QFN
U = MSOP
E = TQFP
L = LQFP
U = MSOP
P = PDIP
D = QSOP
X = SC-70
J=TSOT26
C=TDFN (2X2) COL
DEVICE PIN COUNT
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE, LEAD FREE, and RoHS
PART NUMBER
X= Automotive
I= Industrial
P or n/c = Commercial
(-40C to +125C) (-40C to +85C)
(0C to +70C)
1 = Reserved
2 = Non PLL based
3 = EMI Reduction
4 = DDR support products
5 = STD Zero Delay Buffer
6 = Power Management
7 = Power Management
8 = Power Management
9 = Hi Performance
0 = Reserved
PulseCore Semiconductor Mixed Signal Product
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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PCS3P73U00A
March 2008
rev 0.2
Copyright © PulseCore Semiconductor
All Rights Reserved
Part Number: PCS3P73U00A
Document Version: 0.2
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200
Campbell, CA 95008
Tel: 408-879-9077
Fax: 408-879-9018
www.pulsecoresemi.com
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003
Many PulseCore Semiconductor products are protected by issued patents or by applications for patent
© Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks
of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves
the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors
that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance.
PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development,
significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive
information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or
customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and
disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to
fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in
PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively
according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any
patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore
does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be
expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the
manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use.
USB 2.0 Peak EMI reduction IC
Notice: The information in this document is subject to change without notice.
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