Ordering number : ENA0974A Bi-CMOS IC LV2283VB FM Transmitter IC with Stereo Modulation Overview The LV2283VB is an FM Transmitter IC. MPX block makes stereo modulated, composite signal from L and R sound inputs. RF VCO includes FM modulation function. PLL synthesizer determines RF output frequency with I2C control. Application • Portable Memory Player • Portable HDD Player • Wireless Headphone Features • (Audio) • (RF) • (PLL) • (Bus control) • (Regulator) Pilot tone system stereo modulation, audio attenuation VCO, programmable gain driver amplifier 70 to 110MHz 100kHz step I2C bus control 2.8V LDO regulator Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Pin 6 Unit Maximum supply voltage VCC max 7.0 Maximum input voltage VIN max VCC+0.3 V Minimum input voltage VIN min -0.3 V Allowable power dissipation Pd max 500 mW Ta ≤ 85°C, Mounted on a specified board* V Operating temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +150 °C * Specified board : 114.3mm×76.1mm×1.6mm, glass epoxy circuit board. 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D2607 MS 20071211-S00002 / D1207 MS PC No.A0974-1/10 LV2283VB Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Recommended supply voltage VCC Pin 6 3.3 V Operating supply voltage range VCC op Pin 6 2.8 to 5.5 V AC Characteristics Ta = 25°C, VCC = 3.3V, I2C bits = Default state, L and R input = 1kHz, 450mVrms, unless otherwise noted Parameter Symbol Ratings Conditions min Circuit current ICC No input signal, Pin 6 current Standby current ISTB No input signal, I2C bit “STB” = “1”, typ Unit max 8 10 mA 1.0 µA Pin 6 current Audio and MPX Blocks Parameter Symbol Ratings Conditions min Maximum audio input typ Unit max VA max Pin 1 and 24 input Audio input frequency FAF Pin 1 and 24 input 20 Channel separation SEP Pin 7, composite output, L→R, R→L 20 35 Pin 7, composite output -2 0 0.1 0.3 % 0.5 0.85 1.2 mVp-p 3.3 3.8 4.3 mVrms 30 35 1.5 2 2.5 dB Channel balance Total harmonic distortion Pilot tone output level Composite output level Audio mute CB THD PMOD MUTE ATTSTEP Crystal oscillator frequency (1) FXOSC (1) 15k Pin 7, composite output I2C bits “ST” =”1” MPXOUT Audio attenuation adjustment step 900 I2C bit “MUTE” = “1” I2C bit “ATT2 – ATT0” = “000” to “111”, mVrms Hz dB 2 dB dB totally 8 steps. Pin 21 and Pin 22 76 kHz RF Blocks Parameter Symbol Ratings Conditions min RF output RFOUT f = 98MHz, I2C bit “RF2 - RF0” = “011”, typ Unit max 109 112 115 dBµV 0.4 0.9 1.4 dB 110 MHz Pin 12 output RF output adjustment step RFSTEP I2C bit “RF2 – RF0” = “000” to “111”, totally 8 steps. Pin 12 relative output. RF frequency FRF 100kHz step 70 PLL Blocks Parameter Symbol Ratings Conditions min typ Unit max I2C input “High” voltage VH 0.8VCC VCC+0.3 V I2C input “Low” voltage VL -0.3 0.2VCC V 19kHz output voltage V19K Pin 20. 19kHz output. I2C bit “19K” = “1”. 0.6VCC 0.8VCC Vp-p Load impedance = 47kΩ. RF input frequency Crystal oscillator frequency (2) External clock frequency FPLL FXOSC (2) FEXT Step = 100kHz, See table 1 70 Pin 16 External clock injection to Pin 13 110 16 1 MHz MHz 24 MHz instead of 16MHz crystal oscillation. When the LSI is standby mode, external clock should be stop. CP output current ICP CP voltage = 1.4V 30 µA No.A0974-2/10 LV2283VB Package Dimensions unit : mm (typ) 3287 6.5 24 0.5 6.4 4.4 13 12 1 0.5 0.15 0.22 0.1 (1.3) 1.5max (0.5) SANYO : SSOP24(225mil) Pin Assignment L-INPUT 1 L-CAP 2 GND 3 MPX+B 4 24 R-INPUT 23 R-CAP 22 76K OSC IN 21 76K OSC OUT GND 5 20 19K OUT VCC 6 19 COUNTER RESET COMPOSITE OUT 7 18 SDA CP OUT 8 17 SCL GND 9 16 XTAL VCO 10 15 GND RF+B 11 RF OUT 12 14 PLL+B 13 GND No.A0974-3/10 LV2283VB R-INPUT R-CAP 76K OSC IN 76K OSC OUT 19K OUT COUNTER RESET SDA SCL XTAL GND PLL+B GND Block Diagram 24 23 22 21 20 19 18 17 16 15 14 13 Preemphasis (19K) X'tal OSC Shift Register Switch 38kHz 1/2 38kHz (R6-R0) VCC X'tal OSC (RF2-RF0) (P10-P0) 100kΩ reset (MUTE,ST) 19kHz 1/2 R-Counter (ATT2-ATT0) Phase DET reset P-Counter (PILOT) Attenuator Charge Pump L-CAP GND MPX+B GND 6 7 8 9 10 11 12 RF OUT 5 VCO 4 GND 3 CP OUT 2 COMPOSITE OUT 1 L-INPUT Preemphasis RF+B VCO 2.8V Regulator VCC Switch AC Testing Circuit SW1 a R-INPUT + b 47kΩ 1µF 24 23 1 2 1µF 76KHz 22 21 VCC COUNTER RESET 19K OUT SW5 SW4 EXTERNAL CLOCK INPUTT 16MHz 3.3kΩ 3.3kΩ SDA SCL 100nF 270pF 20 19 18 17 16 15 14 13 5 6 7 8 9 10 11 12 SG INPUT 4 1µF + 390nH RF OUT 10µF 100nF a 100nF SW3 b Stereo DEC COMP-OUT VCC R-OUT 3 L-OUT SW2 a L-INPUT + 1µF b VA No.A0974-4/10 LV2283VB Pin Description Pin No. 1 Pin Name L-INPUT DC Voltage Description (V) 0 Equivalent Circuit Left channel input. If audio source DC voltage is not 0V, AC coupling 6 capacitance is required. Pre-emphasis 4 capacitance should be required between pin 1 (24) and 2 (23). 50kΩ 1 1kΩ 24 10kΩ 2 23 5 2 L-CAP 0 3 GND 0 4 MPX+B 2.8 See Pin 1 LDO regulator output for audio frequency 6 and MPX blocks. External decoupling capacitance is required. 4 5 5 GND 0 6 VCC 3.3 7 COMPOSITE 0.05 Stereo modulated output. 6 OUT 4 12kΩ 7 2kΩ 5 8 CP OUT - Charge pump current output. 6 11 30µA 8 30µA 9 9 GND 0 Continued on next page. No.A0974-5/10 LV2283VB Continued from preceding page. Pin No. 10 Pin Name VCO DC Voltage Description (V) 2.2 Equivalent Circuit Transistor BASE terminal for Colpitz 6 oscillator. 11 10 9 11 RF+B 2.8 LDO regulator output for RF blocks. 6 11 5 12 RF OUT 2.8 Collector output. Inductance should be connected Between pin 11 and pin 12 for 6 getting resonant frequency and making 11 pin12 DC bias 2.8V. 450Ω 20Ω 12 13 13 GND 14 PLL+B 0 2.8 LDO regulator output for digital blocks. 6 14 5 15 GND 0 Continued on next page. No.A0974-6/10 LV2283VB Continued from preceding page. Pin No. 16 Pin Name XTAL DC Voltage Description (V) 2.0 Equivalent Circuit 16MHz crystal is needed for PLL 6 reference frequency. If external clock is 14 injected to Pin 16, frequency should be from 1MHz to 24MHz and N (integer) × 200kHz. When the IC is Standby mode, external clock should be stop. 16 15 17 SCL - I2C clock input. 6 CMOS Logic Input 17 15 18 SDA - I2C data input. 6 CMOS Logic Input 18 15 19 COUNTER 3.3 RESET Usually pin 19 should be kept “Logic High” 6 or opened (pull up 100kΩ makes pin 19 “Logic High” automatically). 100kΩ When pin 19 is “Logic Low” level, internal 1kΩ 19 frequency counter from 76kHz to 19kHz is CMOS Logic Input reset. 15 20 19K OUT - 19kHz output (same phase as pilot tone). 6 When I2C bit “19K”=0, Pin 20 is kept “Logic Low” level. 20 CMOS Logic Output 15 21 76K OSC OUT 2.0 For stereo modulator pilot signal and sub carrier. 76kHz crystal should be connected between Pin 21 and Pin 22 6 14 21 22 1kΩ 1kΩ 1MΩ 15 Continued on next page. No.A0974-7/10 LV2283VB Continued from preceding page. Pin No. DC Voltage Pin Name Description (V) Equivalent Circuit 22 76K OSC IN 0.7 See Pin 21 23 R-CAP 0 See Pin 1 See Pin 21 See Pin 21 24 R-INPUT 0 See Pin 1 See Pin 21 I2C Bus Definition Table 1. I2C Bus Write Data Format Name Bit Byte ACK MSB (1) Address Byte 1 Control Byte 1 AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W 1 1 0 1 0 0 0 0 P10 P9 P8 P7 P6 P5 P4 P3 0 1 1 1 1 0 1 0 P2 P1 P0 19K ST PILOT STB MUTE 1 0 0 0 1 1 0 0 RES1 RES0 RF2 RF1 RF0 ATT2 ATT1 ATT0 0 0 1 1 1 0 1 1 R6 R5 R4 R3 R2 R1 R0 TEST 1 0 1 0 0 0 0 0 2 Control Byte 2 3 Control Byte 3 4 Control Byte 4 LSB 5 A A A A A (1) : MSB is transmitted first. Table 2. I2C Write Mode Description Bit Name AD7 – AD1 Address bit LV2283VB requires address bits. Description R/W Read/Write “0” for Write mode (Write mode only). A Acknowledge P10 – P0 Programmable counter 11 bit Programmable counter. P0 = LSB, P10 = MSB. RF Frequency = (P10×210 + P9×29 + ... P1×21 + P0) × 100kHz Default state = “01111010100” (980) 19K 19kHz output ST MONO/ST selection 19K OUT (Pin 20) ON / OFF. “19K” = “0” for no output. “1” for 19kHz output (same phase as pilot tone). Default state = “0” Monaural/Stereo transmission mode selection. “ST” is set “0” for monaural mode (no pilot tone), “1” for stereo transmission. Default state = “1” PILOT Pilot tone output STB Standby MUTE Audio mute “1” for normal operation (default). “0” for NO pilot tone in composite output even if ST bit = “1” (Stereo mode). RES1, RES0 Reserved bits RF2 – RF0 RF output adjustment “1” for standby mode. Default state = “0” for normal operation. “1” for Audio mute. Default state = “0” for normal operation. Reserved bits. Default state = “00” for normal operation. RF output voltage adjustment with 8 degree, 1dB steps. “RF2, RF1, RF0” = “111” for maximum. “000” is minimum RF output. Default state = “111” ATT2 – ATT0 Audio attenuator Audio attenuator for FM modulation fine adjustment is set by “ATT2, ATT1, ATT0” with 8 degree, 2dB steps. “111” is for 0dB attenuation. “000” is for 14dB attenuation. Default state = “011”. R6 – R0 Reference counter 7 bit Programmable counter. R0 = LSB, R6 = MSB. Reference frequency should be set 100kHz. {Crystal oscillator frequency (Pin 16)} / {(R6×26 + R5×25 ... + R1×21 + R0) × 2} = 100kHz. Default state = “1010000” (80 × 2). TEST Test mode For IC testing. Set “0” for normal operation. “1” for counter testing mode. Default state = “0” No.A0974-8/10 LV2283VB I2C Bus Operation SDA Serial I/F Bus Controller (Master) Control Byte 1 Control Byte 4 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Address Byte Master S 6 5 4 3 2 1 0 W MSB MSB First LV2283VB (Slave) SCL LSB MSB A Slave MSB LSB LSB A S → Start condition F A F → Stop condition A → Acknowledge Time chart tBUF tHD ; STA tSU ; DAT tSU ; STO SDA SCL Start condition tLOW tR tHD ; DAT tHIGH Stop condition tF Table 3. Timing specification Parameter Ratings Symbol min typ Unit max SCL clock frequency fSCL Bus free time between a STOP and START condition tBUF 4.7 µs tHD ; STA 4.0 µs LOW period of the SCL clock tLOW 4.7 µs HIGH period of the SCL clock tHIGH 4.0 µs Data hold time tHD ; DAT 0.0 µs Data set-up time tSU ; DAT 250 Hold time START condition 100 ns Rise time of both SDA and SCL signals tR 1000 Fall time of both SDA and SCL signals tF 300 Set-up time for STOP condition tSU ; STO 4.0 kHz ns ns µs I2C Bus AC Characteristics : Temp=25°C VCC = 3.3V Note : I2C Bus is a registered trademark of the Philips Co.. No.A0974-9/10 LV2283VB Preemphasis 76KHz 22 21 SCL 23 SDA 24 COUNTER RESET R-INPUT 19K OUT Application Circuit 20 19 18 17 X'tal OSC Shift Register VCC Switch 16 15 14 13 11 12 X'tal OSC 1/2 R-Counter 1/2 Phase DET Switch Attenuator Charge Pump 1 VCO 2.8V Regulator Preemphasis L-INPUT P-Counter 2 3 4 5 6 7 8 9 10 + VCC + SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of December, 2007. Specifications and information herein are subject to change without notice. PS No.A0974-10/10