Ordering number : ENA1135 Bi-CMOS LSI LV8086T Forward/Reverse Motor Driver Overview LV8086T is a 2ch forward/reverse motor driver IC using D-MOS FET for output stage. As MOS circuit is used, it supports the PWM input. Its features are that the on resistance (0.75Ω typ) and current dissipation are low. It also provides protection functions such as heat protection circuit and reduced voltage detection and is optimal for the motors that need high-current. Functions • 2ch forward/reverse motor driver • Possible to respond to 3V control voltage and 6V motor voltage device • Low power consumption • Low-temperature resistance 1.2Ω • Built-in charge pump circuit • Built-in low voltage reset and thermal shutdown circuit • Four mode function forward/reverse, brake, stop. • Compact TSSOP24 package Specifications Absolute Maximum Ratings at Ta = 25°C, SGND = PGND = 0V Parameter Supply voltage (For load) Symbol Conditions Ratings Unit VM1,2 max -0.5 to 7.5 Supply voltage (For control) VCC max -0.5 to 6.0 V Output current IO max1 t ≤ 100ms 1.4 A Output peak current IO max2 t ≤ 10ms 2.5 A Input voltage VIN max Allowable power dissipation Pd -0.5 to VCC+0.5 * Mounted on a board 800 V V mW Operating temperature Topr -20 to +75 °C Storage temperature Tstg -55 to +150 °C * : Mounted on a specified board : 30×50×1.6mm, glass epoxy board. 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To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 31908 TI IM 20060522-S00001 No. A1135-1/6 LV8086T Allowable Operating Ratings at Ta = 25°C, SGND = PGND = 0V Parameter Symbol Conditions Ratings Unit Supply voltage (VM Pin) VM 2.0 to 7.0 V Supply voltage (VCC Pin) VCC 2.7 to 5.5 V Input signal voltage VIN 0 to VCC V Input signal frequenc Capacitor for charge pump f max C1, C2, C3 100 kHz 0.001 to 0.1 μF Electrical Characteristics at Ta = 25°C, VCC = VM1 = VM2 = 5.0V, SGND = PGND = 0V, unless especially specified. Parameter Symbol Ratings Conditions min typ Unit max Supply current for load at standby IMO EN = 0V 1.0 μA Supply current for control at ICO EN = 0V, IN1 = IN2 = IN3 = IN4 = 0V 1.0 μA 1.2 mA standby Current drain during operation IC1 EN = 5V, VG at no load H-level input voltage VIH 2.7V ≤ VCC ≤ 5.5V 0.6VCC 0.7 VCC L-level input voltage VIL 2.7V ≤ VCC ≤ 5.5V 0 0.2VCC V H-level input current IIH 1.0 μA V (IN1, IN2, IN3, IN4) L-level input current IIL -1.0 RUP 100 μA (IN1, IN2, IN3, IN4) Pull-down resistance (EN1, 2) 200 400 kΩ Ta = 25°C, VCC = VM = 5.0V, SGND = PGND = 0V Parameter Symbol Ratings Conditions min Output ON resistance Charge pump voltage Low-voltage detection operation RON typ Sum of ON resistances at top and bottom VG 8.5 VCS 2.15 Unit max Ω 0.75 1.2 10.5 V 2.30 2.45 V voltage Thermal shutdown operation Tth 180 °C 9 V temperature Charge pump capacity VGLOAD 8 (IG = 500μA) IG current dissipation (Fin = 20kHz) 350 μA 1.0 ms 0.2 0.4 μs 0.2 0.4 μs IG Charge pump start time TVG Output block Turn on time TPLH Turn off time TPHL CVG = 0.1μF Remarks 1. It shows current dissipation of VM1,2 pin in output OFF state. 2. It shows current dissipation of VCC pin in stand-by state. (The standard current depends on EN pin pull-down resistance.) 3. It shows current dissipation of VCC pin in state of EN = 5V (stand-by), including current dissipation of VG pin. 4. For IN1, IN2, IN3 and IN4 pins, no pull-down and pull-up resistance is needed. (High impedance pin) 5. It shows sum of upper and lower saturation voltages of OUT pin. 6. It controls charge-pump oscillation and makes specified voltage. 7. When low voltage is detected, the lower output is turned OFF. 8. When thermal protection circuit is activated, the lower output is turned OFF. When the heat temperature is fallen, it is turned ON again. 9. IG (VG pin load current) = 500μA 10. It shows VG pin current dissipation in state of PWM input for IN pin. 11. It specifies start-up time from 10% to 90% when VG is in non-load state (when setting the capacitor between VG and GND to 0.1μF and VCC is 5V). 12. It specifies 10% to 90% for start-up and 90% to 10% for shut-down. No. A1135-2/6 LV8086T Package Dimensions unit : mm (typ) 3260A Pd max - Ta Allowable power dissipation, Pd max - mW 1000 6.5 0.5 6.4 13 4.4 24 12 1 0.5 0.15 0.22 0.08 1.2max (1.0) (0.5) Specified Board: 30×50×1.6mm3 glass epoxy board. 800 600 480 400 200 0 -20 0 20 40 60 75 80 100 Ambient temperature, Ta - °C SANYO : TSSOP24(225mil) Pin Assignment EN1 1 24 EN2 VM2 2 23 IN1 NC 3 22 IN2 PGND 4 21 IN3 OUT4 5 20 IN4 OUT2 7 LV8086T OUT3 6 19 EXTRA 18 SGND OUT1 8 17 C2L PGND 9 16 C2H NC 10 15 C1L VM1 11 14 C1H VG 12 13 VCC No. A1135-3/6 LV8086T Block Diagram C2H OSC, CHARGE_PUMP VG C2L C1H Low-voltage thermal protection C1L VM1 H BRIDGE1 VCC OUT1 OUT2 EN1 EN2 CMOS LOGIC P-GND LEVEL SHIFT VM2 IN1 IN2 H BRIDGE2 IN3 OUT3 OUT4 IN4 P-GND EXTRA SGND Truth table EXTRA EN1 IN1 IN2 OUT1 OUT2 Circuit of (EN2) (IN3) (IN4) (OUT3) (OUT4) Charge Pump H H L L Brake H L H L Forward L H L H L L Ｚ Z - - L L H - H L L - L H - - L L H L L H H L ON Mode Reverse Standby OFF Standby Forward ON Reverse Brake - : Don’t care Z : High-Impedance * Current drain becomes zero in the standby mode. * The output side becomes OFF, with motor drive stopped, during voltage reduction and thermal protection. No. A1135-4/6 LV8086T Pin Functions Pin No. Pin name 15 C1L 17 C2L 14 C1H 16 C2H Function Equivalent Circuit Voltage raising capacitor connection pin VCC Voltage raising capacitor connection pin VG C1H C2H 23 IN1 22 IN2 21 IN3 Driver output changeover 20 IN4 19 EXTRA 1 EN1 Logic enable pin 24 EN2 TOUT output control pin VCC VCC (Pull-down resistor incorporated) 200kΩ 8 OUT1 7 OUT2 6 OUT3 5 Driver output pin VM OUT4 PGND OUT OUT PGND 2 VM2 11 VM1 13 VCC 12 VG Motor power supply Logic power supply Driver drive circuit power supply VG C2H 0.1μF 0.01μF C2L 18 SGND Logic GND 9 PGND Driver GND 4 PGND (both terminals to be connected) No. A1135-5/6 LV8086T Sample Application Circuit C2H VG 8.5 to 10.5V 0.1μF 1.0 to 6.5V 0.01μF C2L 2.7 to 5.5V VM1 C1H *1 0.01μF C1L OUT1 VCC OUT2 EN1 PGND EN2 CPU EN3 OUT3 EN4 OUT4 SGND PGND VM2 *1 EXTRA *1: Connect a kickback absorption capacitor directly near IC. Coil kickback may cause rise of the voltage of VM line, and the voltage exceeding the maximum rating may be applied momentarily, resulting in deterioration or damage of IC. SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of March, 2008. Specifications and information herein are subject to change without notice. PS No.A1135-6/6