Ordering number : EN*A1351 Bi-CMOS LSI LV8412GR For DSC, and Cell Phone Camera Modules H-Bridge × 4-channel Motor Driver Overview The LV8412GR is an H-bridge×4-channel motor driver IC and is able to control 3 modes of forward, reverse, and standby. This IC housed in a miniature package is optimum for use in a stepping motor driving system for DSC or a camera module of cell phones. Functions • Saturation drive H-bridge: 4-channels • Built-in thermal protection circuit • Built-in low voltage malfunction prevention circuit • Incorporates a transistor for driving photo sensors Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Power supply voltage 1 Symbol Conditions VM max Ratings Unit 6.0 V Power supply voltage 2 VCC max 6.0 V Output peak current IO peak Channels 1 to 4, t ≤ 10msec, ON-duty ≤ 20% 600 mA Output continuous current 1 IO max1 Channels 1 to 4 400 mA Output continuous current 2 IO max2 PI1 30 mA Allowable power dissipation Pd max Mounted on a circuit board* Operating temperature Storage temperature 1.05 W Topr -30 to +85 °C Tstg -55 to +150 °C * Specified circuit board : 40mm × 50mm × 0.8mm, glass epoxy four-layer board. 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O2208 MS No.A1351-1/7 LV8412GR Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Power supply voltage range 1 VM 2.5 to 5.5 Power supply voltage range 2 VCC 2.5 to 5.5 V Logic input voltage range VIN 0 to VCC+0.3 V Input frequency fIN IN1 to 8, INA to 100 V kHz Electrical Characteristics at Ta = 25°C, VM = 5V, VCC = 3.3V, unless otherwise specified. Parameter Symbol Ratings Conditions min typ Unit max 1.0 µA Standby mode current drain Istn IN1 to 8 = “L” VM current drain IM IN1 = “H”, IM1 + IM2, with no load 50 100 200 µA VCC current drain ICC IN1 = “H” 0.3 0.6 1.2 mA VCC low-voltage cutoff voltage VthVCC 2.0 2.25 2.5 V Low-voltage hysteresis voltage VthHIS 100 150 200 mV Thermal shutdown temperature TSD Design guarantee value * 160 180 200 °C Thermal hysteresis width ∆TSD Design guarantee value * 10 30 50 °C Rin IN1 to 8 50 100 200 kΩ 16.5 33 OUT1 to 8 Logic pin internal pull-down resistance Logic pin input current Logic input high-level voltage IinL VIN = 0V, IN1 to 8 IinH VIN = 3.3V, IN1 to 8 Vinh IN1 to 8 1.0 µA 60 µA 2.5 V Logic input low-level voltage Vinl IN1 to 8 1.0 V Output on-resistance Ronu IO = 400mA, upper ON resistance 0.75 0.9 Ω Rond IO = 400mA, lower ON resistance 0.45 0.6 Ω Output leakage current IOleak 1.0 µA Diode forward voltage VD ID = -400mA 0.7 0.9 1.2 V Rin INA 50 100 200 kΩ Logic pin input current IinL VIN = 0V, INA 1.0 µA IinH VIN = 3.3V, INA 60 µA Logic input high-level voltage Vinh INA Logic input low-level voltage Vinl INA Output on-resistance Ron IO = 10mA Output leakage current IOleak PI1 Logic pin internal pull-down resistance 16.5 33 2.5 V 1.0 3.0 V 6.0 Ω 1.0 µA No.A1351-2/7 LV8412GR Package Dimensions unit : mm (typ) 3366 Pd max – Ta TOP VIEW SIDE VIEW Allowable power dissipation, Pd max – W 1.2 BOTTOM VIEW (0.09) (0.125) 3.0 0.4 3.0 (C0.14) 24 2 1 0.19 SIDE VIEW 0.4 (0.5) 1.05 1 0.8 0.6 0.55 0.4 0.2 0 – 30 – 20 0.8 (0.035) Specified board : 40.0×50.0×0.8mm3 4-layer glass epoxy 0 20 40 60 80 100 Ambient temperature, Ta – °C SANYO : VCT24(3.0X3.0) 18 17 16 15 14 13 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 Pin Assignment 19 PGND PGND2 12 20 OUT1 OUT8 11 21 VM1 VM2 10 IN8 9 IN7 8 IN6 7 LV8412GR IN5 PI1 IN4 24 Top View IN3 SGND IN2 23 IN1 VCC INA 22 1 2 3 4 5 6 No.A1351-3/7 + - VCC VM1 LVS circuit SGND + - OUT1 IN1 IN2 OUT2 IN3 IN4 IN5 OUT3 CPU IN6 VM2 IN8 Logic circuit IN7 OUT4 INA OUT5 OUT6 OUT7 PI1 PGND 30mA max OUT8 VCC Thermal shutdown circuit LV8412GR Block Diagram No.A1351-4/7 LV8412GR Pin Functions Pin No. Pin name Pin Function Equivalent Circuit Control signal input pin 1 INA 2 IN1 Control signal input pin 3 IN2 Control signal input pin 4 IN3 Control signal input pin 5 IN4 Control signal input pin 6 IN5 Control signal input pin 7 IN6 Control signal input pin 8 IN7 Control signal input pin 9 IN8 Control signal input pin (Photo sensor driving transistor) VCC 10kΩ 100kΩ GND 11 OUT8 Outpin 13 OUT7 Outpin 14 OUT6 Outpin 15 OUT5 Outpin 16 OUT4 Outpin 17 OUT3 Outpin 18 OUT2 Outpin 20 OUT1 Outpin VM PGND 24 PI1 Photo sensor driving transistor output pin GND 22 VCC Logic system power supply connection pin 10 VM2 Motor power supply connection pin 21 VM1 Motor power supply connection pin 23 SGND Signal ground 12 PGND2 Power ground 19 PGND1 Power ground No.A1351-5/7 LV8412GR Logic input specifications • Common channels 1 to 4 ch1 : IN1 to IN2, OUT1 to OUT2 ch2 : IN3 to IN4, OUT3 to OUT4 ch3 : IN5 to IN6, OUT5 to OUT6 ch4 : IN7 to IN8, OUT7 to OUT8 Input Output IN1 IN2 OUT1 OUT2 Operation mode L − OFF OFF Standby H L H L CW (forward) H H L H CCW (reverse) • Output stage transistor function VM VM VM ON OFF OFF ON OFF OFF OFF ON ON OFF OFF OFF (Forward) (Reverse) (Standby) • Photo sensor driving transistor When thermal shutdown and VCC low-voltage cut circuits are activated, OUT1 through OUT8 are turned OFF under control of the internal circuit. But the output (PI1) of photo sensor driving transistor continues operation. Input Photo sensor driving INA PI1 L OFF H ON No.A1351-6/7 LV8412GR SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of October, 2008. Specifications and information herein are subject to change without notice. PS No.A1351-7/7