MICROCHIP PIC16F1516

PIC16(L)F1516/1517/1518/1519
PIC16(L)F1516/1517/1518/1519 Family
Silicon Errata and Data Sheet Clarification
The PIC16(L)F1516/1517/1518/1519 family devices
that you have received conform functionally to the
current Device Data Sheet (DS41452C), except for the
anomalies described in this document.
For example, to identify the silicon revision level
using MPLAB IDE in conjunction with a hardware
debugger:
1.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
2.
3.
The errata described in this document will be addressed
in future revisions of the PIC16(L)F1516/1517/1518/
1519 silicon.
Note:
4.
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon
revision (A6).
5.
Data Sheet clarifications and corrections start on page
5, following the discussion of silicon issues.
Note:
The silicon revision level can be identified using the
current version of MPLAB® IDE and Microchip’s
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
TABLE 1:
Using the appropriate interface, connect the
device to the hardware debugger.
Open an MPLAB IDE project.
Configure the MPLAB IDE project for the
appropriate device and hardware debugger.
Based on the version of MPLAB IDE you are
using, do one of the following:
a) For MPLAB IDE 8, select Programmer >
Reconnect.
b) For MPLAB X IDE, select Window >
Dashboard and click the Refresh Debug
Tool Status icon (
).
Depending on the development tool used, the
part number and Device Revision ID value
appear in the Output window.
If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
The DEVREV values for the various PIC16(L)F1516/
1517/1518/1519 silicon revisions are shown in Table 1.
SILICON DEVREV VALUES
DEVICE ID<13:0>(1),(2)
Part Number
REV<4:0> Silicon Revision
DEV<8:0>
A2
A3
A4
A6
PIC16F1516
01 0110 100
—
0 0011
0 0100
0 0110
PIC16LF1516
01 0111 100
0 0010
0 0011
0 0100
0 0110
PIC16F1517
01 0110 101
—
0 0011
0 0100
0 0110
PIC16LF1517
01 0111 101
0 0010
0 0011
0 0100
0 0110
PIC16F1518
01 0110 110
—
0 0011
0 0100
0 0110
PIC16LF1518
01 0111 110
0 0010
0 0011
0 0100
0 0110
PIC16F1519
01 0110 111
—
0 0011
0 0100
0 0110
PIC16LF1519
01 0111 111
0 0010
0 0011
0 0100
0 0110
Note 1:
2:
The Device ID is located in the configuration memory at address 8006h.
Refer to the “PIC16(L)F151X/152X Memory Programming Specification” (DS41442) for detailed
information on Device and Revision IDs for your specific device.
 2010-2012 Microchip Technology Inc.
DS80518E-page 1
PIC16(L)F1516/1517/1518/1519
TABLE 2:
SILICON ISSUE SUMMARY
Module
Feature
Item
Number
Issue Summary
Affected Revisions(1)
A2
A3
A4
High-Frequency Internal HFINTOSC Operation
Oscillator (HFINTOSC)
1.1
HFINTOSC is not stable
when VDD <2.3V.
High-Frequency Internal HFINTOSC Operation
Oscillator (HFINTOSC)
1.2
HFINTOSC Max. VDD at
-40°C.
FVR
FVR Ready Bit
(FVRRDY)
2.1
FVRRDY bit may not get
set at low VDD and low
operating temperature.
X
Oscillator
HFINTOSC Ready/
Stable bit
3.1
Bits remained set to ‘1’
after initial trigger.
X
X
X
Oscillator
Clock Switching
3.2
Clock switching can
cause a single corrupted
instruction.
X
X
X
Oscillator
Oscillator Start-up
Timer (OST) bit
3.3
OST bit remains set.
X
X
X
Configuration Word
Configuration Word 1,
Bit 8
4.1
Writing the unimplemented Configuration
Word bit 8 affects bit 7.
X
X
5.1
Unexpected Resets may
occur at ambient temperatures below 0C.
X
X
Low-Dropout (LDO) Volt- Low-Power Sleep
age Regulator
mode
Note 1:
A6
X
X
X
X
Only those issues indicated in the last column apply to the current silicon revision.
DS80518E-page 2
 2010-2012 Microchip Technology Inc.
PIC16(L)F1516/1517/1518/1519
Silicon Errata Issues
Note:
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A6).
1. Module: High-Frequency Internal
Oscillator (HFINTOSC)
1.1 Internal Oscillator min. VDD
The High-Frequency Internal Oscillator requires a
minimum voltage of 2.3V to operate.
Work around
Affected Silicon Revisions
A3
A4
A6
X
1.2 HFINTOSC Max. VDD at -40°C
For the LF devices only, the High-Frequency
Internal Oscillator may stop working at -40°C when
VDD is 3.6V.
Work around
None.
Affected Silicon Revisions
A2
3.1 OSCSTAT bits: HFIOFR and HFIOFS
When HFINTOSC is selected, the HFIOFR and
HFIOFS bits will become set when the oscillator
becomes ready and stable. Once these bits are
set, they become “stuck”, indicating that
HFINTOSC is always ready and stable. If the
HFINTOSC is disabled, the bits fail to be cleared.
Work around
None.
Affected Silicon Revisions
A2
A3
A4
X
X
X
A6
3.2 Clock Switching
None.
A2
3. Module: Oscillator
A3
A4
A6
X
2. Module: FVR
When switching clock sources between INTOSC
clock source and an external clock source, one
corrupted instruction may be executed after the
switch occurs.
This issue affects Two-Speed Start-up and FailSafe Clock Monitor operation.
Work around
When switching from an external oscillator clock
source, first switch to 16 MHz HFINTOSC. Once
running at 16 MHz HFINTOSC, configure IRCF to
run at desired internal oscillator frequency.
When switching from an internal oscillator
(INTOSC) to an external oscillator clock source,
first switch to HFINTOSC High-Power mode (8
MHz or 16 MHz). Once running from HFINTOSC,
switch to the external oscillator clock source.
Affected Silicon Revisions
2.1 FVR Ready Bit (FVRRDY)
After the FVR is stabilized, the FVR Ready bit may
not be set when the temperature is -40°C and VDD
= 1.8V.
A2
A3
A4
X
X
X
A6
Work around
Operate above -30°C or with VDD >2.0V.
Affected Silicon Revisions
A2
A3
A4
A6
X
 2010-2012 Microchip Technology Inc.
DS80518E-page 3
PIC16(L)F1516/1517/1518/1519
3.3 Oscillator Start-up Timer (OST) bit
During the Two-Speed Start-up sequence, the
OST is enabled to count 1024 clock cycles. After
the count is reached, the OSTS bit is set, the
system clock is held low until the next falling edge
of the external crystal (LP, XT or HS mode), before
switching to the external clock source.
When an external oscillator is configured as the
primary clock and Fail-Safe Clock mode is enabled
(FCMEN = 1), any of the following conditions will
result in the Oscillator Start-up Timer (OST) failing
to restart:
• MCLR Reset
• Wake from Sleep
• Clock change from INTOSC to Primary Clock
5. Module: Low-Dropout (LDO) Voltage
Regulator
5.1 Low-Power Sleep mode
Temperatures Below 0C
at
Ambient
Under the following conditions:
• ambient temperatures below 0C
• while in Sleep mode
• VREGCON configured for Low-Power Sleep
mode (VREGPM = 1)
On very rare occasions, the LDO voltage will drop
below the minimum VDD, causing unexpected
device Resets.
Work around
This anomaly will manifest itself as a clock failure
condition for external oscillators which take longer
than the clock failure time-out period to start.
For applications that operate at ambient
temperatures below 0C, use the LDO voltage
regulator in Normal-Power mode (VREGPM = 0).
Work around
Affected Silicon Revisions
None.
Affected Silicon Revisions
A2
A3
A4
X
X
X
A2
A3
A4
A6
X
X
X
X
A6
4. Module: Configuration Word
4.1 Configuration Word 1, Bit 8
If an attempt is made to clear bit 8, bit 7 will be
cleared instead. A cleared bit 7 enables code-protect
on the device.
Work around
Do not write Configuration Word 1, bit 8 to ‘0’.
Affected Silicon Revisions
A2
A3
X
X
DS80518E-page 4
A4
A6
 2010-2012 Microchip Technology Inc.
PIC16(L)F1516/1517/1518/1519
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS41452C):
Note:
Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
None.
 2010-2012 Microchip Technology Inc.
DS80518E-page 5
PIC16(L)F1516/1517/1518/1519
APPENDIX A:
DOCUMENT
REVISION HISTORY
Rev A Document (12/2010)
Initial release of this document.
Rev B Document (03/2011)
Added Silicon Revision A3; Added PIC16F1516,
PIC16F1517, PIC16F1518 and PIC16F1519 devices;
Added Module 1.2.
Rev C Document (03/2012)
Added Silicon Revision A4; Added Module 3 Oscillator;
Added Module 4 Configuration Word; Other minor
corrections.
Data Sheet Clarifications: Added Module 1, Oscillator.
Rev D Document (07/2012)
Added MPLAB X IDE; Added Module 5, Low-Dropout
(LDO) Voltage Regulator.
Data Sheet Clarifications: Added Module 2, Memory,
High-Endurance Flash.
Rev E Document (12/2012)
Added Silicon Revision A6.
Data Sheet Clarifications removed for DS41452C.
DS80518E-page 6
 2010-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
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devices in life support and/or safety applications is entirely at
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hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
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Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
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SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2010-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620767528
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2010-2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS80518E-page 7
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DS80518E-page 8
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11/27/12
 2010-2012 Microchip Technology Inc.