STP16DPS05 Low voltage 16-bit constant current LED sink driver with outputs error detection Features ■ Low voltage power supply down to 3 V ■ 16 constant current output channels ■ Adjustable output current through external resistor ■ Short and open output error detection ■ Serial data IN/Parallel data OUT ■ 3.3 V micro driver-able ■ Output current: 20-85 mA ■ 30 MHz clock frequency ■ Available in high thermal efficiency TSSOP exposed pad ■ ESD protection 2.0 kV HBM, 200 V MM QSOP-24 SO-24 TSSOP24 TSSOP24 (exposed pad) The data detection results are loaded in the shift register and shifted out via the serial line output. Description The STP16DPS05 is a monolithic, low voltage, low current power 16-bit shift register designed for LED panel displays. The device contains a 16-bit serial-in, parallel-out shift register that feeds a 16-bit D-type storage register. In the output stage, sixteen regulated current sources were designed to provide 5-100 mA constant current to drive the LEDs. The STP16DP05 features open and short LED detections on the outputs.The STP16DP05 is backward compatible with STP16C/L596.The detection circuit checks 3 different conditions that can occur on the output line: short to GND, short to VO or open line. Table 1. Device summary The detection functionality is implemented without increasing the pin count number, through a secondary function of the LATCH and output enable pin (DM1 and DM2 respectively), a dedicated logic sequence allows the device to enter or leave from detection mode. Through an external resistor, users can adjust the STP16DPS05 output current, controlling in this way the light intensity of LEDs, in addition, user can adjust LED’s brightness intensity from 0% to 100% via OE/DM2 pin. The STP16DPS05 guarantees a 20 V output driving capability, allowing users to connect more LEDs in series. The high clock frequency, 30 MHz, makes the device suitable for high data rate transmission. The 3.3 V voltage supply is well useful for applications that interface any 3.3V micro. Compared with a standard TSSOP package, the TSSOP exposed pad increases heat dissipation capability by a 2.5 factor. Order codes Package Packaging STP16DPS05MTR SO-24 (tape and reel) 1000 parts per reel STP16DPS05TTR TSSOP24 (tape and reel) 2500 parts per reel STP16DPS05XTTR TSSOP24 exposed pad (tape and reel) 2500 parts per reel STP16DP05PTR QSOP-24 2500 parts per reel January 2010 Doc ID 16538 Rev 2 1/34 www.st.com 34 Contents STP16DPS05 Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 2 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 Detection mode functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.1 Phase one: “entering in detection mode“ . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.2 Phase two: “error detection” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.3 Phase three: “resuming to normal mode” . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.4 Error detection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.5 Auto power-saving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 2/34 Doc ID 16538 Rev 2 STP16DPS05 1 Summary description Summary description Table 2. Typical current accuracy Current accuracy Output voltage ≥ 1.3 V 1.1 Between bits Between ICs ±1.5% ±5% Output current VDD Temperature 20 to 100 mA 3.3 V to 5 V 25 °C Pin connection and description Figure 1. Pin connection LE/DM1 Note: The exposed pad should be electrically connected to a metal land electrically isolated or connected to ground. Table 3. Pin description Pin n° Symbol Name and function 1 GND Ground terminal 2 SDI Serial data input terminal 3 CLK Clock input terminal 4 LE/DM1 5-20 OUT 0-15 Output terminal 21 OE/DM2 Input terminal of output enable (active low) - detect mode 1 (see operation principle) 22 SDO 23 R-EXT 24 VDD Latch input terminal - detect mode 1 (see operation principle) Serial data out terminal Input terminal of an external resistor for constant current programing Supply voltage terminal Doc ID 16538 Rev 2 3/34 Electrical ratings STP16DPS05 2 Electrical ratings 2.1 Absolute maximum ratings Stressing the device above the rating listed in the Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. Absolute maximum ratings Symbol Parameter Value Unit VDD Supply voltage 0 to 7 V VO Output voltage -0.5 to 20 V IO Output current 100 mA VI Input voltage -0.4 to VDD V 1600 mA 50 MHz -40 to +170 °C Value Unit IGND GND terminal current fCLK Clock frequency TJ Junction temperature range (1) 1. Such absolute value is achieved according the thermal shutdown 2.2 Thermal data Table 5. Symbol Thermal data Parameter TOPR Operating temperature range -40 to +125 °C TSTG Storage temperature range -55 to +150 °C 42.7 °C/W 55 °C/W TSSOP24 exposed pad 37.5 °C/W QSOP-24 55 °C/W SO-24 TSSOP24 RthJA Thermal resistance junctionambient (1) (2) 1. According with JEDEC JESD51-7 2. The exposed pad should be soldered directly to the PCB to realize the thermal benefits. 4/34 Doc ID 16538 Rev 2 STP16DPS05 2.3 Electrical ratings Recommended operating conditions Table 6. Symbol Recommended operating conditions Parameter Test conditions Min. Typ. Max. Unit 3.0 - 5.5 V - 20 V - 100 mA VDD Supply voltage VO Output voltage IO Output current OUTn IOH Output current SERIAL-OUT - +1 mA IOL Output current SERIAL-OUT - -1 mA VIH Input voltage 0.7VDD - VDD+0.3 V VIL Input voltage -0.3 - 0.3 VDD V 5 twLAT LE/DM1 pulse width 6 - ns twCLK CLK pulse width 8 - ns twEN OE/DM2 pulse width 100 - ns 10 - ns 5 - ns 10 - ns VDD = 3.0 V to 5.0 V tSETUP(D) Setup time for DATA tHOLD(D) Hold time for DATA tSETUP(L) Setup time for LATCH fCLK Clock frequency Cascade operation (1) - 30 MHz 1. If the device is connected in cascade, it may not be possible achieve the maximum data transfer. Please consider the timings carefully. Doc ID 16538 Rev 2 5/34 Electrical characteristics 3 STP16DPS05 Electrical characteristics VDD = 5 V, T = 25 °C, unless otherwise specified Table 7. Symbol Electrical characteristics Parameter Test conditions Min. Typ. Max. Unit VIH Input voltage high level 0.7VDD VDD V VIL Input voltage low level GND 0.3VDD V IOH Output leakage current VOH = 20 V 1 μA VOL Output voltage (Serial-OUT) IOL = 1 mA 0.4 V VOH Output voltage (Serial-OUT) IOH = -1 mA IOL1 VOH -VDD = -0.4 V V VO = 0.3 V, Rext = 3.9 kΩ 4.25 5 5.75 VO = 0.3 V, Rext = 970 Ω 19 20 21 VO = 1.3 V, Rext = 190 Ω 96 100 104 VO = 0.3 VREXT = 3.9 kΩ ±5 ±8 VO = 0.3 VREXT = 970 Ω ± 1.5 ±3 VO = 1.3 VREXT =190 Ω ± 1.2 ±3 150 300 600 KΩ 100 200 400 KΩ REXT = 970 OUT 0 to 15 = OFF 5 6 IDD(OFF2) REXT = 240 OUT 0 to 15 = OFF 13 14 IDD(ON1) REXT = 970 OUT 0 to 15 = ON 6 7 REXT = 240 OUT 0 to 15 = ON 13.5 14.5 IOL2 Output current IOL3 ΔIOL1 ΔIOL2 ΔIOL3 RSIN(up) Output current error between bit (all output ON) Pull-up resistor RSIN(down) Pull-down resistor IDD(OFF1) mA % Supply current (OFF) mA Supply current (ON) IDD(ON2) Thermal Thermal protection (1) 170 1. Guaranteed by design (not tested) The thermal protection switches OFF only the outputs current 6/34 Doc ID 16538 Rev 2 °C STP16DPS05 Electrical characteristics VDD = 5 V, T = 25 °C, unless otherwise specified Table 8. Switching characteristics Symbol Parameter tPLH1 Propagation delay time, CLK-OUTn, LE/DM1 = H, OE/DM2 = L tPLH2 Propagation delay time, LE/DM1 -OUTn, OE/DM2 = L tPLH3 tPLH tPHL1 tPHL2 Test conditions Min. Typ. Max. VDD = 3.3 V - 40 to 44 44 VDD = 5 V - 20 to 44 44 VDD = 3.3 V - 51 77 VDD = 5 V - 32 47 Propagation delay time, OE/DM2-OUTn, LE/DM1 = H VDD = 3.3 V - 49 to 57 57 to 77 VDD = 5 V - 27 to 32 32 to 41 Propagation delay time, CLK-SDO VDD = 3.3 V - 21.5 to 22 32 VDD = 5 V - 14.5 to 15 21.5 Propagation delay time, CLK-OUTn, LE/DM1 = H, VIH = VDD OE/DM2 = L VIL = GND Propagation delay time, IO = 20 mA LE/DM1 -OUTn, REXT = 1 KΩ OE/DM2 = L VDD = 3.3 V - 15 to 18 25 VDD = 5 V - 11 to 13 14.5 to 16 VDD = 3.3 V - 13 to 18 18 to 25 VDD = 5 V - 9 to 12 12.5 to 15 VDD = 3.3 V - 11.5 to 12 12 to 18 VDD = 5 V - 8.5 to 10 9.7 to 12 VDD = 3.3 V - 25.5 38 VDD = 5 V - 17.5 to 20.5 25 ns ns ns ns ns CL = 10 pF VL = 3.0 V RL = 60 Ω ns tPHL3 Propagation delay time, OE/DM2-OUTn, LE/DM1 = H tPHL Propagation delay time, CLK-SDO Output rise time 10~90% of voltage waveform VDD = 3.3 V - 34 to 20 24 to 53.5 tON VDD = 5 V - 12.5 to 9 9 to 18.5 Output fall time 90~10% of voltage waveform VDD = 3.3 V - 5.5 to 3.3 3.3 to 8.5 tOFF VDD = 5 V - 4.5 to 2.8 2.8 to 6.5 tr tf ns ns ns ns CLK rise time (1) CLK fall time Unit (1) - 5000 ns - 5000 ns 1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully. Doc ID 16538 Rev 2 7/34 Equivalent circuit and outputs 4 8/34 STP16DPS05 Equivalent circuit and outputs Figure 2. OE/DM2 terminal Figure 3. LE/DM1 terminal Figure 4. CLK, SDI terminal Doc ID 16538 Rev 2 STP16DPS05 Equivalent circuit and outputs Figure 5. SDO terminal Figure 6. Block diagram Doc ID 16538 Rev 2 9/34 Timing diagrams 5 Timing diagrams Table 9. CLOCK Note: 10/34 Truth table LE/DM1 OE/DM2 SERIAL-IN OUT0 ............. OUT7 ................ OUT15 SDO H L Dn Dn ..... Dn - 7 ..... Dn -15 Dn - 15 L L Dn + 1 No change Dn - 14 H L Dn + 2 Dn + 2 ..... Dn - 5 ..... Dn -13 Dn - 13 X L Dn + 3 Dn + 2 ..... Dn - 5 ..... Dn -13 Dn - 13 X H Dn + 3 OFF Dn - 13 OUTn = ON when Dn = H OUTn = OFF when Dn = L Figure 7. Note: STP16DPS05 Timing diagram 1 Latch and output enable are level sensitive and ARE NOT synchronized with rising-or-falling edge of CLK signal. 2 When LE/DM1 terminal is low level, the latch circuits hold previous set of data 3 When LE/DM1 terminal is high level, the latch circuits refresh new set of data from SDI chain. 4 When OE/DM2 terminal is at low level, the output terminals - Out0 to Out15 respond to data in the latch circuits, either '1' for ON or '0' for OFF 5 When OE/DM2 terminal is at high level, all output terminals will be switched OFF. Doc ID 16538 Rev 2 STP16DPS05 Figure 8. Timing diagrams Clock, serial-in, serial-out Doc ID 16538 Rev 2 11/34 Timing diagrams Figure 9. STP16DPS05 Clock, serial-in, latch, enable, outputs LE/DM1 OE/DM2 Figure 10. Outputs 12/34 Doc ID 16538 Rev 2 STP16DPS05 6 Typical characteristics Typical characteristics Figure 11. Output current-REXT resistor Table 10. Output current-REXT resistor Rext (Ω) Output current (mA) 976 20 780 25 652 30 560 35 488 40 433 45 389 50 354 55 325 60 300 65 278 70 259 75 241 80 229 85 Doc ID 16538 Rev 2 13/34 Typical characteristics STP16DPS05 Conditions: Temperature = 25 °C, VDD = 3.3 V; 5.0 V, ISET = 3 mA; 5 mA; 10 mA; 20 mA; 50 mA; 80 mA. Vdrop (mV) Figure 12. ISET vs drop out voltage (Vdrop) 800 700 600 500 400 300 200 100 0 Avg @ 3.0V Avg @ 5.0V 0 20 40 60 80 Iset mA) Table 11. 14/34 ISET vs drop out voltage (Vdrop) Iout (mA) Avg @ 3.0 V Avg @ 5.0 V 3 19.33 22.66 5 36.67 40.33 10 77.33 80 20 158.67 157.33 50 406 406 80 692 668 Doc ID 16538 Rev 2 STP16DPS05 Typical characteristics Figure 13. IDD ON/OFF 14 12 Idd (mA) 10 8 IddON Avg @ 5.5V IddON Avg @ 3.6V 6 IddOFF Avg @ 5.5V 4 IddOFF Avg @ 3.6V 2 0 0 10 20 30 40 50 Iset (mA) 60 Doc ID 16538 Rev 2 70 80 90 15/34 Detection mode functionality STP16DPS05 7 Detection mode functionality 7.1 Phase one: “entering in detection mode“ From the “normal mode” condition the device can switch to the “error mode” by a logic sequence on the OE/DM2 and LE/DM1 pins as showed in the following table and diagram: Table 12. Entering in detection truth table CLK 1° 2° 3° 4° 5° OE/DM2 H L H H H LE/DM1 L L L H L Figure 14. Entering in detection timing diagram After these five CLK cycles the device goes into the “error detection mode” and at the 6th rise front of CLK the SDI data are ready for the sampling. 16/34 Doc ID 16538 Rev 2 STP16DPS05 7.2 Detection mode functionality Phase two: “error detection” The 16 data bits must be set “1” in order to set ON all the outputs during the detection. The data are latched by LE/DM1 and after that the outputs are ready for the detection process. When the microcontroller switches the OE/DM2 to LOW, the device drives the LEDs in order to analyze if an OPEN or SHORT condition has occurred. Figure 15. Detection diagram The LEDs status will be detected at least in 1 microsecond and after this time the microcontroller sets OE/DM2 in HIGH state and the output data detection result will go to the microprocessor via SDO. Detection mode and normal mode use both the same format data. As soon as all the detection data bits are available on the serial line, the device may go back to normal mode of operation. To re-detect the status the device must go back in normal mode and reentering in error detection mode. Doc ID 16538 Rev 2 17/34 Detection mode functionality STP16DPS05 Figure 16. Timing example for open and/or short detection 18/34 Doc ID 16538 Rev 2 STP16DPS05 7.3 Detection mode functionality Phase three: “resuming to normal mode” The sequence for re-entering in normal mode is showed in the following table and diagram: Figure 17. Resuming to normal mode timing diagram CLK 1° 2° 3° 4° 5° OE/DM2 H L H H H LE/DM1 L L L L L Note: For proper device operation the “Entering in detection” sequence must be follow by a “resume mode” sequence, it is not possible to insert consecutive equal sequence. 7.4 Error detection conditions VDD = 3.3 to 5 V temperature range -40 to 125 °C Table 13. Note: Detection conditions SW-1 or SW-3b Open line or output ==> IODEC ≤ 0.5 x IO short to GND detected No error detected ==> IODEC ≥ 0.5 x IO SW-2 or SW-3a Short on LED or short ==> VO ≥ 2.4 V to V-LED detected No error detected ==> VO ≤ 2.2 V Where: IO = the output current programmed by the REXT, IODEC = the detected output current in detection mode Figure 18. Detection circuit 16 STP16DP05 Doc ID 16538 Rev 2 19/34 Detection mode functionality STP16DPS05 Figure 19. Error detection sequence 16 CLK pulse are required to load the data setting 1 into shift register LE/DM1 and OE/DM2 Key Sequence necessary to Enter in EDM 20/34 During the error detection are necessary at least 2 CLK signal plus oneat the end Every CLK pulse shows the results of single Output results:Out15;14; 13 etc. etc After OE/DM2 signal turn High the SDO pin show the results of Error Detection (Open or Short in this case) The LE/DM1 pulse latch the data loaded during the previous state Doc ID 16538 Rev 2 The OE/DM2 Pulse put the device from EDM to Normal Mode STP16DPS05 Detection mode functionality Typical schematic used to perform the error detection: Figure 20. Error detection typical schematic Vled Vdd IDEC Iset Out Rload REXT DUT GND Using the follow formula is possible measure the Iodec IODEC = (Vled-Vload) / Rload The tables below shows the IODEC average value at 3.3 V and 5.0 V of power supply voltage. The IODEC is the current value recognized by the devices output open error detection IODEC average value at 3.3 V Table 14. Vdd (V) 3.3 Table 15. Iset (mA) Rext (Ω) Iout AVG (mA) 5 4270 2.097 10 2056 6.79 20 1006 10.46 50 382 26.92 80 251 35.03 Iset (mA) Rext (Ω) Iout AVG (mA) 5 4270 1.98 10 2056 6.09 20 1006 9.67 50 382 25.54 80 251 38.9 IODEC average value at 5 V Vdd (V) 5 Doc ID 16538 Rev 2 21/34 Detection mode functionality 7.5 STP16DPS05 Auto power-saving The auto power-saving feature minimizes the quiescent current if no active data is detected on the latches and auto powers-up the device as the first active data is latched. Figure 21. Auto power-saving feature Conditions: Temp. = 25 °C, Vdd = 3.3 V, Vin = Vdd, VLed = 3.0 V, Iset = 20 mA Ch1 (Yellow) = IDD, Ch2 (Blue) = SDI, Ch3 (Purple) = LE/DM1, Ch4 (Green) = CLK Idd consumption: Idd (normal operation) = 5.15 mA Idd (shutdown condition) = 163 µA 22/34 Doc ID 16538 Rev 2 STP16DPS05 Detection mode functionality Figure 22. Delay LE-OUT After 16 clock cycles without data change, device will enter in Auto power save mode as expected. Delay TLE-OUT = 1.053 µs Conditions: Temp. = 25 °C, Vdd = 3.3 V, Vin = Vdd, VLed = 3.0 V, Iset = 20 mA Ch1 (Yellow) = CLK, Ch2 (Blue) = SDI, Ch3 (Purple) = LE/DM1, Ch4 (Green) = IOUT Doc ID 16538 Rev 2 23/34 Detection mode functionality STP16DPS05 Figure 23. Behaviour auto power saving Note: When the device goes from auto power-saving to normal operating condition, the first output that switches ON shows the TON condition as seen in the plot above. Temp. = 25°C, Vdd = 3.3 V, Vin = Vdd, VLed = 3.0 V, Iset = 20 mA Ch1 (Yellow) = IDD, Ch2 (Blue) = SDI, Ch3 (Purple) = LE/DM1, Ch4 (Green) = CLK 24/34 Doc ID 16538 Rev 2 STP16DPS05 8 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark . Table 16. QSOP-24 mechanical data mm. inch Dim. Min. Typ. Max. Min. Typ. Max. A 1.54 1.62 1.73 0.061 0.064 0.068 A1 0.1 0.15 0.25 0.004 0.006 0.010 A2 1.47 0.058 b 0.31 0.2 0.012 0.008 c 0.254 0.17 0.010 0.007 D 8.56 8.66 8.76 0.337 0.341 0.345 E 5.8 6 6.2 0.228 0.236 0.244 E1 3.8 3.91 4.01 0.150 0.154 0.158 e 0.635 0.025 L 0.4 0.635 0.89 0.016 0.025 0.035 h 0.25 0.33 0.41 0.010 0.013 0.016 < 8° 0° Doc ID 16538 Rev 2 25/34 Package mechanical data STP16DPS05 Figure 24. QSOP-24 package dimensions 26/34 Doc ID 16538 Rev 2 STP16DPS05 Package mechanical data Table 17. QSOP-24 tape and reel mm. inch Dim. R1 Min Typ Max Min Typ Max 12.8 13 13.5 5.039 5.118 5.315 R2 330 129.921 R3 100 39.37 eint 16.4 6.457 e1 Table 18. 1.5 2 2.5 0.591 0.787 0.984 QSOP-24 tape and reel dimensions 4.0+/-0.1 1.5+1/0 0.3+/-0.05 2.0+/-0.1 7.5+/-0.1 10.3 +/-0.1 8 +/-0.1 2.1 +/-0.1 1.75+/-0.1 16 +/-0.3 1.6 +1/-0.1 6.5 +/- 0.1 7217811_C Doc ID 16538 Rev 2 27/34 Package mechanical data Table 19. STP16DPS05 TSSOP24 mechanical data mm. inch Dim. Min. Typ. A A1 Max. Typ. 1.1 0.05 A2 0.15 Max. 0.043 0.002 0.9 0.006 0.035 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 D 7.7 7.9 0.303 0.311 E 4.3 4.5 0.169 0.177 e 0.65 BSC 0.0256 BSC H 6.25 6.5 0.246 0.256 K 0° 8° 0° 8° L 0.50 0.70 0.020 0.028 Figure 25. TSSOP24 package dimensions 28/34 Min. Doc ID 16538 Rev 2 STP16DPS05 Package mechanical data Table 20. TSSOP24 tape and reel mm. inch Dim. Min. A Typ. Max. - 330 13.2 Min. Typ. Max. - 12.992 0.504 - 0.519 C 12.8 - D 20.2 - 0.795 - N 60 - 2.362 - T - 22.4 - 0.882 Ao 6.8 - 7 0.268 - 0.276 Bo 8.2 - 8.4 0.323 - 0.331 Ko 1.7 - 1.9 0.067 - 0.075 Po 3.9 - 4.1 0.153 - 0.161 P 11.9 - 12.1 0.468 - 0.476 Figure 26. Reel dimensions Doc ID 16538 Rev 2 29/34 Package mechanical data Table 21. STP16DPS05 SO-24 mechanical data mm. inch Dim. Min. Typ. A a1 Max. Min. 2.65 0.1 Max. 0.104 0.2 a2 0.004 0.008 2.45 0.096 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.012 C 0.5 0.020 c1 45°(typ.) D 15.20 15.60 0.598 0.614 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 13.97 0.550 F 7.40 7.60 0.291 0.300 L 0.50 1.27 0.020 0.050 S °(max.) 8 Figure 27. SO-24 package dimensions 30/34 Typ. Doc ID 16538 Rev 2 STP16DPS05 Package mechanical data Table 22. SO-24 tape and reel mm. inch Dim. Min. A Typ. Max. - 330 13.2 Min. Typ. Max. - 12.992 0.504 - 0.519 C 12.8 - D 20.2 - 0.795 - N 60 - 2.362 - T - 30.4 - 1.197 Ao 10.8 - 11.0 0.425 - 0.433 Bo 15.7 - 15.9 0.618 - 0.626 Ko 2.9 - 3.1 0.114 - 0.122 Po 3.9 - 4.1 0.153 - 0.161 P 11.9 - 12.1 0.468 - 0.476 Figure 28. Reel dimensions Doc ID 16538 Rev 2 31/34 Package mechanical data Table 23. STP16DPS05 TSSOP24 exposed pad mm inch Dim. Min. Typ. Max. A 1.2 A1 0.15 A2 0.8 b Max. 0.047 0.004 0.006 0.039 0.041 0.031 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 7.7 7.8 7.9 0.303 0.307 0.311 D1 4.7 5.0 5.3 0.185 0.197 0.209 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.5 0.169 0.173 0.177 E2 2.9 3.2 3.5 0.114 0.126 0.138 0.65 K 0° L 0.45 0.60 0.0256 8° 0° 0.75 0.018 Figure 29. TSSOP24 dimensions 32/34 Typ. 1.05 e 1 Min. Doc ID 16538 Rev 2 8° 0.024 0.030 STP16DPS05 9 Revision history Revision history Table 24. Document revision history Date Revision Changes 23-Oct-2009 1 First release 22-Jan-2010 2 Updated Table 5 on page 4 Doc ID 16538 Rev 2 33/34 STP16DPS05 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2010 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 34/34 Doc ID 16538 Rev 2