TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 D D D D D D D Power-On Reset Generator Automatic Reset Generation After Voltage Drop TL77xxBC . . . D OR P PACKAGE TL7705BM . . . JG PACKAGE TL7705BQ . . . D PACKAGE (TOP VIEW) RESET Output Defined From VCC ≥ 1 V REF RESIN CT GND Precision Voltage Sensor Temperature-Compensated Voltage Reference 8 2 7 3 6 4 5 VCC SENSE RESET RESET TL7705BM . . . U PACKAGE (TOP VIEW) True and Complement Reset Outputs Externally Adjustable Pulse Duration NC REF RESIN CT GND description •1 10 2 9 3 8 4 7 5 6 NC VCC SENSE RESET RESET NC – No internal connection NC REF NC VCC NC TL7705BM . . . FK PACKAGE (TOP VIEW) NC RESIN NC CT NC 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC SENSE NC RESET NC NC GND NC RESET NC The TL7702B and TL7705B are integrated-circuit supply-voltage supervisors designed for use as reset controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active (low) when VCC attains a value approaching 1 V. As VCC approaches 3 V (assuming that SENSE is above VT+), the delay timer function activates a time delay, after which outputs RESET and RESET go inactive (high and low, respectively). When an undervoltage condition occurs during normal operation, outputs RESET and RESET go active. To ensure that a complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input exceeds the positive-going threshold value. The time delay is determined by the value of the external capacitor CT: td ≈ 2.6 × 104 × CT, where CT is in farads (F) and td is in seconds (s). 1 NC – No internal connection An external capacitor (typically 0.1 µF) must be connected to REF to reduce the influence of fast transients in the supply voltage. The TL7702BC and TL7705BC are characterized for operation from 0°C to 70°C. The TL7702BI and TL7705BI are characterized for operation from –40°C to 85°C. The TL7705BQ is characterized for operation from –40°C to 125°C. The TL7705BM is characterized for operation from –55°C to 125°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C –40°C 40°C to 85°C –40°C to 125°C –55°C 55°C to 125°C SMALL OUTLINE (D) CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) CERAMIC FLATPACK (U) TL7702BCD — — TL7702BCP — TL7705BCD — — TL7705BCP — TL7702BID — — TL7702BIP — TL7705BID — — TL7705BIP — TL7705BQD — — — — — TL7702BMFK TL7702BMJG — TL7702BMU — TL7705BMFK TL7705BMJG — TL7705BMU CHIP FORM (Y) TL7702BY, TL7705BY The D package is available taped and reeled. Add the suffix R to device type (e.g., TL7702BCDR). Chip forms are tested at 25°C. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 functional block diagram The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming network to adjust the reference voltage and sense-comparator trip point. VCC 8 Reference Voltage CT ≈ 70 µA 6 3 7 5 SENSE RESET RESET R1 (see Note A) R2 (see Note A) 2 RESIN 1 REF 4 GND Pin numbers shown are for the D, JG, and P packages. NOTE A: TL7702B: R1 = 0 Ω, R2 = open TL7705B: R1 = 23 kΩ, R2 = 10 kΩ, nominal typical timing diagram VCC and SENSE VIT+ VIT– VIT+ Vres VIT– Vres 0 RESET ÎÎÎÎ ÎÎÎÎ td td ÎÎÎÎÎ ÎÎÎÎÎ Output Undefined Output Undefined 0 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V Input voltage range, VI: RESIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V SENSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V High-level output current, IOH (RESET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA Low-level output current, IOL (RESET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W Case temperature for 60 seconds, TC: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG or U packages . . . . . . . . . . . . . . 300°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P packages . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to the network ground terminal. 2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability. 3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero. recommended operating conditions Supply voltage, VCC MAX 3.6 18 UNIT V High-level input voltage, VIH RESIN 2 18 V Low-level input voltage, VIL RESIN 0 0.8 V Input voltage, VI SENSE 0 18 V High-level output current, IOH RESET –16 mA Low-level output current, IOL RESET 16 mA TL770xBC Operating free-air free air temperature range, range TA 4 MIN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0 70 TL770xBI –40 85 TL7705BQ –40 125 TL7705BM –55 125 °C TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 electrical characteristics over recommended operating conditions (unless otherwise noted) TL77xxBC TL77xxBI TL7705BQ TEST CONDITIONS† PARAMETER MIN VOH VOL High-level output voltage, RESET Low-level output voltage, RESET IOH = –16 mA IOL = 16 mA Vref Reference voltage Iref = 500 µA, TL7702B VIT IT– Negative-going input threshold voltage at SENSE in input ut TL7705B TL7702B TL7705B TL7702B Vh hys Hysteresis, y , SENSE (VIT+ – VIT–) Vres§ Power-up reset voltage II Input current IOH IOL High-level output current, RESET ICC TL7705B RESIN SENSE TL7702B Low-level output current, RESET MAX VCC–1.5 TA = 25°C TA = 25°C TA = ffullll range‡ VCC = 3.6 3 6 V to 18 V, V TA = 25°C IOL at RESET = 2 mA, VI = 0.4 V to VCC TA = 25°C V 0.4 V V 2.48 2.53 2.58 2.505 2.53 2.555 4.5 4.55 4.6 2.48 2.53 2.58 4.45 4.55 4.65 10 1 –0.1 V mV 30 –10 VI = Vref to 18 V VO = 18 V, VO = 0 V, VSENSE = 15 V, Supply current TYP UNIT –2 V µA µA See Figure 1 50 See Figure 1 –50 µA 3 mA RESIN ≥ 2 V 1.8 3.5 mA VCC = 18 V, TA = full range‡ † All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND. ‡ Full range is 0°C to 70°C for the C-suffix devices, –40°C to 85°C for the I-suffix devices, and –40°C to 125°C for the Q-suffix device. § This is the lowest voltage at which RESET becomes active. switching characteristics, VCC = 5 V, CT open, TA = 25°C PARAMETER FROM (INPUT) ( ) TO ((OUTPUT)) TEST CONDITIONS TL77xxBC TL77xxBI TL7705BQ MIN Propagation delay time from low- to high-level output RESIN tPHL Propagation delay time from high- to low-level output RESIN tw Effective pulse duration tr tf Rise time tr tf Rise time tPLH Fall time Fall time RESET UNIT TYP MAX 270 500 ns 270 500 ns See Figures 1 1, 2, 2 and 3 RESET RESIN See Figure 2 SENSE 150 ns 100 75 RESET See Figures 1 and 3 RESET POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 150 200 75 150 50 ns ns 5 TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 electrical characteristics over recommended operating conditions (unless otherwise noted) VOH VOL High-level output voltage, RESET Low-level output voltage, RESET IOH = –16 mA IOL = 16 mA Vref Reference voltage Iref = 500 µA, TL7702B VIT IT– Negative-going input threshold voltage at SENSE in input ut TL7705B TL7702B TA = 25°C TA = 25°C 55°C to 125°C TA = –55°C Hysteresis, y , SENSE (VIT+ – VIT–) Vres‡ Power-up reset voltage II Input current IOH IOL High-level output current, RESET VI = Vref to VCC – 1.5 V VO = 18 V Low-level output current, RESET VO = 0 TL7705B RESIN TL7702B TYP UNIT MAX VCC–1.5 Vh hys ICC MIN TL7702B TL7705B SENSE TL7705BM TEST CONDITIONS† PARAMETER VCC = 3 3.6 6 V to 18 V, V TA = 25°C IOL at RESET = 2 mA, VI = 0.4 V to VCC TA = 25°C V 0.4 V V 2.48 2.53 2.58 2.505 2.53 2.555 4.5 4.55 4.6 2.48 2.53 2.58 4.45 4.55 4.65 10 1 –10 VSENSE = 15 V, RESIN ≥ 2 V VCC = 18 V, TA = –55°C to 125°C 1.8 V mV 30 –0.1 Supply current UNIT –2 V µA 50 µA –50 µA 3 mA 4 † All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND. ‡ This is the lowest value at which RESET becomes active. switching characteristics, VCC = 5 V, CT open, TA = 25°C FROM (INPUT) TO (OUTPUT) Propagation delay time from low- to high-level output RESIN RESET tPHL Propagation delay time from high- to low-level output RESIN tw Effective pulse duration tr tf Rise time tr tf Rise time PARAMETER tPLH Fall time Fall time TEST CONDITIONS UNIT TYP MAX 270 500* ns 270 500* ns See Figures 1, 1 2, 2 and 3 RESET RESIN See Figure 2 SENSE 150 ns 100 75* RESET See Figures 1 and 3 RESET * On products compliant to MIL-PRF-38535, these parameters are not production tested. 6 TL7705BM MIN POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 150 200* 75 150* 50* ns ns TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 electrical characteristics over recommended operating conditions, TA = 25°C (unless otherwise noted) TL7702BY TL7705BY TEST CONDITIONS† PARAMETER MIN VOH VOL High-level output voltage, RESET Low-level output voltage, RESET IOH = –16 mA IOL = 16 mA Vref Reference voltage Iref = 500 µA VIT IT– Negative-going g g g input threshold voltage g at SENSE input Vh hys Hysteresis SENSE (VIT+ Hysteresis, IT – VIT– IT ) Vres‡ Power-up reset voltage II Input current IOH IOL High-level output current, RESET UNIT MAX VCC–1.5 V 0.4 V V 2.48 2.53 2.58 TL7702BY 2.505 2.53 2.555 TL7705BY 4.5 4.55 4.6 TL7702BY TL7705BY 10 3 6 V to 18 V VCC = 3.6 TL7702BY VI = Vref to 18 V VO = 18 V, 1 –10 –0.1 See Figure 1 –2 50 Low-level output current, RESET VO = 0 V, See Figure 1 ICC Supply current VSENSE = 15 V, RESIN ≥ 2 V † All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND. ‡ This is the lowest voltage at which RESET becomes active. 1.8 V mV 30 IOL at RESET = 2 mA VI = 0.4 V to VCC RESIN SENSE TYP V µA µA –50 µA 3 mA switching characteristics, VCC = 5 V, CT open, TA = 25°C FROM (INPUT) TO (OUTPUT) Propagation delay time from low- to high-level output RESIN RESET tPHL Propagation delay time from high- to low-level output RESIN tw Effective pulse duration tr tf Rise time tr tf Rise time PARAMETER tPLH Fall time Fall time TEST CONDITIONS TL7702BY TL7705BY MIN UNIT TYP MAX 270 500 ns 270 500 ns See Figures 1 1, 2, 2 and 3 RESET RESIN See Figure 2 SENSE 150 ns 100 75 RESET See Figures 1 and 3 RESET POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 150 200 75 150 50 ns ns 7 TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 PARAMETER MEASUREMENT INFORMATION 5V 5V VCC RL (see Note A) DUT RESET DUT 15 pF (see Note B) RESET RL (see Note A) GND 15 pF (see Note B) RESET OUTPUT CONFIGURATION RESET OUTPUT CONFIGURATION NOTES: A. For IOL and IOH, RL = 10 kΩ. For all switching characteristics, RL = 511 Ω. B. This figure includes jig and probe capacitance. Figure 1. RESET and RESET Output Configurations tw tw VT + 2 V VT 5V 2.5 V 0V VT – 2 V RESIN SENSE WAVEFORMS Figure 2. Input Pulse Definition Voltage Fault VIT+ SENSE VIT+ VIT– 0V VIH RESIN Undefined 2V 0.8 V tf tr VIL tPLH 90% 90% RESET 90% 50% 10% tf td td Î Î td 90% 50% RESET 10% 10% tr 10% tPHL Figure 3. Voltage Waveforms 8 VOH POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10% V OL TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 TYPICAL CHARACTERISTICS† DEASSERTION TIME vs LOAD RESISTANCE ASSERTION TIME vs LOAD RESISTANCE 700 20 VCC = 5 V CT = 0.1 µF CL = 10 pF TA = 25°C 600 t – Deassertion Time – ns t – Assertion Time – ns 18 16 RESET tr 14 12 10 8 6 2 4 500 RESET tf 400 300 RESET tf 200 RESET tr 6 8 0 10 0 2 RL – Load Resistance – kΩ 4 8 10 Figure 5 ASSERTION TIME vs LOAD CAPACITANCE DEASSERTION TIME vs LOAD CAPACITANCE 36 2.1 VCC = 5 V CT = 0.1 µF RL = 4.7 kΩ TA = 25°C VCC = 5 V CT = 0.1 µF RL = 4.7 kΩ TA = 25°C 1.9 t – Deassertion Time – µ s t – Assertion Time – ns 6 RL – Load Resistance – kΩ Figure 4 30 RESET tr 100 RESET tf 0 VCC = 5 V CT = 0.1 µF CL = 10 pF TA = 25°C 24 RESET tr 18 RESET tf 1.7 1.5 1.3 1.1 RESET tf and RESET tr 0.9 0.7 12 0.5 6 0.3 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 CL – Load Capacitance – pF CL – Load Capacitance – pF Figure 6 Figure 7 † For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted plateauing in either output waveform during switching. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TL7702B, TL7705B SUPPLY-VOLTAGE SUPERVISORS SLVS037H – SEPTEMBER 1989 – REVISED JULY 1999 APPLICATION INFORMATION VS System Supply 8 7 VCC SENSE RESET 10 kΩ 5 To System RESET 2 Reset Input (from system) RESIN 1 REF RT 3 6 CT (see text) 0.1 µF To System RESET RESET GND CT 4 10 kΩ Figure 8. System Reset Controller With Undervoltage Sensing When the TL770xB SENSE terminal is used to monitor VCC, a current-limiting resistor in series with CT is recommended. During normal operation, the timing capacitor is charged by the onboard current source to approximately VCC or an internal voltage clamp (≈7.1-V zener), whichever is less. When the circuit is then subjected to an undervoltage condition during which VCC is rapidly slewed down, the voltage on CT exceeds that on VCC. This forward biases a secondary path internally, which falsely activates the outputs. A fault is indicated when VCC drops below V(CT), not when VSENSE falls below VT–. Texas Instruments performs a 100% electrical screen to verify that the outputs do not switch with 1 mA forced into the CT terminal. Adding the external resistor, RT, prevents false triggering. Its value is calculated as follows: V (CT) *V * T RT Where: V(CT) = VCC or 7.1 V, whichever is less VT– = 4.55 V (nom) RT = value of series resistor required For VCC = 5 V: 5 * 4.55 t 1 mA R T Therefore, RT u 450 W Using a 20% tolerance resistor, RT should be greater than 560 Ω. Adding this series resistor changes the duration of the reset pulse by no more than 10%. RT extends the discharge of CT, but also skews the V(CT) threshold. These effects tend to cancel one another. The precise percentage change can be derived theoretically, but the equation is complicated by this interaction and is dependent upon the duration of the supply-voltage fault condition. Both outputs of the TL770xB should be terminated with similar value resistors, even when only one is being used. This prevents unwanted plateauing in either output waveform during switching, which may be interpreted as an undefined state or delay system reset. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1999, Texas Instruments Incorporated