Obsolete Device TCM680 +5V To ±10V Voltage Converter Features General Description • 99% Voltage Conversion Efficiency • 85% Power Conversion Efficiency • Input Voltage Range: - +2.0V to +5.5V • Only 4 External Capacitors Required • 8-Pin SOIC Package The TCM680 is a dual charge pump, voltage converter that produces output voltages of +2VIN and -2VIN from a single input voltage of +2.0V to +5.5V. Common applications include ±10V from a single +5V logic supply and ±6V from a +3V lithium battery. The TCM680 is packaged in 8-pin SOIC and PDIP packages and requires only four inexpensive, external capacitors. The charge pumps are clocked by an onboard 8 kHz oscillator. Low output source impedances (typically 140 Ω) provide maximum output currents of 10 mA for each output. Typical power conversion efficiency is 85%. Applications • • • • • • • ±10V From +5V Logic Supply ±6V From a 3V Lithium Cell Handheld Instruments Portable Cellular Phones LCD Display Bias Generator Panel Meters Operational Amplifier Power Supplies High efficiency, small size and low cost make the TCM680 suitable for a wide variety of applications that need both positive and negative power supplies derived from a single input voltage. Package Type Typical Operating Circuit PDIP +5V C1 + 4.7 µF C2 + 4.7 µF C1+ VIN VOUT C1- C4 + 4.7 µF + VOUT+ = (2 x VIN) TCM680 VOUTGND GND 1 C2+ 2 C2 - C2+ C2- C1 - 7 C1 + TCM680CPA 3 TCM680EPA 6 VIN VOUT- 4 5 GND C1 - 1 8 VOUT+ C2+ 2 VOUT- = -(2 x VIN) SOIC C3 + 4.7 µF GND C2 VOUT- © 2005 Microchip Technology Inc. 8 VOUT+ 7 C1 + TCM680COA 3 TCM680EOA 6 VIN 4 5 GND DS21486C-page 1 TCM680 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability Absolute Maximum Ratings† VIN .......................................................................+5.8V VOUT+ ................................................................ +11.6V VOUT– .................................................................-11.6V VOUT+ Short-Circuit Duration...................... Continuous VOUT+ Current ....................................................75 mA VIN dV/dT ....................................................... 1 V/µsec Power Dissipation (TA ≤ 70°C) 8-Pin PDIP ..............................................730 mW 8-Pin SOIC ..............................................470 mW Operating Temperature Range.............-40°C to +85°C Storage Temperature Range ..............-65°C to +150°C Maximum Junction Temperature ...................... +150°C DC CHARACTERISTICS Electrical Specifications: Unless otherwise noted, VIN = +5V, TA = +25°C, refer to Figure 1-1. Parameters Supply Voltage Range Supply Current Negative Charge Pump Output Source Resistance Positive Charge Pump Output Source Resistance Sym Min VIN IIN ROUT- Typ Max 2.0 — 5.5 V — 0.5 1.0 mA — 1.0 2.0 VIN = 5V, RL = ∞ — — 2.5 VIN = 5V, 0°C ≤ TA ≤ +70°C, RL = ∞ — — 3.0 VIN = 5V, -40°C ≤ TA ≤ +85°C, RL = ∞ — 140 180 — 180 250 IL– = 5 mA, IL+ = 0 mA, VIN = 2.8V — — — — — — 220 250 — 0°C ≤ TA ≤ + 70°C -40°C ≤ TA ≤ + 85°C IL– = 10 mA, IL+ = 0 mA, VIN = 5V 140 180 — 180 250 IL+= 5 mA, IL– = 0 mA, VIN = 2.8V — — — — — — 220 250 — 0°C ≤ TA ≤ + 70°C -40°C ≤ TA ≤ + 85°C IL+ = 10 mA, IL– = 0 mA, VIN = 5V ROUT+ Units Ω Ω Conditions -40°C ≤ TA ≤ +85°C, RL = 2 kΩ VIN = 3V, RL = ∞ IL– = 10 mA, IL+ = 0 mA, VIN = 5V IL+= 10 mA, IL– = 0 mA, VIN = 5V Oscillator Frequency FOSC — 21 — kHz Power Efficiency PEFF — 85 — % RL = 2 kΩ VOUTEFF 97 99 — % VOUT+, RL = ∞ 97 99 — Voltage Conversion Efficiency DS21486C-page 2 VOUT–, RL = ∞ © 2005 Microchip Technology Inc. TCM680 VIN C1 C2 + + 4.7 µF 1 C 1 VOUT+ 8 2 C + 2 C1+ 7 4.7 µF TCM680 3 C 2 4 VOUT- VIN GND VOUT+ + C4 10 µF RL+ 6 5 GND + C3 10 µF RLVOUT- FIGURE 1-1: Test Circuit Used For DC Characteristics Table. © 2005 Microchip Technology Inc. DS21486C-page 3 TCM680 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, VIN = +5V, TA = +25°C. 300 10.0 250 VOUT (V) Output Resistance (Ω) C1 = C4 = 10 μF 200 9.0 8.0 150 ROUT 100 2 1 4 3 5 7.0 6 5 10 Load Current (mA) 0 VIN (V) FIGURE 2-1: Output Resistance vs. VIN. FIGURE 2-4: Current. 1.4 15 VOUT+ or VOUT- vs. Load 10.0 1.0 9.0 0.8 VOUT (V) Supply Current (mA) 1.2 RL = ∞ 0.6 8.0 0.4 0.2 1 2 4 3 5 6 VIN (V) FIGURE 2-2: Output Source Resistance (Ω) 180 Supply Current vs. VIN. 7.0 0 6 8 4 2 Output Current (mA) From VOUT+ To VOUT– FIGURE 2-5: Current. 10 Output Voltage vs. Output IOUT = 10 mA 160 ROUT 140 120 100 -50 FIGURE 2-3: vs. Temperature. DS21486C-page 4 0 50 Temperature (˚C) 100 Output Source Resistance © 2005 Microchip Technology Inc. TCM680 3.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 3-1. TABLE 3-1: Pin No. (8-Pin PDIP, SOIC) 1 PIN FUNCTION TABLE Symbol C1- Description Input. First charge pump capacitor. Negative connection 2 C2+ Input. Second charge pump capacitor. Positive connection. 3 C2- Input. Second charge pump capacitor. Negative connection. 4 VOUT- Output. Negative Output voltage 5 GND Input. Ground connection. 6 VIN Input. Power supply. 7 C1+ Input. First charge pump capacitor. Positive connection. 8 VOUT+ Output. Positive Output Voltage. 3.1 First Charge Pump Capacitor (C1-) Negative connection for the charge pump capacitor (flying capacitor) used to transfer charge from the input source to a second charge pump capacitor. This charge pump capacitor is used to double the input voltage and store the charge in the second charge pump capacitor. It is recommended that a low ESR (equivalent series resistance) capacitor be used. Additionally, larger values will lower the output resistance. 3.2 Second Charge Pump Capacitor (C2+) 3.4 Negative Output Voltage (VOUT-) Negative connection for the negative charge pump output capacitor. The negative charge pump output capacitor supplies the output load during the first, third and fourth phases of the switching cycle. During the second phase of the switching cycle, charge is restored to the negative charge pump output capacitor. The negative output voltage magnitude is approximately twice the input voltage. It is recommended that a low ESR (equivalent series resistance) capacitor be used. Additionally, larger values will lower the output ripple. 3.5 Ground (GND) Input zero volt reference. 3.6 Power Supply Input (VIN) Positive power supply input voltage connection. It is recommended that a low ESR (equivalent series resistance) capacitor be used to bypass the power supply input to ground (GND). 3.7 First Charge Pump Capacitor (C1+) Positive connection for the charge pump capacitor (flying capacitor) used to transfer charge from the input source to a second charge pump capacitor. Proper orientation is imperative when using a polarized capacitor. 3.8 Positive Output Voltage (VOUT+) Positive connection for the positive charge pump output capacitor. The positive charge pump output capacitor supplies the output load during the first, second and third phases of the switching cycle. During the fourth phase of the switching cycle, charge is restored to the positive charge pump output capacitor. The positive output voltage magnitude is approximately twice the input voltage. It is recommended that a low ESR (equivalent series resistance) capacitor be used. Additionally, larger values will lower the output ripple. Positive connection for the second charge pump capacitor (flying capacitor) used to transfer charge from the first charge pump capacitor to the output. It is recommended that a low ESR (equivalent series resistance) capacitor be used. Additionally, larger values will lower the output resistance. 3.3 Second Charge Pump Capacitor (C2-) Negative connection for the second charge pump capacitor (flying capacitor) used to transfer charge from the first charge pump capacitor to the output. Proper orientation is imperative when using a polarized capacitor. © 2005 Microchip Technology Inc. DS21486C-page 5 TCM680 VOUT+ Charge Storage - Phase 3 4.0 DETAILED DESCRIPTION 4.3 4.1 VOUT- Charge Storage - Phase 1 The third phase of the clock is identical to the first phase – the charge stored in C1 produces -5V in the negative terminal of C1, which is applied to the negative side of capacitor C2. Since C2+ is at +5V, the voltage potential across C2 is 10V. The positive side of capacitors C1 and C2 are connected to +5V at the start of this phase. C1+ is then switched to ground and the charge in C1– is transferred to C2–. Since C2+ is connected to +5V, the voltage potential across capacitor C2 is now 10V. VIN = +5V – VIN = +5V – + SW1 + – – – VOUT- C2 – + SW4 VOUT- – SW2 C2 – + SW4 VOUT- Transfer - Phase 2 Phase two of the clock connects the negative terminal of C2 to the VOUT- storage capacitor C3 and the positive terminal of C2 to ground, transferring the generated -10V to C3. Simultaneously, the positive side of capacitor C1 is switched to +5V and the negative side is connected to ground. Charge Pump - Phase 3. VOUT+ Transfer - Phase 4 4.4 The fourth phase of the clock connects the negative terminal of C2 to ground and transfers the generated 10V across C2 to C4, the VOUT+ storage capacitor. Simultaneously, the positive side of capacitor C1 is switched to +5V and the negative side is connected to ground, and the cycle begins again. +5V – +5V + + SW1 + – C1 VOUT+ SW3 – SW2 -5V FIGURE 4-2: DS21486C-page 6 C2 SW4 SW1 C4 VOUT- + – + C3 -5V Charge Pump - Phase 1. – VOUT+ SW3 FIGURE 4-3: FIGURE 4-1: C4 + C1 C3 -5V 4.2 + VOUT+ SW3 SW2 SW1 C4 + C1 + C3 -10V + – C1 -5V FIGURE 4-4: VOUT+ SW3 + – SW2 C4 C2 VOUT– + SW4 C3 -10V Charge Pump - Phase 4. Charge Pump - Phase 2. © 2005 Microchip Technology Inc. TCM680 4.5 Maximum Operating Limits The maximum input voltage rating must be observed. The TCM680 will clamp the input voltage to 5.8V. Exceeding this maximum threshold will cause excessive current to flow through the TCM680, potentially causing permanent damage to the device. 4.6 Switched Capacitor Converter Power Losses The overall power loss of a switched capacitor converter is affected by four factors: 1. 2. 3. 4. Losses from power consumed by the internal oscillator, switch drive, etc. These losses will vary with input voltage, temperature and oscillator frequency. Conduction losses in the non-ideal switches. Losses due to the non-ideal nature of the external capacitors. Losses that occur during charge transfer from the pump to reservoir capacitors when a voltage difference between the capacitors exists. The power loss for the TCM680 is calculated using the following equation: EQUATION PLOSS = (IOUT+)2 X ROUT- + (IOUT-)2 X ROUT+ + IIN X VIN © 2005 Microchip Technology Inc. DS21486C-page 7 TCM680 5.0 APPLICATIONS INFORMATION 5.1 Voltage Multiplication and Inversion The TCM680 performs voltage multiplication and inversion simultaneously, providing positive and negative outputs (Figure 5-1). The magnitude of both outputs is, approximately, twice the input voltage. Unlike other switched capacitor converters, the TCM680 requires only four external capacitors to provide both functions simultaneously. C1 + 22 µF 1C - VOUT+ 8 2C + C1+ 7 1 2 + TCM680 C2 22 µF VIN 6 VOUT- GND 5 3C 2 4 VOUT+ + C4 22 µF VIN GND + C3 22 µF VOUT- FIGURE 5-1: Converter. 5.2 Positive and Negative Capacitor Selection The TCM680 requires only 4 external capacitors for operation, which can be inexpensive, polarized aluminum electrolytic types. For the circuit in Figure 5-1, the output characteristics are largely determined by the external capacitors. An expression for ROUT can be derived as shown below: EQUATION ROUT+ = 4(RSW1 + RSW2 + ESRC1 + RSW3 + RSW4 + ESRC2) +4(RSW1 + RSW2 + ESRC1 + RSW3 + RSW4 + ESRC2) +1/(fPUMP x C1) + 1/(fPUMP x C2) + ESRC4 ROUT– = 4(RSW1 + RSW2 + ESRC1 + RSW3 + RSW4 + ESRC2) +4(RSW1 + RSW2 + ESRC1 + RSW3 + RSW4 + ESRC2) +1/(fPUMP x C1) + 1/(fPUMP x C2) + ESRC3 Assuming all switch resistances are approximately equal: EQUATION + ROUT = 32RSW + 8ESRC1 + 8ESRC2 + ESRC4 +1/(fPUMP x C1) + 1/(fPUMP x C2) ROUT– = 32RSW + 8ESRC1 + 8ESRC2 + ESRC3 +1/(fPUMP x C1) + 1/(fPUMP x C2) DS21486C-page 8 ROUT is typically 140Ω at +25°C with VIN = +5V and C1 and C2 as 4.7 µF low ESR capacitors. The fixed term (32RSW) is about 130Ω. It can easily be seen that increasing or decreasing values of C1 and C2 will affect efficiency by changing ROUT. However, be careful about ESR. This term can quickly become dominant with large electrolytic capacitors. Table 5-1 shows ROUT for various values of C1 and C2 (assume 0.5Ω ESR). C1 and C4 must be rated at 6 VDC or greater while C2 and C3 must be rated at 12 VDC or greater. Output voltage ripple is affected by C3 and C4. Typically, the larger the value of C3 and C4, the less the ripple for a given load current. The formula for VRIPPLE(p-p) is given below: EQUATION VRIPPLE(p-p)+ = {1/[2(fPUMP /3) x C4] + 2(ESRC4)} (IOUT+) VRIPPLE(p-p)– = {1/[2(fPUMP /3) x C3] + 2(ESRC3)} (IOUT–) For a 10 µF (0.5Ω ESR) capacitor for C3, C4, fPUMP = 21 kHz and IOUT = 10 mA, the peak-to-peak ripple voltage at the output will be less than 100 mV. In most applications (IOUT ≤ 10 mA), 10-20 µF output capacitors and 1-5 µF pump capacitors will suffice. Table 5-2 shows VRIPPLE for different values of C3 and C4 (assume 1 Ω ESR). TABLE 5-1: OUTPUT RESISTANCE VS. C1, C2 C1, C2 (µF) ROUT+, ROUT- (Ω) 0.1 1089 0.47 339 1 232 3.3 165 4.7 157 10 146 22 141 100 137 TABLE 5-2: VRIPPLE PEAK-TO-PEAK VS. C3, C4 (IOUT 10 mA) C3, C4 (µF) VRIPPLE(p-p)+,VRIPPLE(p-p)- (mV) 0.47 1540 1 734 3.3 236 4.7 172 10 91 22 52 100 27 © 2005 Microchip Technology Inc. TCM680 5.3 Paralleling Devices 5.4 To reduce the value of ROUT- and ROUT+, multiple TCM680 voltage converters can be connected in parallel (Figure 5-2). The output resistance of both outputs will be reduced, approximately, by a factor of n, where n is the number of devices connected in parallel. EQUATION ROUT- = ROUT- (of TCM680) n (number of devices) EQUATION Output Voltage Regulation The outputs of the TCM680 can be regulated to provide +5V from a 3V input source (Figure 5-3). The TCM680 performs voltage multiplication and inversion producing output voltages of, approximately, +6V. The TCM680 outputs are regulated to +5V with the linear regulators TC55 and TC59. The TC54 is a voltage detector providing an indication that the input source is low and that the outputs may fall out of regulation. The input source to the TCM680 can vary from 2.8V to 5.5V without adversely affecting the output regulation making this application well suited for use with single cell Li-Ion batteries or three alkaline or nickel based batteries connected in series. ROUT+ = ROUT+ (of TCM680) n (number of devices) Each device requires its own pump capacitors, but all devices may share the same reservoir capacitors. To preserve ripple performance, the value of the reservoir capacitors should be scaled according to the number of devices connected in parallel. VIN – 22 µF + + 10 µF – C1+ VIN C1 VOUT+ - + 10 µF – TCM680 + 10 µF – C2+ VOUT- C2- GND C1+ VIN C1 - Positive Supply VOUT+ TCM680 + 10 µF – C2+ Negative Supply VOUT- C2- GND – 22 µF + GND FIGURE 5-2: Paralleling TCM680 for Lower Output Source Resistance. © 2005 Microchip Technology Inc. DS21486C-page 9 TCM680 + – + 10 µF – + – C1 + COUT+ 22 µF VIN TC55RP5002EXX VOUT VIN +6V +5 Supply + VSS – C1 - 1 µF Ground TCM680 3V + 10 µF – + C2 + C2 - VSS VOUT- -6V – VOUT VIN 1 µF -5 Supply GND – + COUT22 µF TC595002ECB TC54VC2702Exx VOUT VIN LOW BATTERY VSS FIGURE 5-3: DS21486C-page 10 Split Supply Derived from 3V Battery. © 2005 Microchip Technology Inc. TCM680 6.0 PACKAGING INFORMATION 6.1 Packaging Marking Information 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN Legend: Note: * XX...X YY WW NNN Example: TCM680 CPA123 0231 Example: TCM680 COA0231 123 Customer specific information* Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. Standard OTP marking consists of Microchip part number, year code, week code, and traceability code. © 2005 Microchip Technology Inc. DS21486C-page 11 TCM680 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) E1 D 2 n 1 α E A2 A L c A1 β B1 p eB B Units Dimension Limits n p Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D L c § B1 B eB α β MIN .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 INCHES* NOM MAX 8 .100 .155 .130 .170 .145 .313 .250 .373 .130 .012 .058 .018 .370 10 10 .325 .260 .385 .135 .015 .070 .022 .430 15 15 MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MIN MAX 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 DS21486C-page 12 © 2005 Microchip Technology Inc. TCM680 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 h α 45° c A2 A φ β L Units Dimension Limits n p Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D h L φ c B α β MIN .053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0 A1 INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12 MAX .069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15 MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12 MIN MAX 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 © 2005 Microchip Technology Inc. DS21486C-page 13 TCM680 NOTES: DS21486C-page 14 © 2005 Microchip Technology Inc. TCM680 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X /XX Temperature Range Package Examples: a) TCM680COA: Charge Pump Converter, b) TCM680COATR: Charge Pump Converter, SOIC pkg, 0°C to +70°C. SOIC pkg, 0°C to +70°C, Tape and Reel. Device: TCM680: Charge Pump Converter Temperature Range: C E Package: PA = Plastic DIP (300 mil Body), 8-lead OA = Plastic SOIC, (150 mil Body), 8-lead OATR = Plastic SOIC, (150 mil Body), 8-lead (Tape and Reel) = 0°C to +70°C = -40°C to +85°C c) TCM680CPA: Charge Pump Converter, PDIP pkg, 0°C to +70°C. d) TCM680EOA: Charge Pump Converter, SOIC pkg, -40°C to +85°C. e) TCM680EOATR: Charge Pump Converter, SOIC pkg, -40°C to +85°C, Tape and Reel. f) TCM680EPA: Charge Pump Converter, PDIP pkg, -40°C to +85°C. Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. © 2005 Microchip Technology Inc. DS21486C-page15 TCM680 NOTES: DS21486C-page 16 © 2005 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. 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Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2005 Microchip Technology Inc. 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