TI THS3125ID

SLOS382 − SEPTEMBER 2001
FEATURES
D Low Noise
− 2.9 pA/√Hz Noninverting Current Noise
− 10.8 pA/√Hz Inverting Current Noise
− 2.2 nV/√Hz Voltage Noise
High Output Current, 450 mA
High Speed
− 128 MHz , −3 dB BW(RL = 50 Ω, RF = 470 Ω)
− 1550 V/µs Slew Rate (G = 2, RL = 50 Ω)
Wide Output Swing
− 26 VPP Output Voltage, RL = 50 Ω
Low Distortion
− -80 dBc (1 MHz, 2 VPP, G = 2)
Low Power Shutdown Mode (THS3125)
− 370-µA Shutdown Supply Current
Standard SOIC, SOIC PowerPAD, and
TSSOP PowerPAD Package
D
D
D
D
D
D
APPLICATIONS
D Video Distribution
D Instrumentation
VOLTAGE NOISE AND CURRENT NOISE
vs
FREQUENCY
I n − Current Noise − pA/ Hz
V n − Voltage Noise − nV/ Hz
100
VCC = ±5 V to ±15 V
TA = 25°C
In+
10
DESCRIPTION
The THS3122/5 are low-noise, high-speed current
feedback amplifiers, with high output current drive. This
makes them ideal for any application that requires low
distortion over a wide frequency with heavy loads. The
THS3122/5 can drive four serially terminated video
lines while maintaining a differential gain error less than
0.03%.
The high output drive capability of the THS3122/5
enables the devices to drive 50-Ω loads with low
distortion over a wide range of output voltages:
−80 −dBc THD at 2 VPP
−75 −dBc THD at 8 VPP
The THS3122/5 can operate from ±5 V to ±15 V supply
voltages while drawing as little as 7.2 mA of supply
current per channel. They offer a low power shutdown
mode, reducing the supply current to only 370 µA. The
THS3122/5 are packaged in a standard SOIC, SOIC
PowerPAD, and TSSOP PowerPAD packages.
THS3122
SOIC (D) AND
SOIC PowerPAD (DDA) PACKAGE
(TOP VIEW)
1 OUT
1 IN−
1 IN+
VCC−
In−
D Line Drivers
D Motor Drivers
D Piezo Drivers
1
8
2
7
3
6
4
5
Vn
VCC+
2 OUT
2 IN−
2 IN+
THS3125
SOIC (D) AND
TSSOP PowerPAD (PWP) PACKAGE
(TOP VIEW)
1 OUT
1 IN−
1 IN+
VCC−
N/C
GND
N/C
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC+
2 OUT
2 IN−
2 IN+
N/C
SHUTDOWN
N/C
1
0.01
0.1
1
10
100
f − Frequency − kHz
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
!"#$%" & '(##)% $& "! *(+,'$%" -$%).
#"-('%& '"!"# %" &*)'!'$%"& *)# %/) %)#& "! )0$& &%#()%&
&%$-$#- 1$##$%2. #"-('%" *#"')&&3 -")& "% )')&&$#,2 ',(-)
%)&%3 "! $,, *$#$)%)#&.
Copyright  2001, Texas Instruments Incorporated
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1
SLOS382 − SEPTEMBER 2001
AVAILABLE OPTIONS
PACKAGED DEVICE
TA
SOIC-8
(D)
SOIC-8 PowerPAD
(DDA)
SOIC-14
(D)
TSSOP-14
(PWP)
0°C to 70°C
THS3122CD
THS3122CDDA
THS3125CD
THS3125CPWP
−40°C to 85°C
THS3122ID
THS3122IDDA
THS3125ID
THS3125IPWP
EVALUATION
MODULES
THS3122EVM
THS3125EVM
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VCC+ to VCC− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 V
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VCC
Output current (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275 mA
Differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 4 V
Maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Total power dissipation at (or below) 25°C free-air temperature . . . . . . . . . . . See Dissipation Ratings Table
Operating free-air temperature, TA: Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
Storage temperature, Tstg : Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 125°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 125°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The THS3122 and THS3125 may incorporate a PowerPAD on the underside of the chip. This acts as a heatsink and must be
connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction
temperature which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the
PowerPAD thermally enhanced package.
DISSIPATION RATING TABLE
PACKAGE
θJA
TA = 25°C
POWER RATING
D-8
95°C/W‡
1.32 W
DDA
1.87 W
D-14
67°C/W
66.6°C/W‡
PWP
37.5°C/W
1.88 W
3.3 W
‡ This data was taken using the JEDEC proposed high-K test PCB.
For the JEDEC low-K test PCB, the θJA is168°C/W for the D-8
package and 122.3°C/W for the D-14 package.
recommended operating conditions
MIN
Supply voltage, VCC+ to VCC−
±15
Single supply
10
30
0
70
−40
85
I-suffix
High level (device shutdown)
Shutdown pin input levels, relative to the GND pin
2
MAX
±5
C-suffix
Operating free-air temperature, TA
NOM
Dual supply
Low level (device active)
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UNIT
V
°C
2
0.8
V
SLOS382 − SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, TA = 25°C,
VCC = ±15 V, RF= 750 Ω, RL = 100 Ω (unless otherwise noted)
dynamic performance
PARAMETER
TEST CONDITIONS
RF = 50 Ω,
G=1
VCC = ± 5 V
138
VCC = ±15 V
160
RL = 50 Ω
RF =470 Ω,
G=2
VCC = ± 5 V
126
VCC = ±15 V
128
RF = 470 Ω,
G=2
VCC = ± 5 V
20
Bandwidth (0.1 dB)
VCC = ±15 V
30
G = −1
VCC = ±5 V
VCC = ±15 V
47
Full power bandwidth
VO(PP) = 4 V
VO(pp) = 20 V
VO = 10 VPP
Slew rate (see Note 2), G=8
VCC = ±15 V
VCC = ±5 V
1550
G=2
RF = 680 Ω
VCC = ±15 V
VCC = ±5 V
1000
VCC = ±15 V
64
BW
ts
TYP
RL = 50 Ω
Small-signal bandwidth (− 3 dB)
SR
MIN
Settling time to 0.1%
G = −1
VO = 5 VPP
VO = 2 VPP
VO = 5 VPP
MAX
UNIT
MHz
MHz
64
500
V/µs
53
ns
NOTE 2: Slew rate is defined from the 25% to the 75% output levels.
noise/distortion performance
PARAMETER
THD
TEST CONDITIONS
VO(PP) = 2 V
−80
VO(PP) = 8 V
−75
RF = 470 Ω,
f = 1 MHz
VO(PP) = 2 V
−77
G = 2,
5 V,
VCC = ±5
Input voltage noise
In
Input current noise
Noninverting Input
Crosstalk
Differential gain error
Differential phase error
Inverting Input
TYP
G = 2,
RF = 470 Ω,
VCC = ±15
15 V, f = 1 MHz
Total harmonic distortion
Vn
MIN
VO(PP) = 5 V
−76
VCC = ±5 V, ±15 V
f = 10 kHz
2.2
VCC = ±5 V, ±15 V
f = 10 kHz
G = 2,
VO = 2 VPP
VCC = ±5 V
VCC = ±15 V
−67
VCC = ±5 V
VCC = ±15 V
0.01%
VCC = ±5 V
VCC = ±15 V
0.011°
f = 1 MHz,
G = 2,
RL = 150 Ω
40 IRE modulation
100 IRE Ramp
±100
NTSC and PAL
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2.9
10.8
−67
MAX
UNIT
dBc
nV/√Hz
pA/√Hz
dBc
0.01%
0.011°
3
SLOS382 − SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, TA = 25°C,
VCC = ±15 V, RF = 750 Ω, RL = 100 Ω (unless otherwise noted) (continued)
dc performance
PARAMETER
TEST CONDITIONS
Input offset voltage
VIO
VIC = 0 V,
VO = 0 V,
VCC = ±5 V,
VCC = ±15 V
Channel offset voltage matching
Offset drift
VIC = 0 V,
VO = 0 V,
VCC = ±5
5 V,
VCC = ±15
15 V
IN− Input bias current
IIB
IN+ Input bias current
IIO
ZOL
VIC = 0 V,
VO = 0 V,
VCC = ±5 V,
VCC = ±15 V
Input offset current
VCC = ±5 V,
VCC = ±15 V
Open loop transimpedance
MIN
TYP
MAX
TA = 25°C
TA = full range
4.4
6
TA = 25°C
TA = full range
0.4
TA = full range
TA = 25°C
10
UNIT
8
2
mV
3
6
TA = full range
TA = 25°C
µV/°C
23
30
0.33
TA = full range
2
µA
A
3
TA = 25°C
5.4
22
A
µA
TA = full range
30
RL = 1 kΩ,
1
MΩ
input characteristics
PARAMETER
VICR
CMRR
TEST CONDITIONS
Input common-mode voltage range
Common-mode rejection ratio
RI
Input resistance
Ci
Input capacitance
MIN
TYP
TA = full range
±2.5
±2.7
± 12.5
±12.7
VCC = ±5 V,
VI = −2.5 V to 2.5 V
TA = 25°C
TA = full range
58
62
VCC = ±15 V,
VI = −12.5 V to 12.5 V
TA = 25°C
TA = full range
63
VCC = ±5 V
VCC = ± 15 V
MAX
UNIT
V
56
dB
67
60
IN+
1.5
IN−
15
MΩ
Ω
2
pF
output characteristics
PARAMETER
VO
IO
ro
4
Output voltage swing
Output current drive
Output resistance
TEST CONDITIONS
MIN
TYP
MAX
UNIT
G = 4, VI = 1.06 V,
VCC = ±5 V
RL = 1 kΩ,
TA = 25°C
G = 4, VI = 1.025 V,
VCC = ±5 V
RL = 50 Ω,
TA = 25°C
TA = full range
G = 4, VI = 3.6 V,
VCC = ±15 V
RL = 1 kΩ,
TA = 25°C
G = 4, VI = 3.325 V,
VCC = ±15 V
RL = 50 Ω,
TA = 25°C
TA = full range
11.5
G = 4, VI = 1.025 V,
VCC = ±5 V
RL = 10 Ω,
TA = 25°C
200
280
mA
G = 4, VI = 3.325 V,
VCC = ±15 V
RL = 25 Ω,
TA = 25°C
360
440
mA
open loop
TA = 25°C
14
Ω
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4.1
3.8
V
4
3.7
V
14.2
12
13.3
V
SLOS382 − SEPTEMBER 2001
electrical characteristics over recommended operating free-air temperature range, TA = 25°C,
VCC = ±15 V, RF = 750 Ω, RL = 100 Ω (unless otherwise noted) (continued)
power supply
PARAMETER
TEST CONDITIONS
PSRR
TYP
VCC = ±5V
TA = 25°C
TA = full range
7.2
VCC = ±15 V
TA = 25°C
TA = full range
8.4
VCC = ±5 V ±1 V
TA = 25°C
TA = full range
53
VCC = ±15 V ±1 V
TA = 25°C
TA = full range
68
Quiescent current (per channel)
ICC
MIN
Power supply rejection ratio
MAX
UNIT
9
10
mA
10.5
11.5
60
50
dB
73
66
shutdown characteristics (THS3125 only)
PARAMETER
TEST CONDITIONS
ICC(SHDN)
tDIS
Shutdown quiescent current (per channel)
tEN
IIL(SHDN)
Enable time (see Note 3)
MIN
V(SHDN) = 3.3 V
Disable time (see Note 3)
TYP
MAX
UNIT
370
500
µA
200
Shutdown pin low level leakage current
GND = 0 V
VCC = ±5 V to ±15 V
ns
500
V(SHDN) = 0 V
V(SHDN) = 3.3 V
18
ns
µA
25
IIH(SHDN)
Shutdown pin high level leakage current
110
130
µA
NOTE 3: Disable/enable time is defined as the time from when the shutdown signal is applied to the SHDN pin to when the supply current has
reached half of its final value.
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Small signal closed loop gain
vs Frequency
Small and large signal output
vs Frequency
11, 12
vs Frequency
13, 14, 15
Harmonic distortion
Vn, In
CMRR
vs Peak−to−peak output voltage
1 − 10
16, 17
Voltage noise and current noise
vs Frequency
18
Common-mode rejection ratio
vs Frequency
19
Crosstalk
vs Frequency
20
Zo
SR
Output impedance
vs Frequency
21
Slew rate
vs Output voltage step
22
vs Free-air temperature
23
VIO
Input offset voltage
vs Common-mode input voltage
24
IB
VO
Input bias current
vs Free-air temperature
25
Output voltage
vs Load current
26
vs Free-air temperature
27
vs Supply voltage
28
Quiescent current
ICC
Shutdown supply current
vs Free-air temperature
Differential gain and phase error
vs 75 Ω serially terminated loads
Shutdown response
29
30, 31
32
Small signal pulse response
33, 34
Large signal pulse response
35, 36
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5
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
3
0
−3
RF = 680 Ω
−6
RF = 500 Ω
−9
−12
−15
−18
−21
G = −1,
VCC = ±5 V,
RL = 50 Ω
−30
0.1
1
10
100
RF = 330 Ω
−9
−12
−15
−18
−21
−24
−27
−30
0.1
1000
RF = 500 Ω
−6
G = −1,
VCC = ±15 V,
RL = 50 Ω
10
Figure 1
0
RF = 560 Ω
RF = 750 Ω
−6
G = 1,
VCC = ±15 V,
RL = 50 Ω
10
100
RF = 500 Ω
RF = 470 Ω
3
0
−3
G = 2,
VCC = ±5 V,
RL = 50 Ω
1
10
RF = 390 Ω
−3
−6
−9
−18
G = 4,
VCC = ±5 V,
RL = 50 Ω
0.1
1
10
100
f − Frequency − MHz
Figure 7
6
Small Signal Closed Loop Gain − dB
Small Signal Closed Loop Gain − dB
RF = 270 Ω
100
1000
RF = 500 Ω
6
RF = 470 Ω
0
−3
G = 2,
VCC = ±15 V,
RL = 50 Ω
1
3
RF = 390 Ω
−3
−6
−9
G = 4,
VCC = ±15 V,
RL = 50 Ω
10
100
f − Frequency − MHz
Figure 8
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100
1000
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
15
0
1
10
Figure 6
RF = 270 Ω
6
−18
0.1
1000
f − Frequency − MHz
9
−15
100
RF = 430 Ω
3
−6
0.1
1000
RF = 200 Ω
12
−12
10
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
15
0
−15
1
Figure 5
9
−12
0.1
f − Frequency − MHz
RF = 200 Ω
3
G = 1,
VCC = ±5 V,
RL = 50 Ω
−5
Figure 3
6
−6
0.1
1000
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
6
−4
9
Figure 4
12
−3
f − Frequency − MHz
RF = 430 Ω
f − Frequency − MHz
15
RF = 560 Ω
−2
1000
9
Small Signal Closed Loop Gain − dB
Small Signal Closed Loop Gain − dB
RF = 470 Ω
1
100
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
3
−12
0.1
RF = 750 Ω
Figure 2
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
−9
0
−1
f − Frequency − MHz
f − Frequency − MHz
−3
RF = 470 Ω
1
−6
1
Small Signal Closed Loop Gain − dB
−27
RF = 680 Ω
−3
Small Signal Closed Loop Gain − dB
−24
2
0
Small Signal Closed Loop Gain − dB
RF = 330 Ω
3
Small Signal Closed Loop Gain − dB
Small Signal Closed Loop Gain − dB
6
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
1000
12
RF = 200 Ω
9
6
RF = 470 Ω
3
0
RF = 560 Ω
−3
−6
VCC = ±5 V,
RL = 50 Ω
−9
−12
0.1
1
10
f − Frequency − MHz
Figure 9
100
1000
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
SMALL AND LARGE SIGNAL OUTPUT
vs
FREQUENCY
18
RF = 200 Ω
12
Small and Large Signal Output − dB
9
RF = 470 Ω
6
3
RF = 560 Ω
0
−3
−6
VCC = ±15 V,
RL = 50 Ω
−9
12
2 VPP
6
1 VPP
0
0.5 VPP
−6
0.25 VPP
−12
0.125 VPP
−18
−24
−12
0.1
1
10
100
0.1
1000
2 VPP
6
1 VPP
0
0.5 VPP
−6
0.25 VPP
−12
0.125 VPP
−18
−24
0.1
1000
HARMONIC DISTORTION
vs
FREQUENCY
−40
5th Harmonic
−50
−60
2nd Harmonic
−70
−80
−90
4th Harmonic
−100
0.1
1
−20
−30
2nd Harmonic
−40
3rd Harmonic
−50
5th Harmonic
−60
−70
−80
4th Harmonic
−90
10
−100
0.1
100
1
f − Frequency − MHz
Figure 13
HARMONIC DISTORTION
vs
PEAK-TO-PEAK OUTPUT VOLTAGE
Harmonic Distortion − dB
3rd Harmonic
10
100
−30
−40
−50
5th Harmonic
2nd Harmonic
−60
3rd Harmonic
−70
−80
−90
−40
−50
3rd Harmonic
−60
2nd Harmonic
−70
5th Harmonic
−80
4th Harmonic
1
f − Frequency − MHz
Figure 14
Figure 15
VOLTAGE NOISE AND CURRENT NOISE
vs
FREQUENCY
100
−20
−30
Hz
−40
−50
5th Harmonic
−60
2nd Harmonic
−70
10
f − Frequency − MHz
G = 2,
VCC = ±15 V,
f = 1 MHz,
RF = 470 Ω,
RL = 50 Ω
−10
Harmonic Distortion − dB
−20
−30
−90
0
G = 2,
VCC = ±5 V,
f = 1 MHz,
RF = 470 Ω,
RL = 50 Ω
−20
−100
0.1
HARMONIC DISTORTION
vs
PEAK-TO-PEAK OUTPUT VOLTAGE
0
−10
G = 2,
VCC = ±15 V,
VO(PP) = 8 V,
RF = 470 Ω,
RL = 50 Ω
−10
3rd Harmonic
−80
I n − Current Noise − pA/ Hz
−30
1000
0
G = 2,
VCC = ±15 V,
VO(PP) = 2 V,
RF = 470 Ω,
RL = 50 Ω
−10
Harmonic Distortion − dB
−20
100
Figure 12
0
G = 2,
VCC = ±5 V,
VO(PP) = 2 V,
RF = 470 Ω,
RL = 50 Ω
10
f − Frequency − MHz
HARMONIC DISTORTION
vs
FREQUENCY
0
−10
1
Figure 11
HARMONIC DISTORTION
vs
FREQUENCY
Harmonic Distortion − dB
100
G = 2, VCC = ±15 V,
RL = 680 Ω,RL = 50 Ω
4 VPP
12
f − Frequency − MHz
Figure 10
Harmonic Distortion − dB
10
1
f − Frequency − MHz
−100
18
G = 2, VCC = ±5 V,
RL = 680 Ω, RL = 50 Ω
4 VPP
V n − Voltage Noise − nV/
Small Signal Closed Loop Gain − dB
15
SMALL AND LARGE SIGNAL OUTPUT
vs
FREQUENCY
Small and Large Signal Output − dB
SMALL SIGNAL CLOSED LOOP GAIN
vs
FREQUENCY
VCC = ±5 V to ±15 V
TA = 25°C
In−
In+
10
Vn
−90
4th Harmonic
0
0.5
1
1.5 2
2.5
3
3.5
4
4th Harmonic
4.5
VPP − Peak-to-Peak Output Voltage − V
Figure 16
5
−100
0
1
2
3
4
5
6
7
8
VPP − Peak-to-Peak Output Voltage − V
Figure 17
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9
1
0.01
0.1
1
10
100
f − Frequency − kHz
Figure 18
7
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
CROSSTALK
vs
FREQUENCY
80
100
−10
VCC = ±15 V
60
−20
50
VCC = ±5 V
40
30
−30
−40
−50
G = 2,
RF = 470 Ω,
RL = 50 Ω,
TA = 25°C
20
10
0
0.1
−60
1
10
100
−80
0.1
1000
0.1
10
100
0.1
1000
800
600
VCC = ±5 V
400
200
0
1
2
3
4
5
6
7
8
2
3
4
5
6
7
−40
9 10
Figure 22
VCC = ±15 V, IIB+
−15
10
35
60
VO − Output Voltage − V
VCC = ±15 V, IIB−
VCC = ±5 V, IIB+
VCC = ±5 V, IIB−
13
12
VCC = ±15 V,
RF = 330 Ω,
TA = 25°C
11
10
−15
10
35
60
TA − Free-Air Temperature − °C
Figure 25
−0.5
−1
−2
−15
85
14
0
−2
−40
0
−1.5
15
8
2
0.5
−10
85
0
50 100 150 200 250 300 350 400 450
IL − Load Current − mA
Figure 26
www.ti.com
−5
0
5
10
15
VCM − Common-Mode Input Voltage − V
Figure 24
QUIESCENT CURRENT
vs
FREE-AIR TEMPERATURE
OUTPUT VOLTAGE
vs
LOAD CURRENT
12
6
1
Figure 23
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
10
VCC = ±15 V,
RL = 100 Ω,
TA = 25°C
1.5
TA − Free-Air Temperature − °C
VO − Output Voltage Step − V
4
VIO − Input Offset Voltage − mV
VCC = ±15 V
1000
2
VCC = ±15 V,
VCM = 0 V,
RL = 100 Ω
I CC − Quiescent Current − mA/ Per Channel
1200
VIO − Input Offset Voltage − mV
1400
1000
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
0
1
100
Figure 21
INPUT OFFSET VOLTAGE
vs
FREE-AIR TEMPERATURE
G = 2,
RF = 470 Ω,
RL = 50 Ω,
TA = 25°C
10
f − Frequency − MHz
Figure 20
1800
1600
1
f − Frequency − MHz
SLEW RATE
vs
OUTPUT VOLTAGE STEP
SR − Slew Rate − V/µ s
1
0.01
1
Figure 19
I IB − Input Bias Current − µ A
10
−70
f − Frequency − MHz
8
VCC = ±5 V, ±15 V
RF = 1 kΩ,
G = 2,
VCC = ±5 V, ±15 V
RF = 470 Ω,
RL = 50 Ω,
Z O − Output Impedance − Ω
70
0
OUTPUT IMPEDANCE
vs
FREQUENCY
0
Crosstalk − dBc
CMRR − Common-Mode Rejection Ratio − dB
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
12
VCC = ±15 V
10
8
VCC = ±5 V
6
4
2
0
−40
−15
10
35
60
TA − Free-Air Temperature − °C
Figure 27
85
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
QUIESCENT CURRENT
vs
SUPPLY VOLTAGE
12
450
85 °C
VSD = 3.3 V
RF = 750 Ω
400
8
25 °C
6
−40 °C
Shutdown Supply Current −µ A
10
I CC − Quiescent Current − mA
SHUTDOWN SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
4
2
350
VCC = ±15 V
300
250
VCC = ±5 V
200
150
100
50
0
2.5
5
7.5
10
12.5
0
15
−40
VCC − Supply Voltage − ±V
−15
10
Figure 28
0.08
0.07
0.2
Gain Error
0.04
Phase Error
0.15
0.03
0.1
0.02
0.05
0.01
0
0
2
3
4
5
6
7
0.05
0.3
0.25
Gain Error
0.04
0.2
Phase Error
0.03
0.15
0.02
0.1
0.01
0.05
0
8
0.35
VCC = ±15 V,
G = 2,
40 IRE Modulation
±100 IRE Ramp
NTSC
0.06
Differenrtial Gain Error − %
0.25
Differential Phase Error − Degree °
Differenrtial Gain Error − %
0.3
0.05
1
85
DIFFERENTIAL PHASE AND GAIN ERROR
vs
75 Ω SERIALLY TERMINATED LOADS
0.35
VCC = ±5 V,
G = 2,
40 IRE Modulation
±100 IRE Ramp
NTSC
0.06
60
Figure 29
DIFFERENTIAL PHASE AND GAIN ERROR
vs
75 Ω SERIALLY TERMINATED LOADS
0.07
35
TA − Free-Air Temperature − °C
Differential Phase Error − Degree °
0
0
1
75 Ω Serially Terminated Loads
2
3
4
5
6
7
8
75 Ω Serially Terminated Loads
Figure 30
Figure 31
THS3125
SMALL SIGNAL PULSE RESPONSE
4
3
2
1
0
2
1.5
1
0.5
0
0
1
2
3
4
5
6
t − Time − µs
Figure 32
7
8
9
10
SMALL SIGNAL PULSE RESPONSE
0.3
0.3
0.2
0.2
VO − Output Voltage − V
VCC = ±15 V
G=8
RF = 330 Ω
RL = 100 Ω
VO − Output Voltage − V
5
Shutdown Pulse − V
VO − Output Voltage − V
SHUTDOWN RESPONSE
0.1
0
−0.1
VCC = ±5 V,
G = 2,
RF = 470 Ω,
RL = 50 Ω
−0.2
−0.3
0
100
200
300
www.ti.com
0
−0.1
VCC = ±15 V,
G = 2,
RF = 470 Ω,
RL = 50 Ω
−0.2
400
t − Time − ns
Figure 33
0.1
500
600
−0.3
0
100
200
300
400
500
600
t − Time − ns
Figure 34
9
SLOS382 − SEPTEMBER 2001
TYPICAL CHARACTERISTICS
LARGE SIGNAL PULSE RESPONSE
LARGE SIGNAL PULSE RESPONSE
3
3
2
VO − Output Voltage − V
VO − Output Voltage − V
2
1
0
−1
VCC = ±5 V,
G = 2,
RF = 470 Ω,
RL = 50 Ω
−2
100
200
300
400
500
−1
−3
600
t − Time − ns
VCC = ±15 V,
G = 2,
RF = 470 Ω,
RL = 50 Ω
0
100
200
300
400
t − Time − ns
Figure 36
Figure 35
10
0
−2
−3
0
1
www.ti.com
500
600
SLOS382 − SEPTEMBER 2001
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°−ā 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047 / D 10/96
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
www.ti.com
11
SLOS382 − SEPTEMBER 2001
MECHANICAL INFORMATION
DDA (S−PDSO−G8)
Power PADt PLASTIC SMALL-OUTLINE
0,49
0,35
1,27
8
0,10 M
5
Thermal Pad
(See Note D)
0,20 NOM
3,99
3,81
6,20
5,84
Gage Plane
1
0,25
4
4,98
4,80
0°−8°
0,89
0,41
1,68 MAX
Seating Plane
1,55
1,40
0,13
0,03
0,10
4202561/A 02/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.
This pad is electrically and thermally connected to the backside of the die and possibly selected leads.
PowerPAD is a trademark of Texas Instruments.
12
www.ti.com
SLOS382 − SEPTEMBER 2001
MECHANICAL INFORMATION
PWP (R-PDSO-G**)
PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
20-PIN SHOWN
0,30
0,19
0,65
20
0,10 M
11
Thermal Pad
(See Note D)
4,50
4,30
0,15 NOM
6,60
6,20
Gage Plane
1
10
0,25
A
0°−ā 8°
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
14
16
20
24
28
A MAX
5,10
5,10
6,60
7,90
9,80
A MIN
4,90
4,90
6,40
7,70
9,60
DIM
4073225/E 03/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusions.
The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically
and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments.
www.ti.com
13
PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
THS3122CD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3122CDDA
ACTIVE
SO
Power
PAD
DDA
8
75
TBD
Call TI
Level-1-235C-UNLIM
THS3122CDDAR
ACTIVE
SO
Power
PAD
DDA
8
2500
TBD
Call TI
Level-1-235C-UNLIM
THS3122CDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3122CDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3122CDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3122ID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3122IDDA
ACTIVE
SO
Power
PAD
DDA
8
75
TBD
Call TI
Level-1-235C-UNLIM
THS3122IDDAR
ACTIVE
SO
Power
PAD
DDA
8
2500
TBD
Call TI
Level-1-235C-UNLIM
THS3122IDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3122IDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3125CD
ACTIVE
SOIC
D
14
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3125CDG4
ACTIVE
SOIC
D
14
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3125CDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3125CDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3125CPWP
ACTIVE
HTSSOP
PWP
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
THS3125CPWPG4
ACTIVE
HTSSOP
PWP
14
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
THS3125CPWPR
ACTIVE
HTSSOP
PWP
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
THS3125CPWPRG4
ACTIVE
HTSSOP
PWP
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
THS3125ID
ACTIVE
SOIC
D
14
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3125IDR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3125IDRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
THS3125IPWP
ACTIVE
HTSSOP
PWP
14
CU NIPDAU
Level-2-260C-1 YEAR
75
90
Addendum-Page 1
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
THS3125IPWPG4
ACTIVE
HTSSOP
PWP
14
THS3125IPWPR
ACTIVE
HTSSOP
PWP
THS3125IPWPRG4
ACTIVE
HTSSOP
PWP
90
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
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