HA16341NT/FP, HA16342NT/FP Redundant Secondary Switching Power Supply Controller ADE-204-035C (Z) Rev.3 Apr. 2001 Description The HA16341NT/FP and the HA16342NT/FP are switching regulator control ICs for the off-line converters of redundant power supplies. The HA16342NT/FP is reverse current detection less version of the HA16341NT/FP. The HA16341NT/FP have the functions of current sharing and hot swap control for redundancy. These functions enable high efficiency and high reliability for switching power supplies. Combination the HA16341 with the HA16141 is suitable for the redundant AC to DC converters. Features • Secondary-side synchronous rectification control • Main switching controller • Dead-time adjustment for synchronous rectification MOS • Current share function with line resistance compensation • Hot swap power MOS FET control • Remote on/off function, FAIL output function • Synchronized switching with primary side • Soft start function • Maximum duty adjustment • Overcurrent limiting, overcurrent shutdown functions • Reverse current detection (only the HA16341NT/FP) • Light load detection • OVP function • VCC pin UVL function HA16341NT/FP, HA16342NT/FP Ordering Information Type No. Package HA16341NT DP-24TS HA16342NT HA16341FP FP-26DT HA16342FP Pin Arrangement HA16341NT, HA16342NT (DP-24TS) HA16341FP, HA16342FP (FP-26DT) CS(+) 1 24 CF(+) CS(+) 1 26 CF(+) CS(−) 2 23 CF(−) CS(−) 2 25 CF(−) MT 3 22 CFo MT 3 24 CFo CB 4 21 CFB CB 4 23 CFB Cin 5 20 EIN Cin 5 22 EIN SGND 6 19 EOUT SGND 6 21 EOUT PGND 7 20 PGND PGND TAB TAB PGND PGND TAB TAB PGND PG1 7 18 MF OUT FAIL 8 17 VCC PG1 8 19 MF OUT Trig 9 16 MR OUT FAIL 9 18 VCC CT 10 15 PWM OUT Trig 10 17 MR OUT SS 11 14 HSP CT 11 16 PWM OUT DB 12 13 Vref SS 12 15 HSP DB 13 14 Vref (Top view) Rev.1, Jan. 2001, page 2 of 21 (Top view) HA16341NT/FP, HA16342NT/FP Pin Functions Pin No. DP-24TS FP-26DT Symbol Pin Name 1 1 CS(+) Current sense amp input (+) 2 2 CS(−) Current sense amp input (−) 3 3 MT Current sense amp output 4 4 CB Current bus output 5 5 Cin Line resistance compensation input 6 6 SGND Signal ground 7 8 PG1 Remote on/off 8 9 FAIL FAIL output (open-drain) 9 10 Trig External synchronization input 10 11 CT Timing capacitance 11 12 SS Soft start 12 13 DB Dead band 13 14 Vref Vref (5 V) 14 15 HSP Hot swap output 15 16 PWM OUT PWM output 16 17 MR OUT MR output 17 18 VCC Power supply voltage 18 19 MF OUT MF output 19 21 EOUT Error amp output 20 22 EIN Error amp input 21 23 CFB Current share feedback output 22 24 CFo Current share differential amp output 23 25 CF(−) Current share differential amp input (−) 24 26 CF(+) Current share differential amp input (+) TAB TAB, 7, 20 PGND Power ground Rev.1, Jan. 2001, page 3 of 21 HA16341NT/FP, HA16342NT/FP Block Diagram Current share input Error amp. + − + − CT' CS(−) + R OP1-2 − 1.25V EOUT 19R R 2R S Q latch D R Q + 0dB R − OP6 + R 2R 1.25V OP3 1.25V − + OP4 − + 6dB OP2 − R SGND TAB S RS-FF latch A PG1 R Q S2 to latch B reset Start-up latch initial: Lo + − E/IN + − from B 1.187V 1.25V OCL − + −12mV Start-up latch initial: Hi PWM OUT Driver SW2 CF(−) + − Hi: PWM ON Light load detector − + 20dB 10k DB generator Driver 1k CFo Reverse current comp. (only HA16341) CF(+) 1k SW2 on at HSP Hi CS(+) E/IN = 95% comp. R HSP CFB − 0dB OP5 2R + Cin EIN VZ = 6.8V 2R 26dB OCL CB R VZ = 1.24V CT level compression Point B MT PGND − + 2R + OP1 Hi: 0.7V Lo: 0.5V 90k TAB CS(+) PGND Dead Band adjust Driver 16 pulse delay UVL1 MF OUT VCC + − Vref UVL2 SS comp. − + SS S1 RS-FF S latch B Q R Vref 5V 169µA CT Vref 5V 100k 128.5k Trig − + 2.5V + − Exit trigger control Delay S Q latch C R Q RS-FF 939µA Driver Vref MR OUT UVL2 Hi: stop SW1 OVP SW1 on: 1.3V SW1 off: 3.4V PG1 + − from Trig DB 7.5V + − PG1 50k Hi: 2.5V Lo: 2.0V FAIL FAIL Oscillator Unit R: Ω C: F Rev.1, Jan. 2001, page 4 of 21 HA16341NT/FP, HA16342NT/FP Absolute Maximum Ratings (Ta = 25°C) Item Symbol Rating Unit Note Supply Voltage VCC 18 V DC output current1 Io1 ±0.1 A PWM OUT *1 Peak output current1 Iopeak1 ±1.0 A PWM OUT *2 DC output current2 Io2 ±0.2 A MF OUT *1 Peak output current2 Iopeak2 ±2.0 A MF OUT *2 DC output current3 Io3 ±0.1 A MR OUT *1 Peak output current3 Iopeak3 ±1.0 A MR OUT *2 DC output current4 Io4 −5 mA CB OUT DC output current5 Io5 ±500 µA CFB OUT DC output current6 Io6 20 mA FAIL OUT DC output current7 Io7 −5.0 mA Vref OUT Peak output current4 Iopeak4 0.5 A HSP sink DC output current8 Io8 ±500 µA MT OUT DC output current9 Io9 ±500 µA CFo OUT DC output current10 Io10 6 mA EOUT sink TRIG terminal voltage Vtrigmax −1.5 to VCC V CT terminal voltage VCTmax −0.3 to Vref V Vref terminal voltage Vrefmax −0.3 to Vref V SS terminal voltage Vssmax −0.3 to Vref V EIN terminal voltage VEINmax −0.3 to Vref V EOUT terminal voltage VEOUTmax −0.3 to VCC V PG1 terminal voltage VPG1max −0.3 to Vref V FAIL terminal voltage VFAILmax −0.3 to VCC V PWM OUT terminal voltage VoPWMmax −0.3 to VCC V MR OUT terminal voltage VoMRmax −0.3 to VCC V MF OUT terminal voltage VoMFmax −0.3 to VCC V HSP terminal voltage VoHSPmax −0.3 to VCC V CFB terminal voltage VCFBmax −0.3 to Vref V CS(+) terminal voltage VCS(+)max −0.3 to Vref V CS(−) terminal voltage VCS(−)max −0.3 to Vref V MT terminal voltage VMTmax −0.3 to Vref V Cin terminal voltage VCinmax −0.3 to Vref V Notes: 1. VDS = 10 V max. Therefore test condition must be VOH = VCC − 10 V or over , VOL = 10 V or under. 2. VDS = 10 V max. Pulse duration ≤ 10 ms Rev.1, Jan. 2001, page 5 of 21 HA16341NT/FP, HA16342NT/FP Absolute Maximum Ratings (cont.) (Ta = 25°C) Item Symbol Rating Unit CF(+) terminal voltage VCF(+)max −0.3 to Vref V CF(−) terminal voltage VCF(−)max −0.3 to Vref V CFo terminal voltage VCFomax −0.3 to Vref V CB terminal voltage VCBmax −0.3 to Vref V DB terminal voltage VDBmax −0.3 to Vref V Maximum power dissipation PT 4.17 W Operating temperature Topr −40 to +105 °C Storage temperature Tstg −55 to +150 °C Junction temperature Tj 150 °C Note: Note 1 1. This is allowable value up to Ta = 25°C. Derate by θj-a = 30°C/W above that temperature. θj-a = 30°C/W is the case that HA16341NT is mounted on 30% wiring density glass epoxy board (105 mm × 76.2 mm × 1.6 mmt) and HA16341FP is mounted on a board which thermal resistance is 23°C/W because of θj-pin (SOP) = 7°C/W typ. Maximum Power Dissipation PT (W) 5.0 4.5 4.17 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 −50 −30 −10 10 30 50 70 90 110 Ambient Temperature Ta (°C) Figure 1 Derating Curve Rev.1, Jan. 2001, page 6 of 21 130 150 170 HA16341NT/FP, HA16342NT/FP Electrical Characteristics (Ta = 25°C, VCC = 12V, PG1 = 3V, Vtrig = 0V, VCS(+) = 0V, VCin = 0V, CCT = 330pF, GvOP1 = 26dB, GvOP4 = 40dB, RDB = 1.8kΩ) • Current share Item Symbol Min Typ Max Unit Test Conditions CB output Hi voltage VCBH 2.5 V Iosource = 300µA VCS(+) = 1V CB output Lo voltage VCBL 25 mV VCS(+) = 0V, RCB = 10kΩ CFB output Lo voltage VCFBL 100 mV Iosink = 100µA, HSP ON VCS(+) = 0V, VCB = 0.1V CFB output typ voltage VCFBtyp 1.19 1.25 1.31 V VCS(+) = 0V, VCB = 0V RfOP4 = 1kΩ, HSP ON OP1 input offset voltage VioOP1 (1) mV Note 1 CS(+) input bias current IibCS(+) −20 −30 µA VCS(+) = 0V, VCS(−) = 0V CS(−) input bias current IibCS(−) 0.2 1.0 µA VCS(+) = 0V, VCS(−) = 0V Cin input bias current IibCin 0.2 1.0 µA Vcin = 0V OP4 input resistance Rsin 0.75 1.00 1.25 kΩ 1, 2 Open loop gain OP1−OP6 Avo (70) 80 dB 1 Band width OP1−OP6 BWCS 700 kHz 1 OCL detector threshold voltage VthOCL 59.5 62.5 65.5 mV CS(+) terminal voltage sensing Light load detector threshold Hi voltage VthHLL (2.0) 3.5 (5.0) mV CS(+) terminal voltage sensing 1 Light load detector threshold Lo voltage VthLLL (1.0) 2.5 (4.0) mV CS(+) terminal voltage sensing 1 VthLL hysteresis dVthLL (0.5) 1.0 (1.5) mV Reverse current detector threshold Hi voltage VthRC −6 −12 −18 mV CS(+) terminal voltage sensing 3 1 Note Notes: 1. Design spec. 2. Temperature coefficient is 5400ppm/°C. 3. Only HA16341NT/FP. • Hot swap Item Symbol Min Typ Max Unit Test Conditions HSP ON threshold voltage VthHSP 1.14 1.19 1.23 V 95% typ of reference 1.25V HSP charge current IcHSP −7 −10 −13 µA VHSP = 5V, VEIN = 2V HSP output Lo voltage VOLHSP 0.3 0.6 V VEIN = 1V, Iosink = 50mA Rev.1, Jan. 2001, page 7 of 21 HA16341NT/FP, HA16342NT/FP Electrical Characteristics (cont.) (Ta = 25°C, VCC = 12V, PG1 = 3V, Vtrig = 0V, VCS(+) = 0V, VCin = 0V, CCT = 330pF, GvOP1 = 26dB, GvOP4 = 40dB, RDB = 1.8kΩ) • Oscillator Item Symbol Min Typ Max Unit Test Conditions Note Typical oscillating frequency fosctyp 180 200 220 kHz Maximum oscillating frequency foscmax 400 kHz Typical oscillating temperature stability dfosc ±5 % CT charge current Ici −135 −169 −203 µA ±20% CT discharge current Icd 616 770 924 µA ±20% Upper trip point VthCTH 3.4 V 2 Lower trip point VthCTL 1.3 V Amplitude dVCT 2.1 V Exit trigger Vth Vthtrig −0.3 −0.5 −0.7 V ±10% −20°C < Ta < 85°C 1 Notes: 1. Design spec. 2. In case of external trigger control, CCT should be changed from 330 pF to 430 pF. At this synchronous and 430 pF CCT condition VthCTH becomes about 2.9 V. • Vref Item Symbol Min Typ Max Unit Test Conditions Note ±2% Reference voltage Vref 4.9 5.0 5.1 V Iosource = 1mA Line regulation Vref-line 5 20 mV Iosource = 1mA 12V < VCC < 18V Load regulation Vref-load 5 20 mV 0 < Iosource < 3mA Temperature stability dVref 80 ppm/°C −20°C < Ta < 85°C 1 Test Conditions Note Note: 1. Design spec. • UVL Item Symbol Min Typ Max Unit Hi threshold voltage VH 9.5 10.0 10.5 V Lo threshold voltage VL 8.5 9.0 9.5 V Hysteresis dVUVL 0.6 1.0 1.4 V Rev.1, Jan. 2001, page 8 of 21 HA16341NT/FP, HA16342NT/FP Electrical Characteristics (cont.) (Ta = 25°C, VCC = 12V, PG1 = 3V, Vtrig = 0V, VCS(+) = 0V, VCin = 0V, CCT = 330pF, GvOP1 = 26dB, GvOP4 = 40dB, RDB = 1.8kΩ) • PG1 Item Min Typ Max Unit PG1 threshold Hi voltage VthHPG1 2.4 2.5 2.6 V PG1 threshold Lo voltage VthLPG1 1.9 2.0 2.1 V Input impedance (37.5) 50.0 (62.5) kΩ Note: Symbol RinPG1 Test Conditions Note 1 1. Design spec. • FAIL Item Symbol Min Typ Max Unit Test Conditions Note Leak current IleakFAIL −10 µA VFAIL = 5V Output Lo voltage VOLFAIL 0.5 V Iosink = 10mA Item Symbol Min Typ Max Unit Test Conditions Note Input threshold voltage VthEIN 1.23 1.25 1.27 V VEOUT = 1.25V ±1.6% VEIN = 2V • Error amp. Input bias current IibEIN −0.2 −2.0 µA Open loop gain AvoEA 60 80 dB Band width BWEA (0.7) 1.4 MHz EOUT sink current IosinkEA 0.5 5.0 mA VEIN = 1.5V, EOUT = 1.1V EOUT source current IosourceEA −100 −250 µA VEIN = 1.0V, EOUT = 5V EOUT clamp voltage VOHEA 5.8 6.8 7.8 V VEIN = 1.0V EOUT Lo voltage VOLEA 1.0 V VEIN = 1.5V, Iosink = 200µA Note: 1 1. Design spec. • PWM OUT Item Symbol Min Typ Max Unit Test Conditions Output Lo voltage VOLPWM 0.2 0.4 V Iosink = 100mA Output Hi voltage VOHPWM VCC−0.4 VCC−0.2 V Iosource = 100mA Rise time trPWM 20 50 100 ns CL = 3300pF Fall time tfPWM 20 50 100 ns CL = 3300pF Maximum duty Dmax 58 65 72 % VSS = 4V, VEIN = 1.0V Minimum duty Dmin 0 % VSS = 4V, VEIN = 1.5V Note: Note 1. Design spec. Rev.1, Jan. 2001, page 9 of 21 HA16341NT/FP, HA16342NT/FP Electrical Characteristics (cont.) (Ta = 25°C, VCC = 12V, PG1 = 3V, Vtrig = 0V, VCS(+) = 0V, VCin = 0V, CCT = 330pF, GvOP1 = 26dB, GvOP4 = 40dB, RDB = 1.8kΩ) • MR OUT Item Symbol Min Typ Max Unit Test Conditions Output Lo voltage VOLMR 0.2 0.4 V Iosink = 100mA Output Hi voltage VOHMR VCC−0.4 VCC−0.2 V Iosource = 100mA Rise time trMR 20 50 100 ns CL = 3300pF Fall time tfMR 20 50 100 ns CL = 3300pF Symbol Min Typ Max Unit Test Conditions Note • MF OUT Item Note Output Lo voltage VOLMF 0.2 0.4 V Iosink = 200mA Output Hi voltage VOHMF VCC−0.4 VCC−0.2 V Iosource = 200mA Rise time trMF 20 50 100 ns CL = 6000pF Fall time tfMF 20 50 100 ns CL = 6000pF Item Symbol Min Typ Max Unit Test Conditions Dead band time1 Td1typ 0 50 100 ns RDB = 1.8kΩ Dead band time2 Td2typ 0 100 200 ns RDB = 1.8kΩ MR to MF delay time t1 (−20) (50) ns t1 = MF off − MR on 1 PWM to MR delay time t2 (−20) (50) ns t2 = MR off − PWM off 1 MR delay time t3 1 µs t3 = CT low trip point − MR on 1 Maximum Dead band adjust time1 Tdadj1 Td1typ +300 ns RDB = 47kΩ 1 Maximum Dead band adjust time2 Tdadj2 Td2typ +600 ns RDB = 47kΩ 1 • Dead band time Note: 1. Design spec. Measurement is 50% slice point. Rev.1, Jan. 2001, page 10 of 21 Note HA16341NT/FP, HA16342NT/FP Electrical Characteristics (cont.) (Ta = 25°C, VCC = 12V, PG1 = 3V, Vtrig = 0V, VCS(+) = 0V, VCin = 0V, CCT = 330pF, GvOP1 = 26dB, GvOP4 = 40dB, RDB = 1.8kΩ) • SS Item Symbol Min Typ Max Unit Test Conditions Note SS sink current Idss 500 µA PG1 = 2V, VSS = 2V Item Symbol Min Typ Max Unit Test Conditions Note OVP latch voltage VOVP 6.5 7.5 8.5 V Note • OVP • Current consumption Item Symbol Min Typ Max Unit Test Conditions Operating current ICC 5.4 7.4 9.4 mA VCT = 1V Standby current ISTBY 200 600 µA VCC = 8V, PG1 = 0V Rev.1, Jan. 2001, page 11 of 21 HA16341NT/FP, HA16342NT/FP Timing Chart 1 (Total) UVL1 Hi 10.0V typ VCC UVL1 Lo 9.0V typ 0V UVL2 threshold 4.6V typ Vref (5V typ) 0V PG1 (by switch) 3V ON OFF ON 0V UVL2 (internal) 0V SS 0V VthCTH: 3.4V typ CT VthCTL: 1.3V typ 0V OUT (PWM) Note 1 0V 1.25V (100%) 1.187V (95%) EIN 0V OUT (HSP) 0V Note: 1. The output of PWM, MR and MF do not appear in the first period of CT cycle due to start-up latch circuit. Rev.1, Jan. 2001, page 12 of 21 HA16341NT/FP, HA16342NT/FP Timing Chart 2 (Hot Swap) Vref 0V 3V PG1 0V Internal latch signal (inverting) (OVP, OCL or Reverse current) : Node S1 in Block Diagram 0V SET RESET UVL2 (internal) 0V 1.25V (100%) 1.187V (95%) EIN 0V Internal latch signal : Node S2 in Block Diagram 0V HSP out Gate charging by 10µA source current Gate discharging by 0.5A max sink current 0V Note: Reverse current is HA16341NT/FP only. Rev.1, Jan. 2001, page 13 of 21 HA16341NT/FP, HA16342NT/FP Timing Chart 3 (Dead Band Control) VSS CT PWM OUT MR OUT MF OUT Td1 Td2 t1 t2 t3 Note: VSS determines maximum duty. This waveform example shows the case of EIN = Lo. VSS: Voltage of SS pin 800 Td1 Td2 700 Vref RDB HA16341 DB Td1, Td2 (ns) 600 500 400 300 200 100 0 0 10 20 30 RDB (kΩ) Rev.1, Jan. 2001, page 14 of 21 40 50 HA16341NT/FP, HA16342NT/FP Timing Chart 4 (Soft Start) CT SS SS CT VthCTH: 3.4V Note * VthCTL: 1.3V OUT (PWM) Note: Self-oscillation: VthCTH = 3.4V typ Synchronized operation: VthCTH = 2.9V typ Case VHSS ≥ VthCTH Maximum duty would be the value specified in page 9. Case VHSS < VthCTH Maximum duty decrease to the corresponding value. Please refer to formula 1 as design value of maximum duty. Max duty = (tss − 0.63µs − Td1) × Operating frequency ⋅ ⋅ ⋅ ⋅ ⋅ Formula 1 C tss = CT (VHSS − VthCTL) Ici : CT charge current Ici : CT terminal capacitor CCT VthCTH : CT upper trip point VthCTL : CT lower trip point Select values R1, R2 and C1 for suitable maximum duty and SS time constant. Vref (5V) R1 C1 HA16341 SS R2 VHSS = R2 Vref (5V) R1 + R2 SS C R1 R2 R1 + R2 Figure A. SS Terminal Application Rev.1, Jan. 2001, page 15 of 21 HA16341NT/FP, HA16342NT/FP Timing Chart 5 (External Trigger Control) Primary IC oscillation 0V Primary IC AUX-OUT 0V Trigger input (Trig terminal) 0V Trigger Vth Vtrig: −0.5V typ Trigger detector internal signal 0V VthCTH = about 2.9V @CCT = 430pF Secondary oscillation 0V This IC is triggered by negative pulse. R1 and R2 must be calculated including internal impedance of 230kΩ. Primary Secondary Vref (5V) R1 Primary IC AUX-OUT 230k Trig HA16341 R2 Figure B. External Trigger Application Rev.1, Jan. 2001, page 16 of 21 HA16341NT/FP, HA16342NT/FP Timing Chart 6 (Duty Control) CT' + Vo OP1-2 (internal) 1/3×(EOUT−2VBE) CT' + Vo OP1-2 300mV 1/3×(EOUT−2VBE) (internal) OUT (PWM) CT 5.33 The amplitude of CT' is 300mV typ at synchronous operation with trigger frequency as 200kHz and CCT = 430pF. CT' = 1/3×(EOUT−2VBE) 1.24V clamp 1.3 1.24 1.2 1.1 1.0 0.9 Duty control area 0.8 No output area in case of 50% max duty Vo OP1-2 (V) 0.7 0.6 0.5 0.4 300mV Max duty area 0.3 0.2 1.54V 0.1 2.44V 5.26V 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 VEOUT (V) Rev.1, Jan. 2001, page 17 of 21 HA16341NT/FP, HA16342NT/FP Timing Chart 7 (Current Limitting) 1/3×(EOUT−2VBE) = 1.24V clamped (internal) CT' + Vo OP1-2 300mV (internal) OUT (PWM) CT 5.33 The amplitude of CT' is 300mV typ at synchronous operation with trigger frequency as 200kHz and CCT = 430pF. CT' = 70 PWM ON Duty (%) 60 50 40 30 20 10 CCT = 430pF, RDB = 1.8kΩ, VHSS = 4V Synchronized operation with 200kHz 0 20 30 40 50 CS(+) (mV) Rev.1, Jan. 2001, page 18 of 21 60 70 HA16341NT/FP, HA16342NT/FP Timing Chart 8 (Interface with Primary Control IC) Vref PG1 (from primary IC) Internal latch signal (inverting) (OVP, OCL or Reverse current) : Node S1 in Block Diagram SET RESET UVL2 (internal signal) OUT (PWM) FAIL (to primary IC) Note: Reverse current is HA16341NT/FP only. Rev.1, Jan. 2001, page 19 of 21 HA16341NT/FP, HA16342NT/FP Package Dimensions As of January, 2001 Unit: mm 27.10 28.10 Max 13 8.8 10.0 Max 24 12 0.48 ± 0.10 4.04 ± 0.20 0.51 Min 1.5 Max 1.78 ± 0.25 10.16 5.06 Max 1.0 2.54 Min 1 + 0.10 0.25 − 0.05 1° − 13° Hitachi Code JEDEC EIAJ Mass (reference value) DP-24TS 2.04 g As of January, 2001 Unit: mm 18.4 19.2 Max 14 1 13 *0.37 ± 0.08 0.35 ± 0.06 2.8 3.6 0.10 − 0.10 0.80 + 0.15 1.20 Max 0.16 M *0.32 ± 0.07 0.30 ± 0.05 3.0 Max 8.3 26 10.93 + 0.15 − 0.25 1.315 0° − 8° 0.15 0.70 +− 0.20 0.10 *Dimension including the plating thickness Base material dimension Rev.1, Jan. 2001, page 20 of 21 Hitachi Code JEDEC EIAJ Mass (reference value) FP-26DT 0.98 g HA16341NT/FP, HA16342NT/FP Disclaimer 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. 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Hitachi Tower 16 Collyer Quay #20-00 Singapore 049318 Tel : <65>-538-6533/538-8577 Fax : <65>-538-6933/538-3877 URL : http://www.hitachi.com.sg Hitachi Asia Ltd. (Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road Hung-Kuo Building Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://semiconductor.hitachi.com.hk Copyright © Hitachi, Ltd., 2001. All rights reserved. Printed in Japan. Colophon 4.0 Rev.1, Jan. 2001, page 21 of 21