HA16141P/FP, HA16142P/FP
PFC and PWM Controller
ADE-204-036D (Z)
Preliminary
Rev. 4
Sep. 2001
Description
The HA16141P/FP and the HA16142P/FP are power supply controller ICs combining an AC-DC converter
switching controllers for power factor correction and off-line power supply switching controllers. PFC
(Power factor correction) section employs average current mode PWM and off-line power supply control
section employs peak current mode PWM.
The HA16142P/FP is the change version of HA16141P/FP’s PWM maximum on duty cycle.
The PFC operation can be turned on and off by external control signal. Use of this on/off function makes it
possible to disable PFC operation at a low line voltage, or to perform remote control operation from the
transformer secondary side. The PFC power supply boosted output voltage is not only fed to an error
amplifier input signal but also fed to as the boost voltage monitor circuit. PG signal is put out if the boost
voltage is out-of-spec.
The PWM controller, which begins operation at the same time as release of the IC’s UVLO (under-voltage
lockout) is suitable for auxiliary power supply use in a multi-output power supply system.
Features
• Synchronized PFC and PWM timing
• Self oscillation with fixed frequency
PFC
: 100 kHz (±15 %)
PWM : 200 kHz (±15 %)
• PFC function on/off control
• PFC boosted output voltage monitor
• High-output current gate drivers
PFC driver peak current : ±1.5 A typ.
PWM driver peak current : ±1.0 A typ.
• PWM maximum on duty cycle
72% min (HA16141P/FP)
49.5% max (HA16142P/FP)
HA16141P/FP, HA16142P/FP
Pin Arrangement
GND
1
16
PWM-CS
PWM-OUT
2
15
PWM-EO
PFC-OUT
3
14
O.C
VCC
4
13
PFC-EO
VREF
5
12
TIM
PG
6
11
PFC-FB
CAO
7
10
IAC
PFC-CS
8
9
PFC-ON
(Top view)
Pin Description
Pin No.
Symbol
Function
1
GND
Ground
2
PWM-OUT
Power MOS FET driver output (PWM control)
3
PFC-OUT
Power MOS FET driver output (PFC control)
4
VCC
Supply voltage
5
VREF
Reference voltage
6
PG
Power Good signal output (open-drain output)
7
CAO
Average current control error amp. output
8
PFC-CS
PFC control current sense signal input
9
PFC-ON
PFC function on/off signal input
10
IAC
Multiplier reference current input
11
PFC-FB
PFC control error amp. input
12
TIM
Overcurrent timer time setting
13
PFC-EO
PFC control error amp. output
14
O.C
Overcurrent detector signal input
15
PWM-EO
PWM control error amp. output (photocoupler input also possible) (HA16141 only)
PWM control feedback voltage signal input (HA16142 only)
16
PWM-CS
PWM control current sense signal input
Rev.4, Sep. 2001, page 2 of 18
HA16141P/FP, HA16142P/FP
Block Diagram
PFC-EO
13
IAC
10
PFC-CS
8
UVLO
PFC-VAMP
2.7k
PFC-FB 11
2.5V
VCC
4
CAO
7
Multiplier
VREF
−0.5V
PFC-CLIMIT
5 VREF
±1.5A
PFC Control
3 PFC-OUT
PFC-CAMP
Gain
Selector
PFC/PWM
Supervisor
RES
PFC-ON 9
100kHz
1 GND
VCC
Over
Current Det.
Oscillator
200kHz
5R
LATCH
O.C 14
VCC HA16141 only
R
Integrator
PWM-VAMP
±1.0A
PWM Control
2.5V
2 PWM-OUT
16 PWM-CS
12
TIM
6
PG
15
PWM-EO
Rev.4, Sep. 2001, page 3 of 18
HA16141P/FP, HA16142P/FP
System Diagram
B+ OUT
B+
Rec+
1.8m
Q1
Rec−
(385V dc)
T1
+
470µ
(600V)
From PFC-OUT
710k
To
PFC-FB
570k
(1/2W)
+
4.7µ
VRB
4.7k
From
Q2 drain
GND
VCC
Oscillator
5V Internal Bias
200kHz
CT
1µs (HA16141)
2.3µs (HA16142) PWM-RES
5µs
VREF
22.2V
VREF
H
5V VREF
Generator
UVLO
L
0.1µ
500ns
PFC-DT
820k
36k
3.3n
UVL
RAMP
VREF GOOD
100kHz
IMO = K {IAC × (VEO − 1V)}
220p
IAC
IAC
VEO
910k
K
0.1
(5W)
−
+
−
+
IMO
VREF
PFC
-CS
100
3.4V
10µs
0.65V
CAO
VREF H
GOOD L
2.7k
PFC-CAMP
Q
Gate Driver
±1.5A(PEAK)
R
Q
+
−
To T1
S
PFC-CLIMIT
10n
Gate Driver
±1A(PEAK)
PWM
-OUT
K = 0.25
PFC
-EO
750k
47n
K = 0.05
PWM-RES
PFC
-FB
Q
PFC-VAMP
+
−
VCC
3.83V
3.63V
+
−
PFC
-ON
51k
0.1µ
External parts of
PWM-EO pin are
applies to HA16141
only.
PWM
-CS
R
Over
Current
Detector
0.1µ
O.C
+
−
+
−
1V
1.5V
1.2V
1n
0.47µ
×1
+B LOW
PFC-OFF
VREF GOOD
0.3V
0.1
(1W)
Current Monitor
Latch Block
PWM-OFF
S
Q
VREF
+
−
4V
R
−
+
5.1k
Enable to
secondary
51k
2R
2.34V
1.70V
−
+
33k
RB
−
+
+B HIGH
2.75V
2.60V
−
+
−
+
2.5V
Supervisor
720k
PWM
-EO
PWM-VAMP
5RB
HA16141 only
−
+
Gain Selector
From
VRB(B+monitor)
2.2µ
1
(1W)
R
S
2.5V
4.7n
To
Q1 gate
S
−0.5V
55k
PFC
-OUT
R
PG
LOGIC
LOGIC
5V
3V
38.2µ
26.2µ
VCC
TIM
7.1V
R
Q
S
+
−
Integrator
5.2µ
1n
2.5V
Circuit Ground Level
GND
Unit R: Ω
C: F
Note: The constants for the external components are for reference. Please confirm the operation when designing the system.
Rev.4, Sep. 2001, page 4 of 18
HA16141P/FP, HA16142P/FP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
Rating
Supply voltage
VCC
20
V
Peak PFC-OUT current
Ipk-pfc
±1.5
A
3
Peak PWM-OUT current
Ipk-pwm
±1.0
A
3
DC PFC-OUT current
Idc-pfc
±0.15
A
DC PWM-OUT current
Idc-pwm
±0.10
A
Terminal voltage
Vi-group1
−0.3 to VCC
V
4
Vi-group2
−0.3 to Vref
V
5
Vcao
−0.3 to Veoh-ca
V
PFC-EO voltage
Vpfc-eo
−0.3 to Veoh-pfc
V
PWM-EO voltage
Vpwm-eo
−0.3 to Veoh-pwm
V
PFC-ON voltage
Vpfc-on
−0.3 to +7
V
IAC voltage
Vi-ac
−0.3 to +5
V
IAC current
Ii-ac
0.8
mA
PFC-CS voltage
Vi-cs
−1.5 to +0.3
V
TIM voltage
Vi-tim
−0.3 to +6
V
VREF current
Io-ref
−20
mA
PG voltage
Vo-pg
−0.3 to +7
V
PG current
Io-pg
15
mA
Power dissipation
PT
1
W
Operating temperature
Topr
−40 to +105
°C
Storage temperature
Tstg
−55 to +150
°C
Junction temperature
Tj
150
°C
CAO voltage
Note
6
Rated voltages are with reference to the GND pin.
For rated currents, inflow to the IC is indicated by (+), and outflow by (−).
Shows the transient current when driving a capacitive load.
Group1 is the rated voltage for the following pins: PFC-OUT, PWM-OUT
Group2 is the rated voltage for the following pins: VREF, PFC-FB, PWM-CS
This is the value when the ambient temperature (Ta) is 25°C or below. If Ta exceeds 25°C, the
graph below applies. For the SOP package, this value is based on actual measurements on a
10% wiring density glass epoxy circuit board (40 mm × 40 mm × 1.6 mm).
Maximum power
dissipation PT (W)
Notes: 1.
2.
3.
4.
5.
6.
Unit
25°C
105°C
1
0.5
0
−8mW/°C
−40
0
50
100
Ambient temperature Ta (°C)
150
Rev.4, Sep. 2001, page 5 of 18
HA16141P/FP, HA16142P/FP
Electrical Characteristics
(Ta = 25°C, VCC = 14 V)
Item
Supply
Symbol
Min
Typ
Max
Unit
VH
12.2
13.0
13.8
V
Shutdown threshold
VL
9.4
10.0
10.6
V
UVLO hysteresis
dVUVL
2.6
3.0
3.4
V
Start threshold
PFC-OUT
Start-up current
IS
150
200
300
µA
VCC = 12V
Is temperature stability
dIS/dTa
−0.3
%/°C
*1
Operating current
ICC
4
7
9
mA
IAC = 100µA, CL = 0F
Latch current
ILATCH
230
310
375
µA
VCC = 9V
Shunt zener voltage
VZ
21.2
22.2
23.2
V
ICC = 14mA
Vz temperature stability
dVZ/dTa
+4
mV/°C
ICC = 14mA *1
Minimum duty cycle
Dmin-pfc
0
%
CAO = 3.6V
Maximum duty cycle
Dmax-pfc
90
95
98
%
CAO = 0V
Rise time
tr-pfc
30
100
ns
CL = 1000p
Fall time
tf-pfc
30
100
ns
CL = 1000p
Peak current
Ipk-pfc
1.5
A
CL = 0.01µF *1
Low voltage
Vol1-pfc
0.05
0.2
V
Iout = 20mA
Vol2-pfc
0.35
1.4
V
Iout = 200mA
Vol3-pfc
0.03
0.7
V
Iout = 10mA, VCC = 5V
Voh1-pfc
13.5
13.9
V
Iout = −20mA
Voh2-pfc
12.6
13.3
V
Iout = −200mA
Minimum duty cycle
Dmin-pwm
0
%
PWM-EO = 1.3V
PWM-CS = 0V
Maximum duty cycle
Dmax-pwm 72
80
88
%
PWM-EO = 5V
PWM-CS = 0V *2
42.5
46
49.5
%
PWM-EO = 5V
PWM-CS = 0V *3
High voltage
PWM-OUT
Rise time
tr-pwm
30
100
ns
CL = 1000p
Fall time
tf-pwm
30
100
ns
CL = 1000p
Peak current
Ipk-pwm
1.0
A
CL = 0.01µF *1
Low voltage
Vol1-pwm
0.05
0.2
V
Iout = 20mA
Vol2-pwm
0.5
2.0
V
Iout = 200mA
Vol3-pwm
0.03
0.7
V
Iout = 10mA, VCC = 5V
Voh1-pwm
13.5
13.9
V
Iout = −20mA
Voh2-pwm
12.0
13.0
V
Iout = −200mA
High voltage
VREF
Note:
Test Conditions
Output voltage
Vref
4.9
5.0
5.1
V
Isource = 1mA
Line regulation
Vref-line
5
20
mV
Isource = 1mA
VCC = 12V to 18V
Load regulation
Vref-load
5
20
mV
Isource = 1mA to 20mA
Temperature stability
dVref
80
ppm/°C
Ta = −40 to 105°C *1
1. Design spec.
2. Apply to HA16141.
3. Apply to HA16142.
Rev.4, Sep. 2001, page 6 of 18
HA16141P/FP, HA16142P/FP
Electrical Characteristics
(Ta = 25°C, VCC = 14 V) (cont.)
Item
Oscillator
PFC-ON
Supervisor/
PG
Symbol
Min
Typ
Max
Unit
Test Conditions
fpwm
170
200
230
kHz
Measured pin: PWM-OUT
fpfc
85
100
115
kHz
Measured pin: PFC-OUT
fpwm temperature
stability
dfpwm/dTa
±0.1
%/°C
Ta = −40 to 105°C *1
fpwm voltage stability
fpwm(line)
−1.5
+0.5
+1.5
%
VCC = 12V to 18V
Initial accuracy
Ramp peak voltage
Vramp-H
3.4
3.6
V
Ramp valley volatge
Vramp-L
0.65
V
PFC on voltage
Von-pfc
1.3
1.5
1.7
V
PFC off voltage
Voff-pfc
1.0
1.2
1.4
V
PFC on-off hysteresis
dVon-off
0.15
0.30
0.45
V
Input current
Ipfc-on
0.1
1.0
µA
PFC-ON = 2V
PFC GOOD
threshold voltage
Vb-good
2.29
2.34
2.39
V
Input pin: PFC-FB
PFC FAIL
threshold voltage
Vb-fail
1.66
1.70
1.74
V
Input pin: PFC-FB
+B High
PFC inhibit voltage
Vb-h
2.69
2.75
2.81
V
Input pin: PFC-FB
+B High
PFC restart voltage
Vb-res
2.54
2.60
2.66
V
Input pin: PFC-FB
PG leak current
Ioff-pg
0.001
1.0
µA
PG = 5V
PG shunt current
Ion-pg
5
15
mA
PG = 3V *2
Delay to PG
tg-pg
0.2
1
µs
Step signal (5 to 0V) to
PFC-ON
VOC
0.27
0.30
0.33
V
VCS
0.9
1.0
1.1
V
O.C input current
IOC
−0.1
−1.0
µA
O.C = 0V
Sink current
Isnk-tim
3.9
5.2
6.5
µA
TIM = 2V
Source current
O.C trigger
Isrc-tim1
−16
−21
−26
µA
TIM = 2V, O.C = 0.5V *1
Source Current
PWM-CS trigger
Isrc-tim2
−25
−33
−41
µA
TIM = 2V, PWM-CS = 2V *1
Integrated time
O.C trigger
t-tim1
88
110
132
µs
Step signal (0 to 1V) to
O.C, Ctim = 1000p,
Measured pin: PG
Integrated Time
PWM-CS trigger
t-tim2
53
67
81
µs
Step signal (0 to 2V) to
PWM-CS, Ctim = 1000p,
Measured pin: PG
O.C
O.C threshold voltage
(Over Current PWM-CS threshold
Detector)
voltage
Integrator
*1
Notes: 1. Design spec.
2. Maximum rating of PG current is 15 mA. Use series resistor to limit PG current lower than 15
mA.
Rev.4, Sep. 2001, page 7 of 18
HA16141P/FP, HA16142P/FP
Electrical Characteristics
(Ta = 25°C, VCC = 14 V) (cont.)
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Threshold voltage
for PFC stop
Vlch-pfc
2.4
2.5
2.6
V
Input pin: TIM
Threshold Voltage
for PWM stop
Vlch-sys
3.8
4.0
4.2
V
Input pin: TIM
Latch Reset Voltage
Vcc-res
6.1
7.1
8.1
V
Feedback VCC voltage
Vfb-pwm
14.2
14.8
15.4
V
PWM-EO = 2.5V *2
Open loop gain
Av-pwm
45
dB
*1, *2
High voltage
Veoh-pwm
5.1
5.7
6.3
V
VCC = 14V,
PWM-EO: Open
Low voltage
Veol-pwm
0.1
0.3
V
VCC = 16V,
PWM-EO: Open *2
Source current
Isrc-pwm
−77
µA
*1 VCC = 11V
Sink current
Isnk-pwm
77
µA
*1 VCC = 18V *2
Transconductance
respect to VCC
Gm-pwm
19
27
35
µA/V
VCC = 15V,
PWM-EO = 2.5V *2
PWM current Delay to output
sense
td-cs
210
300
ns
PWM-EO = 5V,
PWM-CS = 0 to 2V
PFC current
limit
Threshold voltage
VLM
−0.47
−0.50
−0.53
V
Delay to output
td-LM
280
500
ns
PFC-CS = 0 to −1V
PFC-VAMP
Feedback voltage
Vfb-pfc
2.45
2.50
2.55
V
PFC-EO = 2.5V
Input bias current
Ifb-pfc
−0.30
−0.07
+0.30
µA
Measured pin: PFC-FB
Open loop gain
Av-pfc
65
dB
*1
High voltage
Veoh-pfc
5.1
5.7
6.3
V
PFC-FB = 2.3V,
PFC-EO: Open
Low voltage
Veol-pfc
0.1
0.3
V
PFC-FB = 2.7V,
PFC-EO: Open
Source current
Isrc-pfc
−62
−77
−93
µA
PFC-FB = 1.0V,
PFC-EO = 2.5V
Sink current
Isnk-pfc
62
77
93
µA
PFC-FB = 4.0V,
PFC-EO = 2.5V
Transconductance
Gm-pfcv
120
160
200
µA/V
PFC-FB = 2.5V,
PFC-EO = 2.5V
Latch
PWM-VAMP
Note:
1. Design spec.
2. Apply to HA16141.
Rev.4, Sep. 2001, page 8 of 18
HA16141P/FP, HA16142P/FP
Electrical Characteristics
(Ta = 25°C, VCC = 14 V) (cont.)
Item
PFC-CAMP
IAC/
Multiplier
Symbol
Min
Typ
Max
Unit
Test Conditions
Input offset voltage
Vio-ca
±7
mV
*1
Open loop gain
Av-ca
65
dB
*1
High voltage
Veoh-ca
5.1
5.7
6.3
V
Low voltage
Veol-ca
0.1
0.3
V
Source current
Isrc-ca
−77
µA
CAO = 2.5V *1
Sink current
Isnk-ca
77
µA
CAO = 2.5V *1
Transconductance
Gm-pfcc
120
160
200
µA/V
*1
IAC PIN voltage
Viac
0.7
1.0
1.3
V
IAC = 100µA
Terminal offset current
Imo-offset
−56
−75
−94
µA
IAC = 0A, PFC-CS = 0V,
Measured pin: PFC-CS
Output current
(PFC-ON = 3.4V)
Imo1
−25
µA
PFC-EO = 2V,
IAC = 100µA *1, *2
Imo2
−75
µA
PFC-EO = 4V,
IAC = 100µA *1, *2
Imo3
−5
µA
PFC-EO = 2V,
IAC = 100µA *1, *2
Imo4
−15
µA
PFC-EO = 4V,
IAC = 100µA *1, *2
PFC-CS resistance
Rmo
2.7
kΩ
*1
Threshold voltage
for K = 0.05
VK-H
3.71
3.83
3.95
V
Threshold voltage
for K = 0.25
VK-L
3.51
3.63
3.75
V
VK hysteresis voltage
dVK
0.15
0.20
0.25
V
Output current
(PFC-ON = 3.9V)
Gain
selector
*1
Notes: 1. Design spec.
2. Imo1 to Imo4 are defined as,
Imo = (PFC-CS Terminal Current) − (Imo-offset)
Imo = K {IAC × (VEO − 1V)}
IAC
IAC
VEO
K
Imo
−
+
−
+
VREF
2.7k
PFC-CAMP
55k
PFC-CS
PFC-CS Terminal
Current
Imo-offset
−0.5V
+
−
PFC-CLIMIT
Rev.4, Sep. 2001, page 9 of 18
HA16141P/FP, HA16142P/FP
Internal Timing
1. UVLO
13V
10V
VCC
5V
VREF
4.6V
0V
VREF GOOD
(internal signal)
System Enable
0V
2. Oscillator, Gate driver output
3.2V
Reference
triangle wave CT
200 kHz
(internal signal) 1.6V
PWM-RES
(internal signal)
PFC-DT
(internal signal)
PFC triangle wave
Ramp
100 kHz
(internal signal)
PFC current amp.
output
CAO
3.4V
0.65V
PWM voltage feedback
(internal signal)
PWM current sense
PWM-CS
PWM-OUT
(Trailing Edge control)
PFC-OUT
(Leading Edge control)
Note: All numeric values in the figure are typical values.
Rev.4, Sep. 2001, page 10 of 18
HA16141P/FP, HA16142P/FP
3. PFC controller status
Precondition: VREF GOOD, Non latched.
1.5V
PFC-ON
1.5V
1.2V
2.75V
1.2V
2.60V
PFC-FB
2.34V
2.34V
1.70V
PG
PFC-OUT
PFC pulses stopped
PFC pulses stopped
by PFC-ON,
by PFC-ON,
and PG signal high
and PG signal high
PG signal high due to
PFC pulses stopped due to
PFC pulses stopped
high PFC-FB voltage
by PFC-ON,
(overshoot prevention)
and PG signal high
PG signal high due to
low PFC-FB voltage
low PFC-FB voltage
Normal
Normal
Normal
Normal
operation
operation
operation
operation
Notes: 1. All numeric values in the figure are typical values.
2. PFC-ON
The HA16141P/FP can perform on/off control of the PFC function using the PFC-ON pin.
If an AC voltage that has undergone primary rectification and has been divided with an external resistance is input,
PFC stoppage is possible in the event of a low input voltage.
On/off control by means of a logic signal is also possible.
3. PFC-FB
The input to this pin is the voltage obtained by dividing the stepped-up PFC output voltage.
The pin voltage is fed back to the PFC control system, and is also used for step-up voltage logic decisions.
This is outlined in the figure below.
PFC-OUT pulse stoppage
Hysteresis
(Reduction of step-up voltage overshoot)
2.75V
2.60V
Feedback voltage
2.50V
PG (Power Good) signal is output
2.34V
Hysteresis
1.70V
(Note 3 is continued on the next page)
Rev.4, Sep. 2001, page 11 of 18
HA16141P/FP, HA16142P/FP
3. PFC controller status (cont.)
Notes: 3. PFC-FB (cont.)
The actual input voltage to the PFC-FB pin is the step-up voltage divided with a resistance (see figure below).
If R1 is set as 710 k
W and R2 as 4.7 kW, the decision voltage at the step-up pin (+B) is as shown in the figure below.
+B
R1
710k
W
PFC-FB
PFC-VAMP
-
To Multiplier
+
R2
4.7k
W
2.5V
PFC-EO
Precondition: VREF GOOD, PFC-ON, Non latched.
418V
395V
Step-up voltage
380V
+B
(Typical Output Voltage)
356V
259V
2.75V
2.60V
PFC-FB
2.5V
(PFC Feedback Voltage)
2.34V
1.70V
PG
Power Good Period
PFC-OUT
Notes: 4. All numeric values in the figure are typical values.
Rev.4, Sep. 2001, page 12 of 18
HA16141P/FP, HA16142P/FP
4. PFC-ON pin
The following functions are effected by inputting an AC voltage that has undergone primary rectification
and has been divided with an external resistance to the PFC-ON pin (see figure below).
a) Turning PFC operation off when AC voltage is low
b) Switching multiplier gain with AC 100 V system and 200 V system input
Em
Rec+
3.83V
R1
720k
3.63V
W
-
Switching Multiplier Gain
+
PFC-ON
m
2.2 F
R2
20k
W
1.5V
PFC-ON/OFF Control
+
1.2V
PFC-ON(dc) = 2
= 2
× Em / p × R2 / (R1 + R2)
× (Ö2) × Vac / p × R2 / (R1 + R2)
Precondition: VREF GOOD, Non latched.
AC voltage
157Vac
149Vac
Vac
62Vac
49Vac
0Vac
3.83V
3.63V
PFC-ON
1.5V
1.2V
0V
PFC Status
ON
PFC-ON Period
(internal status)
OFF
Multiplier gain
0.25
(internal status)
0.05
Note: All numeric values in the figure are typical values.
Rev.4, Sep. 2001, page 13 of 18
HA16141P/FP, HA16142P/FP
5. Integrator (OC detection operation)
PWM-RES
(internal signal)
O.C
(overcurrent
detection input)
0.3V
5.2µA
TIM pin current
(integral output
current)
0
−21µA
3V
2.5V
TIM pin voltage
(integral output
voltage)
0.2V
t-tim1
LATCH STATUS
(for PFC-STOP)
LATCH STATUS
(for PWM-STOP)
PFC Stop
PFC Enable
PWM Enable
Note: Timer time calculation equation
Timer time t-tim1 is the time until PG pin inversion (from low to high) after the O.C pin trigger.
t-tim1 can be set using the following approximate equation.
t-tim1 = −Ctim ⋅ (Vlch − pfc − 0.2V) / Isrc − tim1
= −Ctim ⋅ (2.5V − 0.2V) / (−21µA) ⋅ ⋅ ⋅ ⋅ ⋅ Typical calculation
Rev.4, Sep. 2001, page 14 of 18
HA16141P/FP, HA16142P/FP
6. Integrator (PWM-CS detection operation)
PWM-RES
(internal signal)
PWM-CS
(current sense
input)
1V
5.2µA
TIM pin current
(integral output
current)
0
−33µA
4V
2.5V
TIM pin voltage
(integral output
voltage)
0.2V
t-tim2
LATCH STATUS
(for PFC-STOP)
LATCH STATUS
(for PWM-STOP)
PFC Stop
PFC Enable
PWM Stop
t-tim2'
PWM Enable
Note: Timer time calculation equation
Timer time t-tim2 is the time until PG pin inversion (from low to high) after the PWM-CS pin trigger.
t-tim2 can be set using the following approximate equation.
t-tim2 = −Ctim ⋅ (Vlch − pfc − 0.2V) / Isrc − tim2
= −Ctim ⋅ (2.5V − 0.2V) / (−33µA) ⋅ ⋅ ⋅ ⋅ ⋅ Typical calculation
The time at which both the PFC and PWM functions are stopped by this timer can be calculated
using the following approximate equation.
t-tim2' = 1.65 ⋅ t − tim2 ⋅ ⋅ ⋅ ⋅ ⋅ Typical calculation
Rev.4, Sep. 2001, page 15 of 18
HA16141P/FP, HA16142P/FP
Mark Pattern
1, 2: Lot indication
Control code
Ejector pin
123
HA16141P
(HA16142P)
Ejector pin
Type code
Notes: 1. Example of lot indication.
For example, a product manufactured in May 2000 has the markings "0E" in
positions 1 2 in the above figure.
Indication
Production
Month
Year
1
2
May
2000
0
E
Month
Jan
Feb
Mar
Apr
May
Jun
Jul
Code
A
B
C
D
E
F
G
2. Laser marking is used.
Rev.4, Sep. 2001, page 16 of 18
Aug Sep
H
J
Oct
K
Nov Dec
L
M
HA16141P/FP, HA16142P/FP
Package Dimensions
As of January, 2001
19.20
20.00 Max
Unit: mm
1
7.40 Max
9
6.30
16
8
1.3
0.48 ± 0.10
7.62
2.54 Min 5.06 Max
2.54 ± 0.25
0.51 Min
1.11 Max
+ 0.13
0.25 – 0.05
0˚ – 15˚
Hitachi Code
JEDEC
EIAJ
Mass (reference value)
DP-16
Conforms
Conforms
1.07 g
As of January, 2001
Unit: mm
10.06
10.5 Max
9
1
8
1.27
*0.42 ± 0.08
0.40 ± 0.06
0.10 ± 0.10
0.80 Max
*0.22 ± 0.05
0.20 ± 0.04
2.20 Max
5.5
16
0.20
7.80 +– 0.30
1.15
0˚ – 8˚
0.70 ± 0.20
0.15
0.12 M
*Dimension including the plating thickness
Base material dimension
Hitachi Code
JEDEC
EIAJ
Mass (reference value)
FP-16DA
—
Conforms
0.24 g
Rev.4, Sep. 2001, page 17 of 18
HA16141P/FP, HA16142P/FP
Disclaimer
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
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Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
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Copyright © Hitachi, Ltd., 2001. All rights reserved. Printed in Japan.
Colophon 5.0
Rev.4, Sep. 2001, page 18 of 18
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