MICREL SY58051UMG

ULTRA-PRECISION CML
AnyGate® WITH INTERNAL INPUT
AND OUTPUT TERMINATION
Micrel, Inc.
Precision Edge®
SY58051U
®
Precision Edge
SY58051U
FEATURES
■ Three matched-delay input pair provide any logic
function: AND, NAND, OR, NOR, XOR
Precision Edge®
■ Guaranteed AC performance over temperature and
voltage:
DESCRIPTION
• DC-to > 10.7Gbps data rate throughput
• DC-to > 7GHz clock fMAX
• < 190ps Any In-to-Out tpd
• tr / tf < 60ps
■ Ultra low-jitter design:
■
■
■
■
■
■
■
The SY58051U is an ultra-fast, low jitter universal logic
gate with a guaranteed maximum data or clock throughput
of 10.7Gbps or 7GHz, respectively. This AnyGate ®
differential logic device will produce many logic functions of
two Boolean variables, such as AND, NAND, OR, NOR,
DELAY, or NEGATION.
The SY58051U differential inputs include a unique,
internal termination design that allows access to the
termination network through a VT pin. This feature allows
the device to easily interface to different logic standards,
both AC- and DC-coupled without external resistor-bias and
termination networks. The result is a clean, stub-free, lowjitter interface solution. The differential CML output is
optimized for 50Ω environments with internal 50Ω source
termination and a 400mV output swing.
The SY58051U operates from a 2.5V or 3.3V supply,
and is guaranteed over the full industrial temperature range
(–40°C to +85°C). The SY58051U is part of a Micrel’s
Precision Edge® product family.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
• < 1psRMS random jitter
• < 10psPP deterministic jitter
• < 10psPP total jitter (clock)
Unique input termination and VT pin accepts DCcoupled and AC-coupled inputs (CML, PECL)
Internal 50Ω output source termination
Typical 400mV CML output swing (RIN = 50Ω)
Internal 50Ω input termination
Power supply 2.5V ±5% or 3.3V ±10%
–40°C to 85°C temperature range
Available in a 16-pin (3mm × 3mm) MLF® package
APPLICATIONS
■
■
■
■
■
Data communication systems
OC-192, OC-192+FEC
All SONET OC-3 — OC-768 applications
All Fibre Channel applications
All GigE applications
TYPICAL APPLICATION
FUNCTIONAL BLOCK DIAGRAM
A
50Ω
VTA
0
50Ω
Q
/A
B
/Q
50Ω
VTB
S
1
50Ω
/B
S
50Ω
VTS
50Ω
10Gbps 223–1 PRBS
(100mV Input, 400mV Output)
/S
AnyGate and Precision Edge are registered trademarks of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
M9999-020707
[email protected] or (408) 955-1690
Rev.: C
1
Amendment: /0
Issue Date: February 2007
Precision Edge®
SY58051U
Micrel, Inc.
/A
A
GND
VCC
PACKAGE/ORDERING INFORMATION
16
15
14
13
Ordering Information(1)
12
Q
2
11
GND
/B
3
10
GND
VTB
4
9
6
S
/S
5
16-Pin
7
8
VTS
1
B
VCC
VTA
MLF®
/Q
(MLF-16)
Part Number
Package
Type
Operating
Range
Package
Marking
Lead
Finish
SY58051UMI
MLF-16
Industrial
051U
Sn-Pb
SY58051UMITR(2)
MLF-16
Industrial
051U
Sn-Pb
SY58051UMG(3)
MLF-16
Industrial
051U with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
SY58051UMGTR(2, 3)
MLF-16
Industrial
051U with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number
Pin Name
1
VTA
Input Termination Center Tap: Each of the two inputs, (A, /A) terminates to this pin through a
50Ω resistor. The VTA pin provides a center-tap to a termination network for maximum
interface flexibility. See “Input Interface Applications” section for more details.
15,16
2, 3
A, /A
B, /B
Differential Input: These input pairs are the two data inputs to the device. Each pin of a pair
internally terminates to the VTA or VTB pin to 50Ω. Note that these inputs will default to an
indeterminate state if left open. See “Input Interface Applications” section for more details.
4
VTB
Input Termination Center Tap: Each of the two inputs, (B, /B) terminates to this pin through a
50Ω resistor. The VTB pin provides a center-tap to a termination network for maximum
interface flexibility.
5, 6
S, /S
Differential Input: This input pair is the select input to the device. Each pin of this pair
internally terminates to the VTS pin to 50Ω. Note that this input will default to an indeterminate
state if left open. See “Input Interface Applications” section for more details.
7
VTS
Input Termination Center Tap: Each of the two inputs, S, /S terminates to this pin. The VTS
pin provides a center-tap to a termination network for maximum interface flexibility.
8, 13
VCC
Positive Power Supply. Bypass with 0.1µF0.01µF low ESR capacitors.
12, 9
Q, /Q
Differential Output: This CML output pair is the output of the device. It is a logic function of
the A, B, and S inputs. See “Truth Tables” for details.
10, 11, 14
GND,
(Exposed Pad)
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Pin Function
Ground. Exposed pad must be connected to the same potential as GND pin.
2
Precision Edge®
SY58051U
Micrel, Inc.
TRUTH TABLES
A
/A
B
/B
S
/S
Q
/Q
0
1
X
X
0
1
0
1
1
0
X
X
0
1
1
0
X
X
0
1
1
0
0
1
X
X
1
0
1
0
1
0
VEE
AND/NAND
1kΩ
A
A
/A
Q
B /Q
/B /S
S
α
α
VCC
α⋅β
(α ⋅ β)
β β
α
B
β
S
α⋅β
Q
(α
(α⋅⋅β)
/Q
L
L
L
L
H
L
H
L
L
H
L
L
H
L
H
L
H
H
H
L
α
A
B
β
S
α+β
Q
(α + β)
/Q
L
H
L
L
H
H
H
L
H
L
L
H
H
H
L
H
H
H
H
L
S
α
Q
α
/Q
OR/NOR
VCC
A
/A
α
α
Q
/Q
B
/B /S
S
1kΩ
α+β
(α + β)
β β
VEE
VCC
α
α
DELAY/NEGATION
A
/A
Q
/Q
B
/B /S
S
500Ω
α
A
α
α
B
L
X
S
L
H
H
X
S
H
L
VEE
VCC
DELAY/NEGATION
A
/A
500Ω
VEE
β
β
Q
B /Q
/B /S
S
A
β
B
S
β
Q
β
/Q
β
X
L
H
L
H
β
X
H
H
H
L
S
Q
/Q
L
A
A
H
B
B
2:1 MUX
A
B
A
/A
Q
B /Q
/B /S
S
Q
S
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Precision Edge®
SY58051U
Micrel, Inc.
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VCC) .................................. –0.5V to +4.0V
Input Voltage (VIN) ......................................... –0.5V to VCC
CML Output Voltage (VOUT) ......... VCC –1.0V to VCC +0.5V
Termination Current(3)
Source or Sink Current on VTA, VTB, VTS ............... ±60mA
Input Current
Source or Sink Current on A, /A, B, /B, S, /S ....... ±30mA
Lead Temperature (soldering, 20 sec.) ................... +260°C
Storage Temperature (TS) ....................... –65°C to +150°C
Supply Voltage (VCC) ...................... +2.375V to +2.625V or
............................................................ +3.0V to +3.6V
Ambient Temperature (TA) ......................... –40°C to +85°C
Package Thermal Resistance(4)
MLF® (θJA)
Still-Air ............................................................. 61°C/W
MLF® (ψJB)
Junction-to-Board ............................................ 38°C/W
DC ELECTRICAL CHARACTERISTICS(5)
TA = –40°C to +85°C, unless otherwise noted.
Symbol
Parameter
Condition
Min
Typ
Max
Units
VCC
Power Supply
VCC = 2.5V.
VCC = 3.3V.
2.375
3.0
2.5
3.3
2.625
3.6
V
V
ICC
Power Supply Current
No Load, max. VCC.
55
70
mA
RDIFF_IN
Differential Input Resistance
(A-to-/A or B-to-/B or S-to-/S)
80
100
120
Ω
RIN
Input Resistance
(A-to-VTA, B-to-VTB or S-to-VTS)
40
50
60
Ω
VIH
Input HIGH Voltage
(A, /A or B, /B or S, /S)
Note 6
1.2
VCC
V
VIL
Input LOW Voltage
(A, /A or B, /B or S, /S)
Note 6
0
VIH–0.1
V
VIN
Input Voltage Swing
(A, /A or B, /B or S, /S)
Note 6
See Figure 2a.
100
mV
VDIFF_IN
Differential Input Voltage Swing
|A–, /A| or |B–, /B| or |S–, /S|
Note 6
See Figure 2b.
200
mV
|IIN|
Input Current
(A, /A or B, /B or S, /S)
Note 6
21
mA
Notes:
1. Permanent device damage may occur if the ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and
functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute
maximum ratings conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capability use for input of the same package only.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. ψJB uses 4-layer
θJA in still-air, unless otherwise stated.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. Due to the internal termination (see Figure 1a) the input current depends on the applied voltages at A, /A and VTA inputs, the B, /B and VTB inputs or
the S, /S and VTS inputs. Do not apply a combination of voltages that causes the input current to exceed the maximum limit!
M9999-020707
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4
Precision Edge®
SY58051U
Micrel, Inc.
CML OUTPUTS DC ELECTRICAL CHARACTERISTICS(7)
VCC = 2.5V ±5% or 3.3V ±10%; RL = 100Ω across output pair or equivalent; TA = –40°C to +85°C; unless otherwise noted.
Symbol
Parameter
Condition
Min
VOH
Output HIGH Voltage Q, /Q
VOUT
Output Voltage Swing Q, /Q
See Figure 2a.
325
VDIFF_OUT
Differential Output Voltage Swing
Q, /Q
See Figure 2b.
ROUT
Output Source Impedance
Q, /Q
Typ
Max
Units
VCC
V
400
500
mV
650
800
1000
mV
40
50
60
Ω
VCC–0.020
AC ELECTRICAL CHARACTERISTICS(8)
VCC = 2.5V ±5% or 3.3V ±10%; RL = 100Ω across output pair or equivalent; TA = –40°C to +85°C; unless otherwise noted.
Symbol
Parameter
Condition
Min
fMAX
Maximum Operating Frequency
Clock
NRZ Data
10.7
tpd
Propagation Delay
Any Input (A, B, S)-to-Q
tSKEW
Part-to-Part Skew
tJITTER
Data
Clock
tr, tf
Typ
Max
7
GHz
Gbps
190
ps
Note 9
100
ps
Random Jitter (RJ)
Note 10
1
psRMS
Deterministic Jitter (DJ)
Note 11
10
psPP
Cycle-to-Cycle Jitter (RJ)
Note 12
1
psRMS
Total Jitter (TJ)
Note 13
10
psPP
60
ps
Output Rise/Fall Times (20% to 80%)
70
Units
At full output swing.
20
Notes:
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
8.
Measured with 100mV input swing. See “Timing Diagrams” section for definition of parameters. High-frequency AC parameters are
guaranteed by design and characterization.
9.
Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs.
10. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps/3.2Gbps.
11. Deterministic jitter is measured at 2.5Gbps/3.2Gbps with both K28.5 and 223–1 PRBS pattern.
12. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn–Tn–1 where T is the time between rising edges of the output
signal.
13. Total jitter definition: with an ideal clock input of frequency ≤ fMAX, no more than one output edge in 1012 output edges will deviate by more than the
specified peak-to-peak jitter value.
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Precision Edge®
SY58051U
Micrel, Inc.
TIMING DIAGRAM
A
/A
tpd
Q
/Q
B
/B
tpd
Q
/Q
S
/S
tpd
Q
/Q
INPUT AND OUTPUT STAGE INTERNAL TERMINATION
VCC
VCC
50Ω
50Ω
50Ω
/Q
Q
A, B, S
50Ω
VTA, VTB, VTS
50Ω
/A, /B, /S
Figure 1a. Simplified Differential Input Stage
Figure 1b. Simplified Differential Output Stage
DEFINITION OF SINGLE-ENDED AND DIFFERENTIAL SWINGS
VDIFF_IN, VDIFF_OUT
700mV (typical)
VIN, VOUT
350mV
(typical)
Figure 2a. Single-Ended Swing
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Figure 2b. Differential Swing
6
Precision Edge®
SY58051U
Micrel, Inc.
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, GND = 0, VIN = 800mV.
PROPAGATION DELAY (ps)
Q AMPLITUDE (mV)
220
400
350
300
250
200
150
100
50
0
0
2
4
6
8 10 12
FREQUENCY (MHz)
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IN-to-Q Propagation Delay
vs. Input Swing
200
180
160
140
120
100
0
200
PROPAGATION DELAY (ps)
Output Swing
vs. Frequency
500
450
200 400 600 800 1000 1200
INPUT SWING (mV)
7
IN-to-Q Propagation Delay
vs. Temperature
175
150
125
100
75
50
25
0
-60 -40 -20 0 20 40 60 80 100
TEMPERATURE (°C) (Forced Air)
Precision Edge®
SY58051U
Micrel, Inc.
FUNCTIONAL CHARACTERISTICS
VCC = 3.3V, GND = 0, VIN = 800mV.
622Mbps Data (223–1 PRBS)
622MHz Clock
Output Swing
(100mV/div)
Output Swing
(100mV/div)
Q
/Q
Time (200ps/div)
Time (200ps/div)
223–1 PRBS Pattern
10 K28.7 Clock Pattern
2.5Gbps Data (223–1 PRBS)
1.25GHz Clock
Output Swing
(100mV/div)
Output Swing
(100mV/div)
Q
/Q
Time (50ps/div)
Time (100ps/div)
223–1 PRBS Pattern
10 K28.7 Clock Pattern
2.5GHz Clock
3.2Gbps Data (223–1 PRBS)
Output Swing
(100mV/div)
Outpu Swing
(100mV/div)
Q
/Q
Time (50ps/div)
Time (50ps/div)
10 K28.7 Clock Pattern
223–1
7GHz Clock
Output Swing
(50mV/div.)
Q
/Q
Time (20ps/div.)
10 K28.7 Clock Pattern
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PRBS Pattern
Precision Edge®
SY58051U
Micrel, Inc.
INPUT INTERFACE APPLICATIONS
VCC
VCC
VCC
A, B, S
A, B, S
A, B, S
/A, /B, /S
/A, /B, /S
/A, /B, /S
1kΩ
SY58051U
SY58051U
SY58051U
GND
NC
GND
GND
VT
NC
VT
NC
VT
Input HIGH level shown
Figure 3a. Static Input Level
Figure 3c. CML Interface
(DC-Coupled)
Figure 3b. LVDS Interface
(DC-Coupled)
Option: VT may be connected to VCC.
VCC
VCC
VCC
0.01µF
0.1µF
A, B, S
A, B, S
A, B, S
/A, /B, /S
SY58051U
VCC
/A, /B, /S
GND
0.1µF
SY58051U
VCC
R1
VT
VCC
SY58051U
0.1µF
VT
0.1µF
R2
Figure 3d. CML Interface
(AC-Coupled)
Rpd
R1
GND
VT
Rb
Note:
R1 = 1kΩ, R2 = 1.4kΩ.
/A, /B, /S
Rpd
Note: Rb = 50Ω.
Figure 3e. PECL Interface
(DC-Coupled)
R2
Note:
For 3.3V, Rpd = 100Ω, R1 = 1kΩ , R2 = 1.4kΩ.
For 2.5V, Rpd = 50Ω, R1 = 1kΩ , R2 = 1.4kΩ.
Figure 3f. PECL Interface
(AC-Coupled)
RELATED PRODUCT AND SUPPORT DOCUMENTATION
Part Number
Function
Data Sheet Link
SY58016L
3.3V 10Gbps Differential CML Line Driver/
Receiver with Internal Termination
www.micrel.com/product-info/products/sy58016l.shtml
SY58052U
10Gbps Clock/Data Retimer with 50Ω
Input Termination
www.micrel.com/product-info/products/sy58052u.shtml
MLF® Application Note
www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf
New Products and Applications
www.micrel.com/product-info/products/solutions.shtml
HBW Solutions
M9999-020707
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Precision Edge®
SY58051U
Micrel, Inc.
16-PIN MicroLeadFrame® (MLF-16)
Package
EP- Exposed Pad
Die
CompSide Island
Heat Dissipation
Heat Dissipation
VEE
Heavy Copper Plane
VEE
Heavy Copper Plane
PCB Thermal Consideration for 16-Pin MLF® Package
(Always solder, or equivalent, the exposed pad to the PCB)
Package Notes:
1. Package meets Level 2 qualification.
2. All parts dry-packaged before shipment.
3. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
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