MC74LVX74 Dual D−Type Flip−Flop with Set and Clear With 5.0 V−Tolerant Inputs The MC74LVX74 is an advanced high speed CMOS D−type flip−flop. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. The signal level applied to the D input is transferred to O output during the positive going transition of the Clock pulse. Clear (CD) and Set (SD) are independent of the Clock (CP) and are accomplished by setting the appropriate input Low. Features • • • • • • • • • http://onsemi.com MARKING DIAGRAMS 14 SOIC−14 D SUFFIX CASE 751A 1 High Speed: fmax = 145 MHz (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.5 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V Pb−Free Packages are Available* VCC CD2 D2 CP2 SD2 O2 O2 14 13 12 11 10 9 8 LVX74G AWLYWW 1 14 LVX 74 ALYW G G TSSOP−14 DT SUFFIX CASE 948G 1 1 14 SOEIAJ−14 M SUFFIX CASE 965 1 LVX74 ALYWG 1 A = Assembly Location WL, L = Wafer Lot Y = Year W, WW = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) PIN NAMES 1 2 3 4 5 6 7 CD1 D1 CP1 SD1 O1 O1 GND Figure 1. 14−Lead Pinout (Top View) Pins Function CP1, CP2 D1, D2 CD1, CD2 SD1, SD2 On, On Clock Pulse Inputs Data Inputs Direct Clear Inputs Direct Set Inputs Outputs ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 3 1 Publication Order Number: MC74LVX74/D MC74LVX74 4 SD1 SD2 SD 2 D1 D 3 CP1 5 Q 6 Q CP O1 D2 O1 CP2 10 12 11 CD 9 Q 8 Q CP O2 O2 CD 1 CD1 SD D CD2 13 Figure 2. Logic Diagram INPUTS OUTPUTS SDn CDn CPn Dn On On OPERATING MODE L H H L X X X X H L L H Asynchronous Set Asynchronous Clear L L X X H H Undetermined H H H H ↑ ↑ h l H L L H Load and Read Register H H ↑ X NC NC Hold H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Low−to−High Clock Transition; L = Low Voltage Level; l = Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition; NC = No Change; X = High or Low Voltage Level or Transitions are Acceptable; ↑ = Low−to−High Transition; ↑ = Not a Low−to−High Transition; For ICC Reasons DO NOT FLOAT Inputs ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage Parameter –0.5 to +7.0 V Vin DC Input Voltage –0.5 to +7.0 V Vout DC Output Voltage –0.5 to VCC +0.5 V IIK Input Diode Current −20 mA IOK Output Diode Current ±20 mA Iout DC Output Current, per Pin ±25 mA ICC DC Supply Current, VCC and GND Pins ±50 mA PD Power Dissipation 180 mW Tstg Storage Temperature –65 to +150 _C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage Vin DC Input Voltage Vout DC Output Voltage TA Dt/DV Operating Temperature, All Package Types Input Rise and Fall Time http://onsemi.com 2 Min Max Unit 2.0 3.6 V 0 5.5 V 0 VCC V −40 +85 _C 0 100 ns/V MC74LVX74 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions TA = 25°C VCC V Min 1.5 2.0 2.4 VIH High−Level Input Voltage 2.0 3.0 3.6 VIL Low−Level Input Voltage 2.0 3.0 3.6 VOH High−Level Output Voltage (Vin = VIH or VIL) IOH = −50mA IOH = −50mA IOH = −4mA 2.0 3.0 3.0 VOL Low−Level Output Voltage (Vin = VIH or VIL) IOL = 50mA IOL = 50mA IOL = 4mA 2.0 3.0 3.0 Iin Input Leakage Current Vin = 5.5V or GND 3.6 ICC Quiescent Supply Current Vin = VCC or GND 3.6 Typ TA = − 40 to 85°C Max Min Max 1.5 2.0 2.4 V 0.5 0.8 0.8 1.9 2.9 2.58 2.0 3.0 0.0 0.0 Unit 0.5 0.8 0.8 1.9 2.9 2.48 V V 0.1 0.1 0.36 0.1 0.1 0.44 V ±0.1 ±1.0 mA 2.0 20.0 mA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) TA = 25°C Symbol tPLH, tPHL tPLH, tPHL fmax tOSHL tOSLH Typ Max Min Max Unit VCC = 2.7V CL = 15pF CL = 50pF 7.3 9.8 15.0 18.5 1.0 1.0 18.5 22.0 ns VCC = 3.3 ± 0.3V CL = 15pF CL = 50pF 5.7 8.2 9.7 13.2 1.0 1.0 11.5 15.0 VCC = 2.7V CL = 15pF CL = 50pF 8.4 10.9 15.6 19.1 1.0 1.0 18.5 22.0 VCC = 3.3 ± 0.3V CL = 15pF CL = 50pF 6.6 9.1 10.1 13.6 1.0 1.0 12.0 15.5 VCC = 2.7V CL = 15pF CL = 50pF 55 45 135 60 50 40 VCC = 3.3 ± 0.3V CL = 15pF CL = 50pF 95 60 145 85 80 50 VCC = 2.7V VCC = 3.3 ±0.3V CL = 50pF CL = 50pF Parameter Propagation Delay CP to O or O Propagation Delay SD or CD to O or O Maximum Clock Frequency (50% Duty Cycle) Output−to−Output Skew (Note 1) Test Conditions Min TA = − 40 to 85°C ns MHz 1.5 1.5 1.5 1.5 ns 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ TIMING REQUIREMENTS (Input tr = tf = 3.0ns) Symbol Parameter Guaranteed Limit VCC V TA = 25_C TA = − 40 to 85_C Unit tw Minimum Pulse Width, CP 2.7V 3.3V ±0.3 8.5 6.0 10.0 7.0 ns tw Minimum Pulse Width, CD or SD 2.7V 3.3V ±0.3 8.5 6.0 10.0 7.0 ns tsu Minimum Setup Time, D to CP 2.7V 3.3V ±0.3 8.0 5.5 9.5 6.5 ns th Minimum Hold Time, D to CP 2.7V 3.3V ±0.3 0.5 0.5 0.5 0.5 ns Minimum Recovery Time, SD or CD to CP 2.7V 3.3V ±0.3 6.5 5.0 7.5 5.0 ns trec http://onsemi.com 3 MC74LVX74 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ CAPACITIVE CHARACTERISTICS TA = 25°C Symbol Min Parameter TA = − 40 to 85°C Typ Max 10 Cin Input Capacitance 4 CPD Power Dissipation Capacitance (Note 2) 25 Min Max Unit 10 pF pF 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 2 (per flip−flop). CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package) TA = 25°C Typ Characteristic Symbol Max Unit VOLP Quiet Output Maximum Dynamic VOL 0.3 0.5 V VOLV Quiet Output Minimum Dynamic VOL −0.3 −0.5 V VIHD Minimum High Level Dynamic Input Voltage 2.0 V VILD Maximum Low Level Dynamic Input Voltage 0.8 V ORDERING INFORMATION Device Package MC74LVX74DR2 SOIC−14 MC74LVX74DR2G SOIC−14 (Pb−Free) MC74LVX74DT TSSOP−14* MC74LVX74DTG TSSOP−14* MC74LVX74DTR2 TSSOP−14* MC74LVX74DTR2G TSSOP−14* MC74LVX74M SOEIAJ−14 MC74LVX74MG SOEIAJ−14 (Pb−Free) MC74LVX74MEL SOEIAJ−14 MC74LVX74MELG SOEIAJ−14 (Pb−Free) Shipping† 2500 Tape & Reel 96 Units / Rail 2500 Tape & Reel 50 Units / Rail 2000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. http://onsemi.com 4 MC74LVX74 SWITCHING WAVEFORMS tw CP 50% VCC O or O GND tw tPLH 1/fmax tPLH O or O GND tPHL VCC 50% VCC 50% SD or CD tPHL 50% VCC O or O trec 50% VCC 50% CP Figure 3. Figure 4. VALID D VCC 50% tsu GND th VCC 50% CP GND Figure 5. TEST CIRCUIT TEST POINT OUTPUT DEVICE UNDER TEST CL* *Includes all probe and jig capacitance Figure 6. http://onsemi.com 5 VCC GND MC74LVX74 PACKAGE DIMENSIONS SOIC−14 D SUFFIX CASE 751A−03 ISSUE G −A− 14 8 −B− P 7 PL 0.25 (0.010) M B M 7 1 G F R X 45 _ C −T− D 14 PL 0.25 (0.010) SEATING PLANE M T B A S DIM A B C D F G J K M P R J M K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. S MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 TSSOP−14 CASE 948G−01 ISSUE A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S S N 2X 14 L/2 0.25 (0.010) 8 M B −U− L PIN 1 IDENT. F 7 1 0.15 (0.006) T U N S DETAIL E K A −V− ÉÉÉ ÇÇÇ ÇÇÇ ÉÉÉ K1 J J1 SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE D G H DETAIL E http://onsemi.com 6 DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ MC74LVX74 PACKAGE DIMENSIONS SOEIAJ−14 CASE 965−01 ISSUE A 14 LE 8 Q1 E HE L 7 1 M_ DETAIL P Z D VIEW P A e c DIM A A1 b c D E e HE 0.50 LE M Q1 Z A1 b 0.13 (0.005) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). M 0.10 (0.004) MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 1.42 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.056 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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