TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS FEATURES • • • • • • • • • DBV PACKAGE (TOP VIEW) Minimum Supply Voltage of 0.75 V Supply Voltage Supervision Range: – 1.2 V, 1.5 V, 1.8 V (TPS312x) – 3 V (TPS3125 Devices Only) – Other Versions on Request Power-On Reset Generator With Fixed Delay Time of 180 ms Manual Reset Input (TPS3123/5/6/8) Watchdog Timer Retriggers the RESET Output at VDD≥ VIT Supply Current of 14 µA (Typ) Small SOT23-5 Package Temperature Range of -40°C to 85°C Reset Output Available in Push-Pull (Active Low and High) and Open-Drain (Active-Low) TPS3123/T PS3128 RESET 1 GND 2 MR 3 • • • • • • VDD 4 WDI TPS3124 RESET 1 GND 2 RESET 3 5 VDD 4 WDI TPS3125/ TPS3126 APPLICATIONS • 5 Applications Using Low Voltage DSPs, Microcontrollers, or Microprocessors Portable/Battery-Powered Equipment Wireless Communication Systems Programmable Controls Industrial Equipment Notebook/Desktop Computers Intelligent Instruments RESET 1 GND 2 RESET 3 5 VDD 4 MR 1.2 V CVDD DVDD TMS320UVC5402 VDD RESET MR WDI TPS3123J12 RESET XF GND GND Figure 1. Typical Low-Voltage DSP Application Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2004, Texas Instruments Incorporated TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 DESCRIPTION The TPS312x family of ultralow voltage processor supervisory circuits provides circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power-on, RESET is asserted when the supply voltage (VDD) becomes higher than 0.75 V. Thereafter, the supply voltage supervisor monitors VDD and keeps RESET output active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 180 ms, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by a high precision internal voltage divider. The TPS3123/5/6/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become active. The TPS3124 devices do not have the input MR, but include a high-level output RESET same as the TPS3125 and TPS3126 devices. In addition, the TPS3123/4/8 have a watchdog timer that needs to be triggered periodically by a positive or negative transition at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval ttout= 0.8 s, RESET output becomes active for the time period (td). This event also reinitializes the watchdog timer. The circuits are available in a 5-pin SOT23-5 package. The TPS312x devices are characterized for operation over a temperature range of -40°C to 85°C. PACKAGE INFORMATION STANDARD VERSIONS (1) TA -40°C to 85°C (1) (2) (3) 2 DEVICE NAME THRESHOLD VOLTAGE MARKING TPS3123J12DBVR (2) TPS3123J12DBVT (3) 1.08 V PBNI TPS3123G15DBVR (2) TPS3123G15DBVT (3) 1.40 V PBOI TPS3123J18DBVR (2) TPS3123J18DBVT (3) 1.62 V PBPI TPS3124J12DBVR (2) TPS3124J12DBVT (3) 1.08 V PBQI TPS3124G15DBVR (2) TPS3124G15DBVT (3) 1.40 V PBRI TPS3124J18DBVR (2) TPS3124J18DBVT (3) 1.62 V PBSI TPS3125J12DBVR (2) TPS3125J12DBVT (3) 1.08 V PBTI TPS3125G15DBVR (2) TPS3125G15DBVT (3) 1.40 V PBUI TPS3125J18DBVR (2) TPS3125J18DBVT (3) 1.62 V PBVI TPS3125L30DBVR (2) TPS3125L30DBVT (3) 2.64 V PBXI TPS3126E12DBVR (2) TPS3126E12DBVT (3) 1.14 V PFOI TPS3126E15DBVR (2) TPS3126E15DBVT (3) 1.43 V PFPI TPS3126E18DBVR (2) TPS3126E18DBVT (3) 1.71 V PFQI TPS3128E12DBVR (2) TPS3128E12DBVT (3) 1.14 V PFRI TPS3128E15DBVR (2) TPS3128E15DBVT (3) 1.43 V PFSI TPS3128E18DBVR (2) TPS3128E18DBVT (3) 1.71 V PFTI Other versions available. Contact Texas Instruments for deetails, minimum order quantities apply. The DBVR passive indicates tape and reel of 3000 parts. The DBVT passive indicates tape and reel of 250 parts. TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 TPS312 3 J 12 DBV R Reel Package Nominal Supply Voltage Typical Reset Threshold Voltage Functionality Family Table 1. Ordering Information Application Specific Versions (1) DEVICE NAME NOMINAL SUPPLY VOLTAGE, VNOM DEVICE NAME TYPICAL RESET THRESHOLD VOLTAGE-VIT- TPS312xx12DBV 1.2 V TPS312xAxxDBV VNOM-1% TPS312xx15DBV 1.5 V TPS312xBxxDBV VNOM-2% TPS312xx18DBV 1.8 V TPS312xCxxDBV VNOM-3% TPS312xx30DBV 3.0 V TPS312xDxxDBV VNOM-4% TPS312xExxDBV VNOM-5% TPS312xFxxDBV VNOM-6% TPS312xGxxDBV VNOM-7% TPS312xHxxDBV VNOM-8% TPS312xIxxDBV VNOM-9% (1) TPS312xJxxDBV VNOM-10% TPS312xKxxDBV VNOM-11% TPS312xLxxDBV VNOM-12% TPS312xMxxDBV VNOM-13% TPS312xNxxDBV VNOM-14% TPS312xOxxDBV VNOM-15% For the application specific versions contact Texas Instruments for availability, lead time, and minimum order quantities. Table 2. Function Tables TPS3123/8 TPS3124 MR VDD > VIT RESET VDD > VIT L 0 L L 1 L H 0 H 1 TPS3125/6 RESET RESET MR VDD > VIT RESET RESET 0 L H L 0 L H 1 H L L 1 L H L H 0 L H H H 1 H L Reset Topology DEVICES OPEN DRAIN PUSH-PULL TPS3123 X TPS3124 X TPS3125 X TPS3126 X TPS3128 X 3 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 FUNCTIONAL BLOCK DIAGRAM VDD Device Power Supply R1 MR† R2 RESET Reset Logic + Timer RESET§ R3 GND Reference Voltage Watchdog Logic + Timer Transition Detector WDI‡ † TPS3123/5/6/8 TPS3123/4/8 § TPS3124/5/6 ‡ TIMING DIAGRAM TPS3123/5/6/8 A B C D E F G VDD VIT <0.85 V t MR t RESET td td td t Output Undefined 4 Output Undefined TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 TIMING DIAGRAM TPS3123/4//8 A B VDD VIT <0.85 V t G MR (TPS3123) t C D E F J H WDI * * * * * t td td td td td RESET ttout ttout ttout t Output Undefined * = WDI Disabled ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT Manual reset, MR -0.3 V to VDD + 0.6 V Supply voltage, VDD 3.6 V Watchdog input, WDI -0.3 V to VDD+ 6 V Maximum low output current, IOL Maximum high output current, IOH 5 mA -5 mA Input clamp current, IIK (VI< 0 or VI > VDD) ±10 mA Output clamp current, IOK (VO < 0 or VO > VDD) ±10 mA Continuous total power dissipation See Dissipation Rating Table Operating free-air temperature range, TA -40°C to 85°C Storage temperature range, Tstg -65°C to 150°C Soldering temperature (1) 260°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 5 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DBV 437 mW 3.5 mW/°C 280 mW 227 mW RECOMMENDED OPERATING CONDITIONS at specified temperature range Supply voltage, VDD MIN MAX TA = 0°C to 85°C 0.75 3.3 TA = -40°C to 85°C 0.85 3.3 0.0 VDD+0.3 V 0 VDD +0.3 V Manual reset voltage, VDD Watchdog input voltage, VWD1 High-level input voltage, VIH UNIT V 0.7×VDD Low-level input voltage, VIL V 0.3×VDD Input transition rise and fall rate at WDI,∆ t/∆V Operating free-air temperature range, TA 40 V 1 µs/V 85 °C ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MR pullup resistor (internal) IIH High-level input current IIL Low-level input current IOH High-level output current (leakage into RESET pin) WDI = VDD = 3.3 V 1 1 MR MR = 0.7 × VDD, VDD = 3.3 V 20 55 WDI WDI = 0 V, VDD = 3.3 V 1 1 MR MR = 0 V, VDD = 3.3 V 80 170 TPS3126-xx, TPS3128-xx VDD = VOH = 3.3 V High-level output voltage (TPS3123/4/5 only) RESET Low-level output voltage RESET VIT- Negative-going input threshold voltage (1) IOH = -1 mA VDD = 3.3 V, IOH = -4.5 mA VDD = 0.75 V, IOH = -8 µA VDD = 1.5 V, IOH = -1 mA VDD = 0.75 V, IOL = 15 µA VDD = 1.5 V, IOL = 1.4 mA VDD = 1.5 V, IOL = 1.4 mA VDD = 3.3 V, IOL = 3 mA (1) 6 Hysteresis at VDD input nA V 0.2 × VDD V 0.4 1.04 1.08 1.12 TPS312xG15 1.35 1.40 1.45 TPS312xJ18 1.56 1.62 1.68 TA = -40°C to 85°C µA 0.8×VDD TPS312xJ12 TPS312xL30 µA 200 VDD = 1.5 V, 2.57 2.64 2.71 TPS312xE12 1.10 1.14 1.18 TPS312xE15 1.38 1.43 1.48 1.65 1.71 1.77 TPS312xE18 Vhys UNIT kΩ WDI RESET VOL MAX 27 RESET VOH TYP 1 V < VIT- < 1.4 V 15 1.4 V < VIT- <2 V 20 2 V < VIT- < 3 V 30 V mV To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near the supply terminal. TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 ELECTRICAL CHARACTERISTICS (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER IDD TEST CONDITIONS TPS3123-xx TPS3124-xx TPS3128-xx Supply current TPS3125-xx TPS3126-xx Ci (2) Input capacitance at MR, WDI WDI = VDD, MR unconnected (2) MR unconnected MIN TYP VDD = 0.75 V 14 VDD = 3.3 V 22 VDD = 0.75 V 14 VDD = 3.3 V 18 VI = 0 V to 3.3 V MAX UNIT 30 µA 25 5 pF The supply current during delay time td is typical 5 µA higher. TIMING REQUIREMENTS at RL = 1 MΩ, CL = 50 pF, TA = 25°C PARAMETER TEST CONDITIONS At VDD tw Pulse width At MR At WDI VIH = VIT- + 0.2 V, VIL = VIT - -0.2 V VDD ≥ VIT- + 0.2 V, VIL = 0.3 x VDD, MIN TYP MAX UNIT 6 VIH = 0.7 × VDD 1 µs 0.1 SWITCHING CHARACTERISTICS at RL = 1 MΩ, CL = 50 pF, TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ttout Watchdog time out VDD ≥ VIT- + 0.2 V, See timing diagram 0.8 1.4 2.1 s td Delay time VDD > VIT- + 0.2 V, See timing diagram 100 180 260 ms tPHL Propagation delay time, high-to-low-level output MR to RESET delay (TPS3123/5/6/8) tPLH Propagation delay time, low-to-high-level output MR to RESET delay (TPS3125/6) tPHL Propagation delay time, high-to-low-level output VDD to RESET delay Propagation delay time, low-to-high-level output VDD to RESET delay (TPS3124/5/6) tPLH VDD ≥ VIT-+ 0.2 V, VIL = 0.2 × VDD, VIH = 0.8 × VDD VIL = VIT- - 0.2 V, VIH = VIT- + 0.2 V 0.1 µs 0.1 10 10 µs 7 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 750 25 VOL − Low-Level Output Voltage − mV TA = 25°C I CC − Supply Current − µ A TPS3123J12 20 15 10 0 1 2 VDD − Supply Voltage − V 3 500 TA = 25°C TA = 0°C 250 0 3.3 50 100 150 200 IOL − Low-Level Output Current − µA Figure 2. Figure 3. LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 250 1.5 850 700 TA = 85°C VOL − Low-Level Output Voltage − V TPS3123J12 VDD = 0.85 V MR = Open 800 VOL − Low-Level Output Voltage − mV TA = 85°C 0 0 TA = 25°C 600 TA = 0°C 500 TA = − 40°C 400 300 200 TPS3125L30 VDD = 1.5 V MR = Open 1.25 TA = 85°C TA = 25°C 1 TA = 0°C TA = − 40°C 0.75 0.5 0.25 100 0 0 0 100 200 300 400 IOL − Low-Level Output Current − µA Figure 4. 8 TPS3123J12 VDD = 0.75 V 500 0 1 2 3 4 5 IOL − Low-Level Output Current − mA Figure 5. 6 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS (continued) LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 3.3 1.6 TPS3125L30 VDD = 3.3 V MR = Open 2.75 2.5 TA = 25°C TA = 0°C 2.25 TA = − 40°C 2 TPS3123J12 VDD = 1.5 V MR = Open 1.4 TA = 85°C VOH − High-Level Output Voltage − V VOL − Low-Level Output Voltage − V 3 1.75 1.5 1.25 1 0.75 0.5 1.2 1 TA = − 40°C TA = 85°C 0.8 TA = 25°C 0.6 0.4 TA = 0°C 0.2 0.25 0 0 0 5 10 15 20 25 30 0 IOL − Low-Level Output Current − mA −3 −4 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT NORMALIZED INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE TPS3123J12 VDD = 3.3 V MR = Open 2.75 2.5 2.25 2 TA = 85°C 1.75 TA = − 40°C 1.5 TA = 25°C 1.25 1 TA = 0°C 0.75 0.5 0.25 0 −5 −10 −15 −20 −25 IOH − High-Level Output Current − mA Figure 8. −30 Normalized Input Threshold Voltage − V IT(T A)/ V IT (25 °C ) Figure 7. 3 VOH − High-Level Output Voltage − V −2 Figure 6. 3.4 0 −1 −5 IOH − High-Level Output Current − mA 1.005 TPS312xJ12 1.004 1.003 1.002 1.001 1 0.999 0.998 −40 −20 0 20 40 60 TA − Free-Air Temperature − °C 80 Figure 9. 9 TPS3123-xx TPS3124-xx, TPS3125-xx TPS3126-xx, TPS3128-xx www.ti.com SLVS227B – AUGUST 1999 – REVISED FEBRUARY 2004 TYPICAL CHARACTERISTICS (continued) MINIMUM PULSE DURATION vs THRESHOLD OVERDRIVE 4.5 1.005 TPS312xL30 4 1.004 t w− Minimum Pulse Duration − µ s Normalized Input Threshold Voltage − V IT(T A)/ V IT (25 °C ) NORMALIZED INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE 1.003 1.002 1.001 1 0.999 0.998 −40 TPS312xL30 3.5 3 2.5 2 1.5 1 0.5 0 −20 0 20 40 60 0 80 50 100 150 200 250 VDD − Threshold Overdrive − mV TA − Free-Air Temperature − °C Figure 10. Figure 11. MINIMUM PULSE DURATION vs THRESHOLD OVERDRIVE 3.5 MR = Open VIT = 1.08 V TA = 25°C t w− Minimum Pulse Duration − µ s 3 TPS312xJ12 2.5 2 1.5 1 0.5 0 0 50 100 150 200 250 VDD − Threshold Overdrive − mV Figure 12. 10 MR = Open VIT = 2.64 V TA = 25°C 300 300 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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