Ordering number : ENA0694A CMOS IC LV5113T 2-Cell Lithium-Ion Secondary Battery Protection IC Overview The LV5113T is a protection IC for 2-cell lithium-ion secondary batteries. Features • Monitoring function for each cell: • High detection voltage accuracy: • Hysteresis cancel function: • Discharge current monitoring function: • Low current consumption: • 0V cell charging function: Detects overcharge and over-discharge conditions and controls the charging and discharging operation of each cell. Over-charge detection accuracy ±25mV Over-discharge detection accuracy ±100mV The hysteresis of over-discharge detection voltage is canceled by sensing the connection of a load after overcharging has been detected. Detects over-currents, load shorting, and excessively high voltage of a charger and regulates charging and discharging operations. Normal operation mode typ. 6.0µA Stand by mode max. 0.2µA Charging is enabled even when the cell voltage is 0V by giving a potential difference between the VDD pin and V- pin. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 52307 MS IM / 30707 MS IM 20061220-S00008 No.A0694-1/8 LV5113T Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Power supply voltage Symbol Conditions Ratings VDD Input voltage Unit -0.3 to +12 V V- VDD-28 to VDD+0.3 V Vcout VDD-28 to VDD+0.3 V Charger minus voltage Output voltage Cout pin voltage Dout pin voltage Allowable power dissipation Vdout Pd max VSS-0.3 to VDD+0.3 Independent IC 170 V mW Operating ambient temperature Topr -30 to +80 °C Storage temperature Tstg -40 to +125 °C Electrical Characteristics at Ta = 25°C, unless especially specified. Parameter Symbol Conditions Operation input voltage Vcell Between VDD and VSS 0V cell charging minimum operation Vmin Between VDD-VSS =0 and VDD-V- Ratings min typ Unit max 1.5 10 V 1.5 V voltage Over-charge detection voltage Vd1 4.325 4.350 4.375 V Over-charge reset voltage Vh1 4.100 4.150 4.200 V Over-charge detection delay time td1 VDD-Vc=3.5V→4.5V, Vc-VSS=3.5V 0.5 1.0 1.5 s tr1 VDD-Vc=4.5V→3.5V, Vc-VSS=3.5V ms Over-charge reset delay time 20.0 40.0 60.0 Over-discharge detection voltage Vd2 2.20 2.30 2.40 V Over-discharge reset hysteresis voltage Vh2 10.0 20.0 40.0 mV Over-discharge detection delay time td2 50 100 150 ms ms Over-discharge reset delay time tr2 VDD-Vc=3.5V→2.2V, Vc-VSS=3.5V 0.5 1.0 1.5 Over-current detection voltage Vd3 VDD-Vc=3.5V, Vc-VSS=3.5V VDD-Vc=2.2V→3.5V, Vc-VSS=3.5V 0.17 0.20 0.23 V Over-current reset hysteresis voltage Vh3 VDD-Vc=3.5V, Vc-VSS=3.5V 5.0 10.0 20.0 mV Over-current detection delay time td3 VDD-Vc=3.5V, Vc-VSS=3.5V 10.0 20.0 30.0 ms Over-current reset delay time tr3 VDD-Vc=3.5V, Vc-VSS=3.5V 0.5 1.0 1.5 ms Short circuit detection voltage Vd4 VDD-Vc=3.5V, Vc-VSS=3.5V 1.0 1.3 1.6 V Short circuit detection delay time td4 VDD-Vc=3.5V, Vc-VSS=3.5V ms Over-charger detection voltage Vd5 Between VDD-Vc=3.5V, Vc-VSS=3.5V (V-)-VSS Overcharge reset hysteresis voltage Vh5 VDD-Vc=3.5V, Vc-VSS=3.5V Standby reset voltage Vstb Between VDD-Vc=2.0V, Vc-VSS=2.0V (V-)-VSS Excessively high voltage charger td5 tr5 0.4 1.0 1.6 -0.60 -0.45 -0.30 V mV 25.0 50.0 100.0 VDD×0.4 VDD×0.5 VDD×0.6 VDD-Vc=3.5V, Vc-VSS=3.5V 0.5 1.5 3.0 ms VDD-Vc=3.5V, Vc-VSS=3.5V 0.5 1.5 3.0 ms 100 200 400 kΩ 15 30 60 kΩ V detection delay time Excessively high voltage charger reset delay time Reset resistance (connected to VDD) * RDD Reset resistance (connected to VSS) RSS Cout Nch ON voltage VOL1 IOL=50µA, VDD-Vc=4.4V, Vc-VSS=4.4V Cout Pch ON voltage VOH1 IOL=50µA, VDD-Vc=3.9V, Vc-VSS=3.9V Dout Nch ON voltage VOL2 IOL=50µA, VDD-Vc=2.2V, Vc-VSS=2.2V Dout Pch ON voltage VOH2 IOL=50µA, VDD-Vc=3.9V, Vc-VSS=3.9V 0.5 VDD-0.5 V V 0.5 VDD-0.5 V V Vc input current Ivc VDD-Vc=3.5V, Vc-VSS=3.5V 0.0 1.0 µA Current drain IDD VDD-Vc=3.5V, Vc-VSS=3.5V 6.0 13.0 µA Standby current Istb VDD-Vc=2.2V, Vc-VSS=3.5V 0.2 µA * Upon connecting to charger upon over-discharge, the delay time after recovery from over-discharge. No.A0694-2/8 LV5113T Package Dimensions unit : mm (typ) 3245B Pd max -- Ta Allowable power dissipation, Pd max -- mW 200 3.0 0.5 3.0 4.9 8 1 (0.53) 2 0.65 0.125 1.1MAX (0.85) 0.25 Independent IC 170 150 100 68 50 0 -30 -20 0 20 40 60 80 100 0.08 Ambient temperature, Ta -- °C SANYO : MSOP8(150mil) Pin Assignment Dout T 8 7 1 2 VDD Cout Vc Sense 6 5 3 V- 4 Top view VSS Pin Functions Pin No. 1 Symbol VDD Description VDD pin 2 Cout Overcharge detection output pin 3 V- Charger minus voltage input pin 4 VSS VSS pin 5 Sense Sense pin 6 Vc Intermediate voltage input pin 7 T Pin to shorten detection time (open under normal condition) 8 Dout Overdischarge detection output pin No.A0694-3/8 LV5113T Block Diagram Sence 5 VDD 1 Level shift + - + + - Vc 6 td5,tr5 2 Cout td1,tr1 Delay control logic + - td2,tr2 8 Dout + + - td3,tr3 + - 4 VSS 3 V- td4 7 T No.A0694-4/8 LV5113T Functional Description Over-charge detection If either of the cell voltage is equal to or more than the over-charge detection voltage, stop further charging by turning “L” the Cout pin and turning off external Nch MOS FET after the over-charge detection delay time. This delay time is set by the internal counter. The over-charge detection comparator has the hysteresis function. Note that this hysteresis can be cancelled by connecting the load after detection of over-charge detection. Once over-charge detection is made, over-current detection is not made to prevent malfunction. Note that shortcircuit can be detected. Over-charge return If charger is connected and both cell voltages become equal to or lower than the over-charge recovery voltage or over-charge detection voltage when load is connected, the Cout pin returns to “H” after the over-charge recovery delay time set by the internal counter. When load is connected and either cell or both cell voltages are equal to or more than the over-charge detection voltage, the Cout pin does not return to “H.” When the load current is passed through the external Cout pin parasite diode of Nch MOS FET after the over-charge recovery delay time and each cell voltage becomes equal to or below over-charge detection voltage, the Cout returns to “H.” However, high voltage charger is connected as mentioned below, Cout pin does not return to “H” because overcharger detection sequence starts after over-charge recovery. Over-discharge detection When either cell voltage is equal to or below over-discharge voltage, stop further discharge by turning “L” the Dout pin and turning off external Nch MOS FET after the over-charge detection delay time. The IC becomes standby state after detecting over-discharge and its consumption current is kept at about 0A. After detection, the V- pin will be connected to VDD pin via 200kΩ. Over-discharge return Return from over-discharge is made by connecting charger. If the V- pin voltage becomes equal to or lower than the standby return voltage by connecting charger after detecting over-discharge, it returns from the standby state to start cell voltage monitoring. If both voltages become equal to or more than the over-discharge detection voltage by charging, the Dout pin returns to “H” after the over-discharge return delay time set by the internal counter. Over-current detection When high current is passed through the battery, the V potential rises by the ON resister of external MOS FET and becomes equal to or more than the over-current detection voltage, that will be deemed over-current state. Turn “L” the Dout pin after the over-current detection delay time and turn off the external Nch MOS FET to prevent high current in the circuit. The delay time is set by the internal counter. After detection, the V- pin will be connected to VSS via 30kΩ. It will not go into standby state after detecting over-current. Short circuit detection If greater discharge current is passed and the V- pin voltage becomes equal to or more than the short-circuit detection voltage, it will go into short-circuit detection state after the short circuit delay time shorter than the over-current detection delay time. When short-circuit is detected, just like the time of over-current detection, turn Dout pin “L” and turn off external Nch MOS FET to prevent high current in the circuit. The V- pin will be connected to VSS after detection via 30kΩ. It will not go into standby state after detecting short-circuit. Over-current/short-detection return After detecting over-current or short circuit, the return resistor (typ.30kΩ) between V- pin and VSS pin becomes effective and if the resistor is opened the V- pin voltage will be pulled by the VSS pin voltage. Thereafter, the IC will return from the over-current/short-circuit detection state when the V- pin voltage becomes equal to or below the overcurrent detection voltage and the Dout pin returns to “H” after over-current return delay time set by the internal counter. No.A0694-5/8 LV5113T Over-charger detection/return If the potential difference between V- pin and VSS pin becomes equal to or below the over-charger detection voltage by connecting a charger, no charging can be made by turning “L” the Cout pin after certain delay time and turning off the external Nch MOS FET. If this difference returns to equal to or more than the over-charger detection voltage during detection delay time, the over-charger detection will be stopped. If the potential difference between V- pin and VSS pin becomes equal to or more than the over-charger detection voltage after over-charger detection, the Cout returns to “H” after certain time. The detection/return delay time is set internally. If Dout pin is “L” charging will be made through the external Nch FET parasite diode of Dout pin. In that case, the potential difference between V- pin and VSS pin becomes -Vf which is equal to or less than the over-charger detection voltage, no over-charger detection will be made during over-discharge, over-current or short-circuit detection. Further, if over-discharged battery is connected to over-charger, no over-charger detection is made while the Dout pin is “L.” If the battery voltage rises to the over-discharge detection voltage through the parasite diode and the Dout pin becomes “H”, and the potential difference between V- pin and VSS pin is equal to or below the over-charger detection voltage, the delay operation will be started after Dout pin becoming “H.” 0V cell charge If the cell voltage is 0V but a potential difference between VDD and V becomes equal to or greater than the 0V cell charging lowest operation voltage, the Cout pin will output “H” and enable charging. Test time reduction function By turning T pin to the VDD potential, the delay times set by the counter can be cut. Normal time settings if T pin is open. Delay time not set by the counter cannot be controlled by this pin. Operation in case of detection overlap Operation in case of detection overlap Overlap state State after detection When, during over- Over-discharge Over-charge detection is preferred. If over- When over-charge detection is made first, V- is charge detection, detection is made, discharge state continues even after over- released. When over-discharge is detected charge detection, over-discharge detection is after over-charge detection, the standby state is not effectuated. Note that V- is connected to resumed. VDD via 200kΩ. Over-current (*1) Both detections’ can be made in parallel. (*2) When over-current is detected first, V- is detection is made, Over-charge detection continues even when the connected to VSS via 30kΩ. When over-charge detection is made first, V- is released. over-current state occurs. If the over-charge state occurs first, over-current detection is interrupted. When, during over- Over-charge detection Over-discharge detection is interrupted and The standby state is not effectuated when over- discharge detection, is made, over-charge detection is preferred. When over- discharge detection is made after over-charge detection. Note that V- is connected to VDD via 200kΩ. discharge state continues even after overcharge detection, over-discharge detection is resumed. Over-current (*3) Both detections can be made in parallel. (*4) If over-current is detected in advance, V will detection is made, Over-discharge detection continues even when be connected to VSS via 30kΩ. After detecting the over-current state is effectuated first. Over- over-discharge, V will be connected to VDD via current detection is interrupted when the over- 200kΩ to get into standby state. If over- discharge state is effectuated first, discharge is detected in advance, V will be (*1) state. (*2) (*3) (*4) connected to VDD via 200kΩ to get into standby When, during overcurrent detection, Over-charge detection is made, Over-discharge detection is made, (Note) Short-circuit detection can be made independently. Over-charger detection does not work during over-discharge, over-current or short-circuit detection and the delay time starts after return from these states. No.A0694-6/8 LV5113T Timing Chart [Cout Output System] Charger connection Hysteresis cancellation by load connection Load connection Charger connection Load connection Over-charger connection Charger connection Load connection Vd1 Vr1 Charging recovery depends on charger voltage when connecting charger. VDD Vd2 VDD Discharging via FETparasite Di Vd4 V- Discharging via FETparasite Di Vd3 VSS Vd5 VDD td1 Cout tr1 td1 tr1 td5 tr5 VOver-charge detection state Over-charge detection state Over-charger detection state [Dout Output System] Load connection Charger connection Load connection Load connection Over-current occurrence Load connection Over-charger connection Load short-circuit occurrence Vd1 Vr1 VDD Vd2 To standby To standby VDD Vd4 V- Vd3 VSS Vd5 Charging via FETparasite Di VDD Dout td2 tr2 td3 tr3 td4 tr3 td2 tr2 VSS Over-discharge detection state Over-current detection state Short-circuit detection state VDD Cout V- Over-charger detection upon charging over-discharged battery is activated after return from over-charge. td5 No.A0694-7/8 LV5113T Application Circuit Example + R1 R4 C1 VDD Sense C3 VSS R2 Vc LV5113T C2 VVSS Dout Cout R3 − Components Recommended value max unit R1, R2 100 1k Ω R3 2k 4k Ω R4 100 10k Ω C1, C2, C3 0.1µ 1µ F * These numbers don't mean to guarantee the characteristic of the IC. * In addition to the components in the upper diagram, it is necessary to insert a capacitor with enough capacity between VDD and VSS of the IC as near as possible to stabilize the power supply voltage to the IC. SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of May, 2007. Specifications and information herein are subject to change without notice. PS No.A0694-8/8