S71GL016A Based MCPs Stacked Multi-Chip Product (MCP) Flash Memory and RAM 16 Megabit (1M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash Memory 4 Megabit (256K x 16-bit) pSRAM S71GL016A Based MCPs Cover Sheet Data Sheet (Advance Information) Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions. Publication Number S71GL016A_00 Revision A Amendment 1 Issue Date June 20, 2006 Data Sheet ( A dvan ce I nfo r ma ti on) Notice On Data Sheet Designations Spansion LLC issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design. The following descriptions of Spansion data sheet designations are presented here to highlight their presence and definitions. Advance Information The Advance Information designation indicates that Spansion LLC is developing one or more specific products, but has not committed any design to production. Information presented in a document with this designation is likely to change, and in some cases, development on the product may discontinue. Spansion LLC therefore places the following conditions upon Advance Information content: “This document contains information on one or more products under development at Spansion LLC. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice.” Preliminary The Preliminary designation indicates that the product development has progressed such that a commitment to production has taken place. This designation covers several aspects of the product life cycle, including product qualification, initial production, and the subsequent phases in the manufacturing process that occur before full production is achieved. Changes to the technical specifications presented in a Preliminary document should be expected while keeping these aspects of production under consideration. Spansion places the following conditions upon Preliminary content: “This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qualification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications.” Combination Some data sheets contain a combination of products with different designations (Advance Information, Preliminary, or Full Production). This type of document distinguishes these products and their designations wherever necessary, typically on the first page, the ordering information page, and pages with the DC Characteristics table and the AC Erase and Program table (in the table notes). The disclaimer on the first page refers the reader to the notice on this page. Full Production (No Designation on Document) When a product has been in production for a period of time such that no changes or only nominal changes are expected, the Preliminary designation is removed from the data sheet. Nominal changes may include those affecting the number of ordering part numbers available, such as the addition or deletion of a speed option, temperature range, package type, or VIO range. Changes may also include those needed to clarify a description or to correct a typographical error or incorrect specification. Spansion LLC applies the following conditions to documents in this category: “This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion LLC deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid combinations offered may occur.” Questions regarding these document designations may be directed to your local AMD or Fujitsu sales office. ii S71GL016A Based MCPs S71GL016A_00_A1 June 20, 2006 S71GL016A Based MCPs Stacked Multi-Chip Product (MCP) Flash Memory and RAM 16 Megabit (1M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash Memory 4 Megabit (256K x 16-bit) pSRAM Data Sheet (Advance Information) Features Power supply voltage of 2.7 V to 3.1 V Packages High performance – 7 x 9 x 1.2 mm 56 ball FBGA Operating Temperature – 100 ns (100 ns Flash, 70 ns pSRAM/SRAM) – –25°C to +85°C General Description The S71GL series is a product line of stacked Multi-Chip Product (MCP) packages and consists of: One S29GL016A Flash memory die pSRAM The products covered by this document are listed in the table below: Flash Memory Density 16Mb pSRAM Density 4Mb S71GL016A40 For detailed specifications, please refer to the individual data sheets. . Document Publication Identification Number (PID) S29GL-A S29GL-A_00 pSRAM Type 4 psram_18 Publication Number S71GL016A_00 Revision A Amendment 1 Issue Date June 20, 2006 This document contains information on one or more products under development at Spansion LLC. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice. Data 1. Sheet ( A dvan ce I nfo r ma ti on) Product Selector Guide Device-Model# Flash Access time (ns) pSRAM density pSRAM Access time (ns) pSRAM type Package 100 4 M pSRAM 70 Type 4 TLC056 S71GL016A40-1J S71GL016A40-3J 2. MCP Block Diagram VCCf VCC CE# WP#/ACC RESET# Flash-only Address Flash Shared Address OE# WE# VSS RY/BY# VCCS DQ15 to DQ0 VCC pSRAM/SRAM IO15-IO0 2 CE#s CE# UB#s UB# LB#s LB# CE2 CE2 S71GL016A Based MCPs S71GL016A_00_A1 June 20, 2006 Da ta 3. S h ee t ( Ad va nce I nfor m at ion ) Connection Diagram Figure 3.1 56-ball Fine-Pitch Ball Grid Array (Top View, Balls Facing Down) Legend A2 A3 A4 A5 A6 A7 A7 LB# WP/ACC WE# A8 A11 B1 B2 B3 B4 B5 B6 B7 B8 A3 A6 UB# RST#f CE2s A19 A12 A15 C1 C2 C3 C4 C5 C6 C7 C8 A2 A5 A18 RY/BY# RFU A9 A13 RFU D1 D2 D3 D6 D7 D8 A1 A4 A17 A10 A14 RFU E1 E2 E3 E6 E7 E8 A0 VSS DQ1 DQ6 RFU A16 F1 F2 F3 F4 F5 F6 F7 F8 CE1#f OE# DQ9 DQ3 DQ4 DQ13 DQ15 RFU G1 G2 G3 G4 G5 G6 G7 G8 CE1#s DQ0 DQ10 VCCf VCCs DQ12 DQ7 VSS H2 H3 H4 H5 H6 H7 DQ8 DQ2 DQ11 RFU DQ5 DQ14 Shared Flash only RAM only June 20, 2006 S71GL016A_00_A1 S71GL016A Based MCPs Reserved for Future Use 3 Data 4. Sheet ( A dvan ce I nfo r ma ti on) Pin Description A19–A0 = 20 Address Inputs (Common and Flash only) DQ15–DQ0 = 16 Data Inputs/Outputs (Common) CE#f = Chip Enable (Flash) CE#s = Chip Enable 1 (pSRAM) OE# = Output Enable (Common) WE# = Write Enable (Common) RY/BY# = Ready/Busy Output (Flash 1) UB# = Upper Byte Control (pSRAM/SRAM) LB# = Lower Byte Control (pSRAM/SRAM) RESET# = Hardware Reset Pin, Active Low (Flash) WP#/ACC = Hardware Write Protect/Acceleration Pin (Flash) Flash 3.0 volt-only single power supply (see Product Selector Guide for speed options and voltage supply tolerances) VCCf = VCCs = pSRAM/SRAM Power Supply VSS = Device Ground (Common) NC = Pin Not Connected Internally 5. Logic Symbol 21 A20–A0 16 CE#f DQ15–DQ0 CE1#s CE2s RY/BY# OE# WE# WP#/ACC RESET# UB# LB# 4 S71GL016A Based MCPs S71GL016A_00_A1 June 20, 2006 Da ta 6. S h ee t ( Ad va nce I nfor m at ion ) Ordering Information The order number is formed by a valid combinations of the following: S71GL 016 A 40 BA W 3J 0 Packing Type 0 = Tray 2 = 7” Tape and Reel 3 = 13” Tape and Reel Model Number See the Valid Combinations table Temperature Range W = Wireless (-25×C to +85×C) Package Type BA = Fine-pitch BGA Lead (Pb)-free compliant package BF = Fine-pitch BGA Lead (Pb)-free package pSRAM Density 40 = 4 Mb pSRAM Process Technology A = 200 nm, MirrorBit Technology Flash Density 016= 16Mb Product Family S71GL Multi-chip Product (MCP) 3.0-volt Page Mode Flash Memory and RAM 6.1 Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. Base Ordering Part Number Package & Temperature S71GL016A40 Package Modifier/ Model Number Packing Type Speed Options (ns)/ Boot Sector Option 3J 100 / Bottom Boot Sector 1J 100 / Top Boot Sector 0, 2, 3 (See Note) 100 / Bottom Boot Sector pSRAM Type/ Access Time (ns) Package Marking pSRAM4/ 70 TLC056 BAW S71GL016A40 S71GL016A40 3J BFW S71GL016A40 1J 100 / Top Boot Sector Note: Type 0 is standard. Specify other options as required. June 20, 2006 S71GL016A_00_A1 S71GL016A Based MCPs 5 Data 7. Sheet ( A dvan ce I nfo r ma ti on) Physical Dimensions Figure 7.1 TLC056—56-ball Fine-Pitch Ball Grid Array (FBGA) 9 x 7 mm D1 A D eD 0.15 C (2X) 8 7 SE 6 7 5 E E1 4 3 eE 2 1 H INDEX MARK PIN A1 CORNER B 10 TOP VIEW G F E D C B A PIN A1 CORNER 7 SD 0.15 C (2X) BOTTOM VIEW 0.20 C A A2 A1 C 56X 0.08 C SIDE VIEW 6 b 0.15 M C A B 0.08 M C NOTES: PACKAGE TLC 056 JEDEC N/A DxE 9.00 mm x 7.00 mm PACKAGE SYMBOL MIN NOM MAX A --- --- 1.20 A1 0.20 --- --- A2 0.81 --- 0.97 NOTE PROFILE BODY SIZE E 7.00 BSC. BODY SIZE D1 5.60 BSC. MATRIX FOOTPRINT E1 5.60 BSC. MATRIX FOOTPRINT MD 8 MATRIX SIZE D DIRECTION ME 8 MATRIX SIZE E DIRECTION 56 0.35 0.40 2. ALL DIMENSIONS ARE IN MILLIMETERS. 3. BALL POSITION DESIGNATION PER JESD 95-1, SPP-010. 4. e REPRESENTS THE SOLDER BALL GRID PITCH. 5. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION. BODY THICKNESS 9.00 BSC. n DIMENSIONING AND TOLERANCING METHODS PER ASME Y14.5M-1994. BALL HEIGHT D φb 1. n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS FOR MATRIX SIZE MD X ME. 6 DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. 7 SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. BALL COUNT 0.45 eE 0.80 BSC. BALL PITCH eD 0.80 BSC BALL PITCH SD / SE 0.40 BSC. SOLDER BALL PLACEMENT A1,A8,D4,D5,E4,E5,H1,H8 WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW SD OR SE = 0.000. BALL DIAMETER DEPOPULATED SOLDER BALLS WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. 9. N/A 10 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. 3348 \ 16-038.22a 6 S71GL016A Based MCPs S71GL016A_00_A1 June 20, 2006 Da ta 8. S h ee t ( Ad va nce I nfor m at ion ) Revision History Section Description Revision A (May 17, 2005) Initial Release Revision A1 (June 20, 2006) Global Data sheet updated to new template General Description Added a table referencing the individual specification documents for the Flash and pSRAM data sheets Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2005-2006 Spansion LLC. All Rights Reserved. Spansion, the Spansion logo, MirrorBit, ORNAND, HD-SIM, and combinations thereof are trademarks of Spansion LLC. Other names are for informational purposes only and may be trademarks of their respective owners. June 20, 2006 S71GL016A_00_A1 S71GL016A Based MCPs 7