S75WS-P based MCP/POP Products 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash (NOR Interface) S30MS-P (NAND Interface) ORNAND™ Flash pSRAM Type 2 S75WS-P based MCP/POP Products Cover Sheet Data Sheet (Advance Information) Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions. Publication Number S75WS-P_00 Revision 02 Issue Date September 6, 2006 Da ta Sh eet ( A dvan ce In fo r mat io n) Notice On Data Sheet Designations Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design. The following descriptions of Spansion data sheet designations are presented here to highlight their presence and definitions. Advance Information The Advance Information designation indicates that Spansion Inc. is developing one or more specific products, but has not committed any design to production. Information presented in a document with this designation is likely to change, and in some cases, development on the product may discontinue. Spansion Inc. therefore places the following conditions upon Advance Information content: “This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.” Preliminary The Preliminary designation indicates that the product development has progressed such that a commitment to production has taken place. This designation covers several aspects of the product life cycle, including product qualification, initial production, and the subsequent phases in the manufacturing process that occur before full production is achieved. Changes to the technical specifications presented in a Preliminary document should be expected while keeping these aspects of production under consideration. Spansion places the following conditions upon Preliminary content: “This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qualification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications.” Combination Some data sheets contain a combination of products with different designations (Advance Information, Preliminary, or Full Production). This type of document distinguishes these products and their designations wherever necessary, typically on the first page, the ordering information page, and pages with the DC Characteristics table and the AC Erase and Program table (in the table notes). The disclaimer on the first page refers the reader to the notice on this page. Full Production (No Designation on Document) When a product has been in production for a period of time such that no changes or only nominal changes are expected, the Preliminary designation is removed from the data sheet. Nominal changes may include those affecting the number of ordering part numbers available, such as the addition or deletion of a speed option, temperature range, package type, or VIO range. Changes may also include those needed to clarify a description or to correct a typographical error or incorrect specification. Spansion Inc. applies the following conditions to documents in this category: “This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid combinations offered may occur.” Questions regarding these document designations may be directed to your local AMD or Fujitsu sales office. ii S75WS-P based MCP/POP Products September 6, 2006 S75WS-P_00-02 S75WS-P based MCP/POP Products 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash (NOR Interface) S30MS-P (NAND Interface) ORNAND™ Flash pSRAM Type 2 Data Sheet (Advance Information) Features Power supply voltage of 1.7 to 1.95V Package: Flash access time: 80 ns (NOR), 25 ns (ORNAND) Flash burst frequencies: 66 MHz, 80 MHz, 108 MHz pSRAM Access time: 70 ns, 20 ns (Page) pSRAM burst frequency: 66 MHz, 80 MHz, 104 MHz – 12 x 12 mm PoP – 9 x 12 mm, 115-ball MCP Operating Temperature – –25°C to +85°C (wireless) The S75WS series is a product line of MCPs or POPs, and consists of: One S29WS-P NOR flash memory die One or more S30MS-P NAND interface ORNAND flash memory die pSRAM Type 2 For detailed specifications, please refer to the individual data sheets . Document Publication Identification Number (PID) S29WS-P S29WS-P_00 256Mb pSRAM Type 2 psram_24 S30MS-P S30MS-P_00 Publication Number S75WS-P_00 Revision 02 Issue Date September 6, 2006 This document contains information on one or more products under development at Spansion LLC. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice. Da ta 1. Sh eet ( A dvan ce In fo r mat io n) Product Selector Guide Model Number Device S75WS256PEFKFF Flash Density (Mb) pSRAM Density (Mb) ORNAND Density (Mb) LW pSRAM Speed (MHz) pSRAM Supplier 256 512 VS Package AMB128: POP 12 x12 x 1.15 mm 66 256 S75WS256PEFJF5 Flash Speed (MHz) 104 Type 2 FMC115: MCP 12 x 9 mm 80 2. MCP Block Diagram A0-A23 RDY CLK AVD# F-CE# OE# F-RST# F-ACC F1-WP# WE# A0-A23 RDY CLK AVD# CE# OE# RESET# ACC WP# WE# DQ0-DQ15 WS256P Flash Memory VSS VCC VCCQ DQ0-DQ15 VSS F-VCC A0-A23 DQ0-DQ15 WAIT# R1-CE# R-LB# R-UB# R-CRE CLK AVD# CE# OE# LB# UB# WE# CRE 256 Mb UtRAM Memory VSS VCC VCCQ 2 I/O0-I/O15 I/O0-I/O15 N-RY/BY# RB# N-CLE N-CE# N-ALE CLE CE# ALE N-RE# N-WP# N-WE# RE# WP# WE# MS512P x16 ORNAND Memory VSS R-VCC PRE N-VSS N-PRE VCC N-VCC S75WS-P based MCP/POP Products S75WS-P_00_02 September 6, 2006 Da t a Sh ee t (A d va nce I nfo r ma ti on ) 3. POP Block Diagram A0-A23 F-RDY/R-WAIT CLK AVD# F-CE# OE# F-RST# F-ACC F1-WP# WE# A0-A23 DQ0-DQ15 RDY CLK AVD# CE# OE# RESET# ACC WP# WE# WS256P Flash Memory VSS DQ0-DQ15 VSS VSSQ VSSQ VCC VCCQ F-VCC VCCQ A0-A23 DQ0-DQ15 WAIT# R-CLK R-CE# R-LB# R-UB# R-MRS CLK AVD# CE# OE# LB# UB# WE# MRS 256Mb UtRAM Memory VSSQ VSS VCC VCCQ I/O0-I/O15 N-RY/BY# I/O0-I/O15 RB# ACC N-CLE N-CE# N-ALE CLE CE# ALE N-RE# N-WP# N-WE# RE# WP# WE# S75WS-P_00_02 September 6, 2006 R-VSS R-VCC MS512P x16 ORNAND Memory S75WS-P based MCP/POP Products VSS PRE N-PRE VCC N-VCC 3 Da ta Sh eet ( A dvan ce In fo r mat io n) 4. Connection Diagrams 4.1 12 x 12 mm PoP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Legend NC NC A0 A2 A4 A6 N-VCC A8 A10 A12 A14 F-VCC A-16 A18 A20 A22 NC NC All Shared NC NC RFU A3 A5 A7 VSS A9 A11 A13 A15 VSS A17 A19 A21 RFU NC NC RFU R-VSS R-VSS RFU RFU A1 A23 RFU A B No Connect C NOR Flash Only D Reserved for Future Use E R-MRS RFU RFU RFU RFU RFU N-WE# RFU RFU VSS R-VCC AVD# R-CE# RFU WE# OE# RFU N-CE# RFU RFU N-ALE N-CLE R-CLK F-CLK N-RY/BY# N-RE# RFU F-CE# F-RDY/ R-VSS R-WAIT VSS RFU pSRAM Only F G Flash Shared Only H ORNAND Flash Only J NOR/pSRAM Shared Only K L M N N-VCC R-VCC R-VCC F-VCC P DQ14 DQ15 DQ1 DQ0 VCCQ VSSQ VSSQ VCCQ RFU RFU N-PRE RFU NC NC RFU DQ13 DQ11 VSSQ DQ9 RFU NC NC RFU DQ12 DQ10 VCCQ DQ8 R-UB# R T U N-WP# F-WP# RFU DQ7 VSSQ DQ5 DQ3 RFU NC NC DQ6 VCCQ DQ4 DQ2 RFU NC NC V 4 F-ACC F-RST# R-LB# S75WS-P based MCP/POP Products S75WS-P_00_02 September 6, 2006 Da t a 4.2 Sh ee t (A d va nce I nfo r ma ti on ) 9 x 12 mm, 115-ball MCP 1 2 NC NC 3 4 5 6 7 8 9 10 NC NC NC NC NC NC A B Legend C AVD# VSS CLK RFU IO15 IO14 IO13 IO12 NC N-RY/ BY# F-WP# A7 R-LB# F-ACC WE# A8 A11 IO11 IO10 N-RE# A3 A6 R-UB# F-RST# RFU A19 A12 A15 IO9 N-CE# A2 A5 A18 RDY A20 A9 A13 A21 IO8 N-VCC A1 A4 A17 RFU A23 A10 A14 A22 N-VCC N-VSS A0 VSS DQ1 RFU RFU DQ6 RFU A16 N-VSS N-CLE# F1-CE# OE# DQ9 DQ3 DQ4 DQ13 DQ15 R-MRS IO7 N-ALE# R-CE# DQ0 DQ10 F-VCC R-VCC DQ12 DQ7 VSS IO6 N-WE# N-WP# DQ8 DQ2 DQ11 RFU DQ5 DQ14 IO4 IO5 RFU VSS F-VCC IO0 IO1 IO2 IO3 PRE Reserved for Future Use D No Connect E NOR Flash Only F NAND Flash Only G H pSRAM Only J NOR Flash/ pSRAM Shared Only K L M NC RFU NC NC NC NC NC NC NC NC N P 4.3 Special Handling Instructions For FBGA Package Special handling is required for Flash Memory products in FBGA packages. Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150×C for prolonged periods of time. S75WS-P_00_02 September 6, 2006 S75WS-P based MCP/POP Products 5 Da ta 4.4 Sh eet ( A dvan ce In fo r mat io n) Look-ahead Ballout for Future Designs 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Legend NC NC A0 A2 A4 A6 F-VCC2 A8 A10 A12 A14 F-VCC1 A-16 A18 A20 A22 NC NC Address NC NC RFU A3 A5 A7 F-VSS A9 A11 A13 A15 F-VSS A17 A19 A21 RFU NC NC R-VSS/ NC RFU A23 A24 A B No Connect (corner balls) C RFU R-VSS/ NC Data D RFU A1 Reserved for Future Use E D-BA0/ P1-CRE D-BA1/ A25 A26 N-WE# A27 P2-CRE/S1-CS2 Ground F D-RAS#/ D-CAS#/ F-RAS# F-CAS# G Power D-WE# F-VSS R-VCC F-ADV#/ P-ADV# D1-CS#/ D2-CS#/ P1-CE# P2-CE# F-WE#/ F-OE#/ P-WE#/S-WE# P-OE#/S-OE# H Control J F3-CE#/ D-CLK# F-CLK# F4-CE#/ N2CE#/P1-CE2 N1CE#/P2-CS2 K N-ALE N-CLE D-CLK/ F-CLK P-CLK N-RDY/ N-RE# BSY# F2-CE#/ F1-CE# N3CE# L M F-WAIT/ R-VSS F-VSS F-DPD P-WAIT/P-RDY N F-VCC2 R-VCC R-VCC F-VCC1 P DQ14 DQ15 DQ1 DQ0 VCCQ VSSQ VSSQ VCCQ N-PRE F-CKE R T D-CKE N-RES#/ NC U NC NC NC NC N-MRES# DQ13 DQ11 VSSQ DQ9 DQ10 VCCQ DQ8 DQ7 VSSQ DQ5 DQ3 RFU NC NC F-VPP/ F-RST# D-DM0/ DQ6 N-ACC P-LB#/S-LB# VCCQ DQ4 DQ2 RFU NC NC D-DQS1 N-WP2#/ F-WP# D-DQS0 F-WP2# V RFU DQ12 D-DM1/ P-UB#/ S-UB# 6 S75WS-P based MCP/POP Products S75WS-P_00_02 September 6, 2006 Da t a 5. Sh ee t (A d va nce I nfo r ma ti on ) Input/Output Descriptions Table 5.1 identifies the input and output package connections provided on the device. Table 5.1 Input/Output Descriptions (Sheet 1 of 2) Symbol Amax-A0 DQ15-DQ0 F-CE# Signal Type Input I/O Input WS (NOR) pSRAM NOR Flash Address inputs X X Flash Data input/output, shared between NOR and ORNAND Flash; shared with IO15-IO0 for ORNAND X X NOR Flash Chip-enable input #1. Asynchronous relative to CLK for Burst Mode. X Output Enable input. Asynchronous relative to CLK for Burst mode. X X Write Enable input. X X X Description OE# Output WE# Input F-VCC Power NOR Flash device power supply (1.7 V - 1.95V). F-VCCQ Power Input/Output Buffer power supply. X VSS Ground Ground X X RFU — RDY Output Flash ready output. Indicates the status of the Burst read. VOL = data valid. The Flash RDY pin is shared with the WAIT pin of the pSRAM. X X NOR Flash Clock, shared with CLK of burst-mode pSRAM. The first rising edge of CLK in conjunction with AVD# low latches the address input and activates burst mode operation. After the initial word is output, subsequent rising edges of CLK increment the internal address counter. CLK should remain low during asynchronous access. X X NOR Flash Address Valid input. Shared with AVD# of burst-mode pSRAM. Indicates to device that the valid address is present on the address inputs. VIL = for asynchronous mode, indicates valid address; for burst mode, causes starting address to be latched on rising edge of CLK. VIH= device ignores address inputs X X CLK AVD# Input Input Input NOR Flash hardware reset input. VIL= device resets and returns to reading array data X F-WP# Input NOR Flash hardware write protect input. VIL = disables program and erase functions in the four outermost sectors. X F-ACC Input NOR Flash accelerated input. At VHH, accelerates programming; automatically places device in unlock bypass mode. At VIL, disables all program and erase functions. Should be at VIH for all other conditions. X R-CE# Input Chip-enable input for pSRAM X R-MRS Input Mode Select Register (pSRAM). For Type 2 only. X R-VCC Power pSRAM Power Supply X R-UB# Input Upper Byte Control (pSRAM) X R-LB# Input Lower Byte Control (pSRAM) X N-CLE N-ALE S75WS-P_00_02 September 6, 2006 — Input Input X X Reserved for Future Use F-RST# DNU MS (ORNAND) Do Not Use Command Latch Enable: The CLE input signal is used to control loading of the operation mode command into the internal command register. The command is latched into the command register from the I/O port on the rising edge of the WE# signal while CE# is low and CLE is High. X Address Latch Enable: The ALE signal is used to control loading of either address information or input data into the internal address/data register. Address information is latched on the rising edge of WE# if CE# is low and ALE is High. Input data is latched if CE# is low and ALE is Low. X S75WS-P based MCP/POP Products 7 Da ta Sh eet ( A dvan ce In fo r mat io n) Table 5.1 Input/Output Descriptions (Sheet 2 of 2) Symbol N-CE# Input WS (NOR) Description pSRAM MS (ORNAND) Chip Enable: The device enters a low-power Standby mode when the device is in Ready mode. The CE# signal is ignored when the device is in a Busy state (RY/BY# = L), such as during a Page Buffer Load or Erase operation, and will not enter Standby mode even if the CE# input goes high. The CE# signal may be inactive during the Page Buffer write and Page Buffer load of the array data. X N-WE# Input Write Enable: The WE# signal is used to control the acquisition of data from the I/O port. X N-RE# Output Read Enable: The RE# signal controls serial data output. Data is available tREA after the falling edge of RE#. The internal column address counter is also incremented (Address = Address + 1) on this falling edge. X Write Protect: The WP# signal is used to protect the device from accidental programming or erasing. This signal is usually used for protecting the data during the power-on/off sequence when input signals are invalid. X N-WP# 8 Signal Type Input S75WS-P based MCP/POP Products S75WS-P_00_02 September 6, 2006 Da t a 6. Sh ee t (A d va nce I nfo r ma ti on ) Ordering Information The order number is formed by a valid combinations of the following: S75WS 256 P EF KF F LW 0 PACKING TYPE 0 = Tray 2 = 7” Tape and Reel 3 = 13” Tape and Reel MODEL NUMBER Refer to the Valid Combinations Table PACKAGE DESCRIPTOR Depends on Character 12. For a more detailed description see Table 6.1. PACKAGE TYPE & MATERIAL SET HF = 1.2mm MCP FBGA, Pb-free KF = 1.2mm POP FBGA, Pb-free JF = 1.4mm MCP FBGA, Pb-free CellularRAM DENSITY D0 = 128 Mb PROCESS TECHNOLOGY P = 90 nm, MirrorBitTM Technology CODE FLASH DENSITY 256 = 256Mb 512 = 512Mb PRODUCT FAMILY S71WS Stacked Products (MCP/PoP) 1.8 V NOR Flash with pSRAM Table 6.1 Character Position Descriptions Character 14 Description Character 12 Character 14 Package Area Package Ball Count 0 7x9 mm 56 Raw Ball Size 1 7x9 mm 80 2 8x11.6 mm 64 3 8x11.6 mm 84 4 9x12 mm 84 5 9x12 mm 115 6 9x12 mm 137 7 11x13 mm 84 8 11x13 mm 115 9 11x13 mm 137 A 11x11 mm 112 0.45 mm B 11x11 mm 112 0.50 mm D 12x12 mm 128 0.45 mm F 12x12 mm 128 0.50 mm G 14x14 mm 152 0.45 mm H 14x14 mm 152 0.50 mm J 15x15 mm 160 0.45 mm K 15x15 mm 160 0.50 mm L 17x17 mm 192 0.45 mm M 17x17 mm 192 0.50 mm H, J, or G 0.35 mm K S75WS-P_00_02 September 6, 2006 S75WS-P based MCP/POP Products 9 Da ta 6.1 Sh eet ( A dvan ce In fo r mat io n) Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. S75WS-P Valid Combinations Device Package & Material Set Package Descriptor Model Number KF F LW JF 5 VS S75WS256PEF Packing Type NOR Flash Speed (MHz) pSRAM Speed (MHz) pSRAM Supplier Package Type 66 104 Type 2 12 x 12 mm 80 104 Type 2 9 x 12 mm 0, 2, 3 (Note 1)s Package Markings (Note 2) Notes: 1. Packing Type 0 is standard. Specify other options as required. 2. BGA package marking omits leading S and packing type designator from ordering part number. 10 S75WS-P based MCP/POP Products S75WS-P_00_02 September 6, 2006 Da t a 7. 7.1 Sh ee t (A d va nce I nfo r ma ti on ) Physical Dimensions AMB128— 128-ball 12 x 12 mm Package-on-Package A D PIN A1 CORNER D1 9 INDEX MARK eD SD PIN A1 CORNER 7 A B C D E F G SE 7 H J E E1 K L M eE N P R T U 0.15 C V 18 17 16 15 14 13 12 11 10 (2X) B TOP VIEW 9 8 7 6 5 4 3 2 1 BOTTOM VIEW 0.15 C (2X) 0.20 C A A2 A1 C 0.10 C SIDE VIEW 6 b 128X 0.15 0.08 M M C A B C NOTES: PACKAGE AMB 128 JEDEC N/A DxE 12.00 mm x 12.00 mm PACKAGE SYMBOL MIN NOM MAX A --- --- 1.15 A1 0.39 --- --- A2 0.55 --- 0.70 PROFILE BALL HEIGHT BODY SIZE E 12.00 BSC BODY SIZE D1 11.05 BSC MATRIX FOOTPRINT E1 11.05 BSC MATRIX FOOTPRINT MD 18 MATRIX SIZE D DIRECTION ME 18 MATRIX SIZE E DIRECTION n 128 BALL COUNT N 128 MAXIMUM NUMBER OF BALLS 2 0.45 0.50 BALL POSITION DESIGNATION PER JEP95, SECTION 3.0, SPP-010. 4. e REPRESENTS THE SOLDER BALL GRID PITCH. 5. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION. n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS FOR MATRIX SIZE MD X ME. 6 DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. 7 SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW SD OR SE = 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 BALL DIAMETER eE 0.65 BSC BALL PITCH 0.65 BSC BALL PITCH 0.325 BSC SOLDER BALL PLACEMENT C3~C16, D3~D16, E3~E16, F3~F16 DEPOPULATED SOLDER BALLS G3~G16, H3~H16, J3~J16, K3~K16 L3~L16, M3~M16, N3~N16, P3~P16 R3~R16, T3~T16 S75WS-P_00_02 September 6, 2006 ALL DIMENSIONS ARE IN MILLIMETERS. 3. NUMBER OF LAND PERIMETERS 0.55 eD SD SE 2. BODY THICKNESS 12.00 BSC R DIMENSIONING AND TOLERANCING METHODS PER ASME Y14.5M-1994. NOTE D Øb 1. S75WS-P based MCP/POP Products 8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. 9. A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. 3559 \ 16-038.56 \ 4.28.6 11 Da ta 7.2 Sh eet ( A dvan ce In fo r mat io n) FMC115 — 115-ball 12 x 9 mm MCP NOTES: PACKAGE FMC 115 JEDEC N/A DxE SYMBOL 12.00 mm x 9.00 mm PACKAGE MIN NOM MAX A --- --- 1.40 A1 0.17 --- --- A2 0.96 --- 1.11 PROFILE BALL HEIGHT BODY SIZE E 9.00 BSC. BODY SIZE D1 10.4 BSC. MATRIX FOOTPRINT E1 7.20 BSC. MD 14 MATRIX SIZE D DIRECTION ME 10 MATRIX SIZE E DIRECTION MATRIX FOOTPRINT 115 0.35 0.40 BALL POSITION DESIGNATION PER JEP95, SECTION 4.3, SPP-010. 4. e REPRESENTS THE SOLDER BALL GRID PITCH. 5. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION. n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS FOR MATRIX SIZE MD X ME. 6 DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. 7 SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. BALL COUNT 0.45 0.80 BSC. BALL PITCH eD 0.80 BSC BALL PITCH 0.40 BSC. SOLDER BALL PLACEMENT A3,A4,A5,A6,A7,A8 B3,B4,B5,B6,B7,B8,C1 N3,N4,N5,N6,N7,N8 P3,P4,P5,P6,P7,P8 WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW SD OR SE = 0.000. BALL DIAMETER eE SD SE ALL DIMENSIONS ARE IN MILLIMETERS. 3. BODY THICKNESS 12.00 BSC. n DIMENSIONING AND TOLERANCING METHODS PER ASME Y14.5M-1994. 2. NOTE D Øb 1. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. 9. A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. DEPOPULATED SOLDER BALLS 3603 \ 16-038.19 \ 9.6.6 12 S75WS-P based MCP/POP Products S75WS-P_00_02 September 6, 2006 Da t a 8. Sh ee t (A d va nce I nfo r ma ti on ) Revision History 8.1 Revision 01 (May 5, 2006) Initial release. 8.2 Revision 02 (September 6, 2006) Added the MCP S75WS256PEF Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2006 Spansion Inc. All Rights Reserved. Spansion, the Spansion logo, MirrorBit, ORNAND, HD-SIM, and combinations thereof are trademarks of Spansion Inc. Other names are for informational purposes only and may be trademarks of their respective owners. S75WS-P_00_02 September 6, 2006 S75WS-P based MCP/POP Products 13