74VHCT257A QUAD 2 CHANNEL MULTIPLEXER (3-STATE) ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (MAX.) DESCRIPTION The 74VHCT257A is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is composed of four independent 2-channel multiplexers with common SELECT and ENABLE INPUT(OE). The VHCT257A is a non-inverting multiplexer. When the ENABLE INPUT is held "High", all outputs become high impedance state. SOP TSSOP Table 1: Order Codes PACKAGE T&R SOP TSSOP 74VHCT257AMTR 74VHCT257ATTR If SELECT INPUT is held "Low", "A" data is selected, when SELECT INPUT is "High", "B" data is chosen. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V since all inputs are equipped with TTL threshold. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Figure 1: Pin Connection And IEC Logic Symbols December 2004 Rev. 3 1/13 74VHCT257A Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° SYMBOL NAME AND FUNCTION 1 SELECT 2, 5, 11, 14 1A to 4A 3, 6, 10, 13 1B to 4B 4, 7, 9, 12 1Y to 4Y 15 OE 8 16 GND VCC Common Data Select Inputs Data Inputs From Source A Data Inputs From Source B 3 State Multiplexer Outputs 3 State Output Enable Inputs (Active LOW) Ground (0V) Positive Supply Voltage Table 3: Truth Table INPUTS OE SELECT A B Y H L L L L X L L H H X L H X X X X X L H Z L H L H X: Don’t Care Z: High Impedance Figure 3: Logic Diagram This logic diagram has not be used to estimate propagation delays 2/13 OUTPUT 74VHCT257A Table 4: Absolute Maximum Ratings Symbol VCC Parameter Value Unit Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage (see note 1) -0.5 to +7.0 V VO DC Output Voltage (see note 2) -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) ± 50 mA -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) Output in OFF State 2) High or Low State Table 5: Recommended Operating Conditions Symbol VCC Parameter Supply Voltage Value Unit 4.5 to 5.5 V VI Input Voltage 0 to 5.5 V VO Output Voltage (see note 1) 0 to 5.5 V VO Output Voltage (see note 2) Top Operating Temperature dt/dv Input Rise and Fall Time (see note 3) (VCC = 5.0 ± 0.5V) 0 to VCC V -55 to 125 °C 0 to 20 ns/V 1) Output in OFF State 2) High or Low State 3) VIN from 0.8V to 2V 3/13 74VHCT257A Table 6: DC Specifications Test Condition Symbol VIH VIL VOH VOL IOZ II ICC +ICC IOPD Parameter 4.5 to 5.5 4.5 to 5.5 Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current Output Leakage Current TA = 25°C VCC (V) High Level Input Voltage Low Level Input Voltage High Level Output Voltage Value Min. Typ. Max. 2 -40 to 85°C -55 to 125°C Min. Min. Max. 2 0.8 Max. 2 0.8 Unit V 0.8 V 4.5 IO=-50 µA 4.4 4.5 IO=-8 mA 3.94 4.5 IO=50 µA 0.1 0.1 0.1 4.5 IO=8 mA 0.36 0.44 0.55 5.5 VI = VIH or VIL VO = 0V to 5.5V ±0.25 ± 2.5 ± 2.5 µA 0 to 5.5 VI = 5.5V or GND ± 0.1 ± 1.0 ± 1.0 µA 5.5 VI = VCC or GND 4 40 40 µA 5.5 One Input at 3.4V, other input at VCC or GND 1.35 1.5 1.5 mA 0 VOUT = 5.5V 0.5 5.0 5.0 µA 4.5 0.0 4.4 4.4 3.8 3.7 V V Table 7: AC Electrical Characteristics (Input tr = tf = 3ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time A, B, to Y tPLH tPHL Propagation Delay Time SELECT to Y tPZL tPZH tPLZ tPHZ TA = 25°C Min. -40 to 85°C -55 to 125°C Typ. Max. Min. Max. Min. Max. Output Enable Time 5.0 5.0 5.0 5.0 5.0 5.0 15 50 15 50 15 50 4.8 5.5 6.0 7.0 5.8 6.5 7.0 8.0 6.8 8.8 6.8 8.8 1.0 1.0 1.0 1.0 1.0 1.0 8.0 9.0 8.0 10.0 8.0 10.0 1.0 1.0 1.0 1.0 1.0 1.0 8.0 9.0 8.0 10.0 8.0 10.0 Output Disable Time 5.0 50 5.7 7.9 1.0 9.0 1.0 9.0 (*) Voltage range is 5.0V ± 0.5V 4/13 VCC (*) CL (V) (pF) Value Unit ns ns ns ns 74VHCT257A Table 8: Capacitive Characteristics Test Condition Symbol Value TA = 25°C Parameter Min. CIN Input Capacitance COUT Output Capacitance Power Dissipation Capacitance (note 1) CPD Typ. Max. 4 10 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF 6 pF 23 pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per Channel) Table 9: Dynamic Switching Characteristics Test Condition Symbol VOLP VOLV VIHD VILD Parameter Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) TA = 25°C VCC (V) Min. 5.0 5.0 5.0 Value -0.8 CL = 50 pF Typ. Max. 0.3 0.8 -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. -0.3 V 2.0 0.8 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. 5/13 74VHCT257A Figure 4: Test Circuit TEST SWITCH tPLH, tPHL Open tPZL, tPLZ VCC tPZH, tPHZ GND CL =15/ 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 5: Waveform - Propagation Delays For Inverting Conditions (f=1MHz; 50% duty cycle) 6/13 74VHCT257A Figure 6: Waveform - Propagation Delays For Non-inverting Conditions (f=1MHz; 50% duty cycle) Figure 7: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle) 7/13 74VHCT257A SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.004 0.010 1.64 0.063 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 e3 0.050 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) 0016020D 8/13 74VHCT257A TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 9/13 74VHCT257A Tape & Reel SO-16 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 10/13 TYP 0.504 22.4 0.519 0.882 Ao 6.45 6.65 0.254 0.262 Bo 10.3 10.5 0.406 0.414 Ko 2.1 2.3 0.082 0.090 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 74VHCT257A Tape & Reel TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 22.4 0.519 0.882 Ao 6.7 6.9 0.264 0.272 Bo 5.3 5.5 0.209 0.217 Ko 1.6 1.8 0.063 0.071 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 11/13 74VHCT257A Table 10: Revision History Date Revision 16-Dec-2004 3 12/13 Description of Changes Order Codes Revision - pag. 1. 74VHCT257A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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