L5973AD 2A switch step down switching regulator General features ■ 2A Internal switch ■ Operating input voltage from 4V to 36V ■ 3.3V / (±2%) reference voltage ■ Output voltage adjustable from 1.235V to 35V ■ Low dropout operation: 100% duty cycle ■ 500KHz Internally fixed frequency Description ■ Voltage feedforward ■ Zero load current operation ■ Internal current limiting ■ Inhibit for zero current consumption ■ Synchronization ■ Protection against feedback disconnection ■ Thermal shutdown The L5973AD is a step down monolithic power switching regulator with a switch current limit of 2A so it is able to deliver more than 1.5A DC current to the load depending on the application conditions. The output voltage can be set from 1.235V to 35V. The high current level is also achieved thanks to an SO8 package with exposed frame, that allows to reduce the RthJA down to approximately 40°C/W. The device uses an internal P-Channel D-MOS transistor (with a typical of 200mΩ) as switching element to avoid the use of bootstrap capacitor and guarantee high efficiency. An internal oscillator fixes the switching frequency at 500KHz to minimize the size of external components. Having a minimum input voltage of 4V only, it is particularly suitable for 5V bus, available in all computer related applications. Pulse by pulse current limit with the internal frequency modulation offers an effective constant current short circuit protection. Applications ■ Consumer: STB, DVD, TV, VCR, car radio, LCD monitors ■ Networking: XDSL, modems, DC-DC modules ■ Computer: printers, audio/graphic cards, optical storage, hard disk drive ■ Industrial: chargers, car battery, DC-DC converters Test application circuit VREF 3.3V VCC VIN = 4V to 35V SYNC. C1 10µF 35V CERAMIC COMP C4 22nF C3 220pF HSOP8 Exposed Pad 6 8 2 1 OUT D1 STPS340U L5973AD 3 4 7 INH L1 15µH VOUT=3.3V R1 5.6K 5 FB GND R3 4.7K C2 330µF 10V R2 3.3K D03IN1453 January 2007 Rev 6 1/21 www.st.com 21 Contents L5973AD Contents 1 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 4.1 Power supply & voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 Voltages monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.3 Oscillator & synchronizator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.4 Current protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.5 Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.6 PWM comparator and power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.7 Inhibit function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.8 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Additional features and protections . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 Feedback disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2 Output overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.3 Zero load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.4 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 Application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/21 L5973AD Pin settings 1 Pin settings 1.1 Pin connection Figure 1. Pin connection (top view) OUT 1 8 VCC SYNC 2 7 GND INH 3 6 VREF COMP 4 5 FB D98IN955 1.2 Pin description Table 1. Pin description N° Type 1 OUT Description Regulator output. SYNC Master/Slave Synchronization. When it is open, a signal synchronous with the turn-off of the internal power is present at the pin. When connected to an external signal at a frequency higher than the internal one, then the device is synchronized by the external signal. Connecting together the SYNC pin of two devices, the one with the higher frequency works as master and the other one, works as slave. 3 INH A logical signal (active high) disables the device. With IHN higher than 2.2V the device is OFF and with INH lower than 0.8V, the device is ON. If INH is not used the pin must be grounded. When it is open, an internal pullup disables the device. 4 COMP 2 E/A output to be used for frequency compensation. Stepdown feedback input. Connecting the output voltage directly to this pin results in an output voltage of 1.235V. An external resistor divider is required for higher output voltages (the typical value for the resistor connected between this pin and ground is 4.7K). 5 FB 6 VREF Reference voltage of 3.3V. No filter capacitor is needed to stability. 7 GND Ground. 8 VCC Unregulated DC input voltage. 3/21 Electrical data L5973AD 2 Electrical data 2.1 Maximum ratings Table 2. Absolute maximum ratings Symbol Value Unit 40 V V V V8 Input voltage V1 Output DC voltage Output peak voltage at t = 0.1µs -1 to 40 -5 to 40 I1 Maximum output current int. limit. V4, V5 Analog pins V3 INH V2 SYNC PTOT TJ TSTG 2.2 Parameter 4 V -0.3V to VCC -0.3 to 4 V 2.25 W Operating junction temperature range -40 to 150 °C Storage temperature range -55 to 150 °C HSOP8 Exposed Pad Unit 40 (1) °C/W Power dissipation at TA ≤ 60°C Thermal data Table 3. Thermal data Symbol RthJA Parameter Maximum thermal resistance junction-ambient 1. Package mounted on board 4/21 L5973AD 3 Electrical characteristics Electrical characteristics Table 4. Electrical characteristics ( TJ = 25°C, VCC = 12V, unless otherwise specified) Symbol VCC RDS(on) Parameter Test condition Operating input voltage Vo = 1.235V; Io = 2A range Min 4 Mosfet on Resistance Il Maximum limiting current fs Switching frequency Typ 0.250 VCC = 4.4V to 36V Duty cycle 2 Max Unit 36 V 0.5 Ω 2.3 A 500 KHz 0 100 % 1.25 V Dynamic characteristics (see test circuit ). V5 Voltage feedback 4.4V < VCC < 36V, 20mA < IO < 2A η Efficiency VO = 5V, VCC = 12V 1.220 1.235 90 % DC characteristics Iqop Total operating quiescent current Iq Quiescent current Duty cycle = 0; VFB = 1.5V Iqst-by Total stand-by quiescent current Vinh > 2.2V 5 50 7 mA 2.7 mA 100 µA 0.8 V Inhibit Device ON INH threshold voltage Device OFF 2.2 V 3.5 V Error amplfier VOH High level output voltage VFB = 1V VOL Low level output voltage VFB = 1.5V Source output current VCOMP = 1.9V; VFB = 1V 200 300 µA Io sink Sink output current VCOMP = 1.9V; VFB = 1.5V 1 1.5 mA Ib Source bias current Io source DC open loop gain 0.4 2.5 RL = ∞ 50 57 4 V µA dB 5/21 Electrical characteristics L5973AD Table 4. Electrical characteristics (continued) ( TJ = 25°C, VCC = 12V, unless otherwise specified) Symbol gm Parameter Test condition Transconductance Icomp = -0.1mA to 0.1mA VCOMP = 1.9V High input voltage VCC = 4.4V to 36V Low input voltage VCC = 4.4V to 36V Slave sink current Vsync = 0.74V (1) Vsync = 2.33V Master output amplitude Isource = 3mA Output pulse width no load, Vsync = 1.65V Min Typ Max 2.3 Unit mS Sync function 2.5 0.11 0.21 VREF V 0.74 V 0.25 0.45 mA mA 2.75 3 V 0.20 0.35 µs 3.234 3.3 3.366 V 3.2 3.3 3.399 V Reference section Reference voltage IREF = 0 to 5mA VCC = 4.4V to 36V Line regulation IREF = 0mA VCC = 4.4V to 36V 5 10 mV Load regulation IREF = 0 to 5mA 8 15 mV 18 30 mA Short circuit current 1. Guaranteed by design. 6/21 10 L5973AD 4 Functional description Functional description The main internal blocks are shown in Figure 2, where is reported the device block diagram. They are: ● A voltage regulator that supplies the internal circuitry. From this regulator, a 3.3V reference voltage is externally available. ● A voltage monitor circuit that checks the input and internal voltages. ● A fully integrated sawtooth oscillator whose frequency is 500KHz ● Two embedded current limitations circuitries which control the current that flows through the power switch. The Pulse by Pulse Current Limit forces the power switch OFF cycle by cycle if the current reaches an internal threshold, while the Frequency Shifter reduces the switching frequency in order to strongly reduce the duty cycle. ● A transconductance error amplifier. ● A pulse width modulator (PWM) comparator and the relative logic circuitry necessary to drive the internal power. ● An high side driver for the internal P-MOS switch. ● An inhibit block for stand-by operation. ● A circuit to realize the thermal protection function. Figure 2. Block diagram 7/21 Functional description 4.1 L5973AD Power supply & voltage reference The internal regulator circuit (shown in Figure 3) consists of a start-up circuit, an internal voltage Preregulator, the Bandgap voltage reference and the Bias block that provides current to all the blocks. The Starter gives the start-up currents to the whole device when the input voltage goes high and the device is enabled (inhibit pin connected to ground). The Preregulator block supplies the Bandgap cell with a preregulated voltage VREG that has a very low supply voltage noise sensitivity. 4.2 Voltages monitor An internal block senses continuously the VCC, Vref and Vbg. If the voltages go higher than their thresholds, the regulator starts to work. There is also an hysteresis on the VCC (UVLO). Figure 3. Internal regulator circuit VCC STARTER PREREGULATOR VREG BANDGAP IC BIAS D00IN1126 4.3 VREF Oscillator & synchronizator Figure 4 shows the block diagram of the oscillator circuit. The Clock Generator provides the switching frequency of the device that is internally fixed at 500KHz. The frequency shifter block acts reducing the switching frequency in case of strong overcurrent or short circuit. The clock signal is then used in the internal logic circuitry and is the input of the Ramp Generator and Synchronizator blocks. The Ramp Generator circuit provides the sawtooth signal, used to realize the PWM control and the internal voltage feed forward, while the Synchronizator circuit generates the synchronization signal. Infact the device has a synchronization pin that can works both as Master and Slave. As Master to synchronize external devices to the internal switching frequency. 8/21 L5973AD Functional description As Slave to synchronize itself by external signal. In particular, connecting together two devices, the one with the lower switching frequency works as Slave and the other one works as Master. To synchronize the device, the SYNC pin has to pass from a low level to a level higher than the synchronization threshold with a duty cycle that can vary approximately from 10% to 90%, depending also on the signal frequency and amplitude. The frequency of the synchronization signal must be at least higher than the internal switching frequency of the device (500KHz). Figure 4. Oscillator circuit FREQUENCY SHIFTER CLOCK t Ibias_osc CLOCK GENERATOR RAMP GENERATOR RAMP SYNCHRONIZATOR D00IN1131 4.4 SYNC Current protection The L5973AD has two current limit protections, pulse by pulse and frequency fold back. The schematic of the current limitation circuitry for the pulse by pulse protection is shown in Figure 5. The output power PDMOS transistor is split in two parallel PDMOS. The smallest one has a resistor in series, RSENSE. The current is sensed through Rsense and if reaches the threshold, the mirror is unbalanced and the PDMOS is switched off until the next falling edge of the internal clock pulse. Due to this reduction of the ON time, the output voltage decreases. Since the minimum switch ON time (necessary to avoid false overcurrent signal) is not enough to obtain a sufficiently low duty cycle at 500KHz, the output current, in strong overcurrent or short circuit conditions, could increase again. For this reason the switching frequency is also reduced, so keeping the inductor current under its maximum threshold. The Frequency Shifter (see Figure 4) depends on the feedback voltage. As the feedback voltage decreases (due to the reduced duty cycle), the switching frequency decreases too. 9/21 Functional description Figure 5. L5973AD Current limitation circuitry VCC RSENSE IOFF RTH DRIVER A1 IL A2 OUT A1/A2=95 I I NOT PWM D00IN1134 4.5 Error amplifier The voltage error amplifier is the core of the loop regulation. It is a transconductance operational amplifier whose non inverting input is connected to the internal voltage reference (1.235V), while the inverting input (FB) is connected to the external divider or directly to the output voltage. The output (COMP) is connected to the external compensation network. The uncompensated error amplifier has the following characteristics: Table 5. Uncompensated error amplifier Transconductance 2300µS Low frequency gain 65dB Minimum sink/source voltage Output voltage swing Input bias current 1500µA/300µA 0.4V/3.65V 2.5µA The error amplifier output is compared with the oscillator sawtooth to perform PWM control. 10/21 L5973AD 4.6 Functional description PWM comparator and power stage This block compares the oscillator sawtooth and the error amplifier output signals generating the PWM signal for the driving stage. The power stage is a very critical block cause it has to guarantee a correct turn on and turn OFF of the PDMOS. The turn ON of the power element, or better, the rise time of the current at turn on, is a very critical parameter to compromise. At a first approach, it looks like the faster it is the rise time, the lower are the turn on losses. But there is a limit introduced by the recovery time of the recirculation diode. In fact when the current of the power element equals the inductor current, the diode turns off and the drain of the power is free to go high. But during its recovery time, the diode can be considered as an high value capacitor and this produces a very high peak current, responsible of many problems: ● Spikes on the device supply voltage that cause oscillations (and thus noise) due to the board parasitics. ● Turn ON overcurrent causing a decrease of the efficiency and system reliability. ● Big EMI problems. ● Shorter freewheeling diode life. The fall time of the current during the turn off is also critical. In fact it produces voltage spikes (due to the parasitics elements of the board) that increase the voltage drop across the PDMOS. In order to minimize all these problems, a new topology of driving circuit has been used and its block diagram is shown in Figure 6. The basic idea is to change the current levels used to turn on and off the power switch, according with the PDMOS status and with the gate clamp status. This circuitry allow to turn off and on quickly the power switch and to manage the above question related to the freewheeling diode recovery time problem. The gate clamp is necessary to avoid that Vgs of the internal switch goes higher than Vgsmax. The ON/OFF Control block avoids any cross conduction between the supply line and ground. 11/21 Functional description Figure 6. L5973AD Driving circuitry VCC Vgsmax IOFF CLAMP GATE PDMOS DRAIN STOP DRIVE ON/OFF CONTROL DRAIN VOUT L OFF ESR ILOAD ON C ION D00IN1133 4.7 Inhibit function The inhibit feature allows to put in stand-by mode the device. With INH pin higher than 2.2V the device is disabled and the power consumption is reduced to less than 100µA. With INH pin lower than 0.8V, the device is enabled. If the INH pin is left floating, an internal pull up ensures that the voltage at the pin reaches the inhibit threshold and the device is disabled. The pin is also Vcc compatible. 4.8 Thermal shutdown The shutdown block generates a signal that turns off the power stage if the temperature of the chip goes higher than a fixed internal threshold (150°C). The sensing element of the chip is very close to the PDMOS area, so ensuring an accurate and fast temperature detection. An hysteresis of approximately 20°C avoids that the devices turns on and off continuously 12/21 L5973AD Additional features and protections 5 Additional features and protections 5.1 Feedback disconnection In case of feedback disconnection, the duty cycle increases versus the maximum allowed value, bringing the output voltage close to the input supply. This condition could destroy the load. To avoid this dangerous condition, the device is turned off if the feedback pin remains floating. 5.2 Output overvoltage protection The overvoltage protection, OVP, is realized by using an internal comparator, which input is connected to the feedback, that turns off the power stage when the OVP threshold is reached. This threshold is typically 30% higher than the feedback voltage. When a voltage divider is requested for adjusting the output voltage (see test application circuit), the OVP intervention will be set at: Equation 1 R1 + R2 V OVP = 1.3 ⋅ -------------------- ⋅ V FB R2 Where R1 is the resistor connected between the output voltage and the feedback pin, while R2 is between the feedback pin and ground. 5.3 Zero load Due to the fact that the internal power is a PDMOS, no boostrap capacitor is required and so, the device works properly also with no load at the output. In this condition it works in burst mode, with random repetition rate of the burst. 5.4 Application circuit In Figure 7 is shown the demo board application circuit, where the input supply voltage, VCC, can range from 4V to 25V due to the rated voltage of the input capacitor and the output voltage is adjustable from 1.235V to VCC. 13/21 Additional features and protections Figure 7. L5973AD Demo board application circuit VREF 3.3V VCC VIN = 4V to 25V SYNC. C1 10µF 25V CERAMIC COMP C4 22nF 6 8 2 1 3 INH C3 220pF D1 STPS2L25U L5973AD 4 7 L1 15µH OUT VOUT=3.3V R1 5.6K C2 330µF 6.3V 5 FB GND R2 3.3K R3 4.7K D03IN1454 Table 6. Component List 14/21 Reference Part Number Description Manufacturer C1 C3225X5R1E106M 10µF, 25V TDK C2 POSCAP 6TPB330M 330µF, 6.3V Sanyo C3 C1206C221J5GAC 220pF, 5%, 50V KEMET C4 C1206C223K5RAC 22nF, 10%, 50V KEMET R1 5.6K, 1%, 0.1W 0603 Neohm R2 3.3K, 1%, 0.1W 0603 Neohm R3 4.7K, 1%, 0.1W 0603 Neohm D1 STPS2L25U 2A, 25V ST L1 DO3316P-153 15µH, 3A COILCRAFT L5973AD Figure 8. Additional features and protections Junction temperature vs output current Figure 9. Tj(°C) Tj(C) 110 100 90 Vin=5V Tamb=25°C 80 Junction temperature vs output current Vo=2.5V Vo=3.3V 90 80 70 Vin=12V Tamb=25°C Vo=5V 70 Vo=1.8V 60 Vo=3.3V 100 Vo=2.5V 60 50 50 40 40 30 30 20 0.2 20 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0.2 2 0.4 0.6 0.8 1 1.2 Io(A) Io(A) Figure 10. Efficiency vs output current Figure 11. Efficiency vs output current 95 1.6 1.8 2 95 90 90 Vout=3.3V 85 Efficiency (%) Efficiency (%) 1.4 80 Vout=2.5V 75 Vout=5V 85 Vout=3.3V 80 75 Vin=5V Vout=2.5V Vin=12V 70 Vout=1.8V 70 65 65 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 Io(A) Io(A) 15/21 Application ideas 6 L5973AD Application ideas Figure 12. Positive Buck-Boost regulator Figure 13. Buck-Boost regulator VREF 3.3V 6 VCC VIN = 5V 8 2 SYNC. C1 10µF 10V CERAMIC COMP C2 10µF 25V CERAMIC 1 L5973AD 3 4 C4 22nF 7 INH 5 L1 15µH OUT D1 STPS2L25U 2.7K C5 100µF 16V GND 24K C3 220pF VOUT=-12V/ 0.6A FB R3 4.7K D03IN1455 Figure 14. Dual output voltage with auxiliary winding N1/N2=2 VREF 3.3V VCC VIN = 5V SYNC. C1 10µF 25V CERAMIC COMP C3 22nF C2 220pF 6 8 2 1 OUT 3 INH 7 VOUT=3.3V/ 0.5A D1 STPS25L25U 5 FB GND R3 4.7K D03IN1456 16/21 VOUT1=5V/ 50mA Lp 22µH L5973AD 4 D2 1N4148 C4 100µF 10V C5 47µF 10V L5973AD Application ideas Refer to L5973AD application note (AN1723) to have additional information, details, and more application ideas. L5973AD belongs to L597x family. Related part numbers are: ● L5970D: 1.5A (Isw), 250KHz Step Down DC-DC Converter in SO8 ● L5972D: 2A (Isw), 250KHz Step Down DC-DC Converter in SO8 ● L5973D: 2.5A (Isw), 250KHz Step Down DC-DC Converter in HSOP8 In case higher current is needed, the nearest DC-DC Converter family is L497x. 17/21 Package mechanical data 7 L5973AD Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 18/21 L5973AD Package mechanical data Table 7. HSOP8 Mechanical data mm. inch Dim. Min Typ A Max Min Typ 1.70 Max 0.0669 A1 0.00 A2 1.25 b 0.31 0.51 0.0122 0.0201 c 0.17 0.25 0.0067 0.0098 D 4.80 4.90 5.00 0.1890 E 5.80 6.00 6.20 0.2283 0.2441 E1 3.80 3.90 4.00 0.1496 0.1575 e 0.15 0.00 0.0059 0.0492 0.1929 0.1969 1.27 h 0.25 0.50 0.0098 0.0197 L 0.40 1.27 0.0157 0.0500 k 0 8 0.3150 0.10 0.0039 ccc Figure 15. Package dimensions 19/21 Order code 8 L5973AD Order code Table 8. Order code 9 Part number Package Packaging L5973AD HSOP8 (Exposed Pad) Tube L5973ADTR HSOP8 (Exposed Pad) Tape and reel Revision history Table 9. Revision history 20/21 Date Revision Changes December 2003 1 First Issue January 2004 2 Migration to EDOCS dms December 2004 3 Added D1 & E1 dimensions in HSOP8 package information. November 2005 4 Updated the package information section. 14-Dec-2006 5 VCC value updated to 4V in Table 4 on page 5, the document has been reformatted. 15-Jan-2007 6 Modified VCC value in Table 4 on page 5, added part number for C1 Table 6 on page 14. L5973AD Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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