LIS244ALH MEMS inertial sensor high performance 2-axis ±2/±6g ultracompact linear accelerometer Features ■ 2.4 V to 3.6 V single supply operation ■ ±2 g / ±6 g user selectable full-scale ■ Low power consumption ■ Output voltage, offset and sensitivity are ratiometric to the supply voltage ■ Factory trimmed device sensitivity and offset ■ Embedded self test ■ RoHS/ECOPACK® compliant ■ High shock survivability ( 10000 g ) Description The LIS244ALH is an ultra compact consumer low-power two-axis linear accelerometer that includes a sensing element and an IC interface able to take the information from the sensing element and provide an analog signal to the external world. The sensing element, capable of detecting the acceleration, is manufactured using a dedicated process developed by ST to produce inertial sensors and actuators in silicon. The IC interface is manufactured using an ST proprietary CMOS process with high level of integration. The dedicated circuit is trimmed to better match the sensing element characteristics. Table 1. LGA16 (4x4x1.5mm) The LIS244ALH has a dynamically user selectable full-scale of ±2 g / ±6 g and it is capable of measuring accelerations over a maximum bandwidth of 2.0 kHz for all axes. The device bandwidth may be reduced by using external capacitances. The self-test capability allows the user to check the functioning of the system. The LIS244ALH is available in Land Grid Array package (LGA) manufactured by ST. It is guaranteed to operate over an extended temperature range of -40 °C to +85 °C. The LIS244ALH belongs to a family of products suitable for a variety of applications: – Mobile terminals – Gaming and virtual reality input devices – Antitheft systems and inertial navigation – Appliance and robotics. Device summary Order code Temp range [° C] Package Packing LIS244ALH -40 to +85 LGA-16 Tray LIS244ALHTR -40 to +85 LGA-16 Tape and reel February 2008 Rev 2 1/16 www.st.com 16 Content LIS244ALH Content 1 2 3 4 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Mechanical and electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 Mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 Sensing element . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2 IC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.3 Factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.1 Soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 Output response vs. orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2/16 LIS244ALH List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 LIS244ALH electrical connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output response vs. orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 LGA16: mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3/16 List of tables LIS244ALH List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. 4/16 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Mechanical characteristics @ Vdd =3.3 V, T = 25 °C unless otherwise noted . . . . . . . . . . . 7 Electrical characteristics @ Vdd =3.3 V, T = 25 °C unless otherwise noted. . . . . . . . . . . . . 8 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Filter capacitor selection, Cload (x,y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 LIS244ALH Block diagram and pin description 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram X+ CHARGE AMPLIFIER Y+ Routx VoutX Routy VoutY S/H a MUX DEMUX S/H YX- SELF TEST 1.2 REFERENCE TRIMMING CIRCUIT CLOCK Pin description Figure 2. Pin connection NC Res Vdd NC 13 1 VoutX 16 1 12 NC ST VoutY X Y NC NC 9 4 8 Res 5 PD NC GND NC (TOP VIEW) DIRECTIONS OF THE DETECTABLE ACCELERATIONS FS (BOTTOM VIEW) 5/16 Block diagram and pin description Table 2. 6/16 LIS244ALH Pin description Pin # Pin name Function 1 FS Full scale selection (Logic 0: ±2g Full-scale; Logic 1: ±6g Full-scale) 2 ST Self test (Logic 0: normal mode; Logic 1: Self-test mode) 3 NC Internally not connected 4 Res Leave Unconnected or Connect to Vdd 5 PD Power Down (Logic 0: normal mode; Logic 1: Power-Down mode) 6 NC Internally not connected 7 GND 0V supply 8 NC Internally not connected 9 NC Internally not connected 10 VoutY Output voltage Y channel 11 NC Internally not connected 12 VoutX Output voltage X channel 13 NC Internally not connected 14 Vdd Power supply 15 Res Connect to Vdd 16 NC Internally not connected LIS244ALH Mechanical and electrical specifications 2 Mechanical and electrical specifications 2.1 Mechanical characteristics Table 3. Mechanical characteristics @ Vdd =3.3 V, T = 25 °C unless otherwise noted(1) Symbol Ar So Parameter Acceleration range(3) Test condition Min. Typ.(2) FS pin connected to GND ±2 FS pin connected to Vdd ±6 Max. Unit g Full-scale = ±2 g Vdd/5 - 5% Vdd/5 Vdd/5 + 5% Full-scale = ±6 g Vdd/15 - 10% Vdd/15 Vdd/15 + 10% Sensitivity(4) V/g SoDr Sensitivity change vs temperature Delta from +25 °C Voff Zero-g level(4) Full-scale = ±2 g T = 25 °C Zero-g level change vs temperature Delta from +25 °C ±0.4 mg/°C Non linearity(5) Best fit straight line Full-scale = ±2 g ±0.5 % FS ±2 % Vdd = 3.3 V; Full-scale = ±2 g 50 µg/ Hz X axis T = 25 °C; Vdd=3.3 V 140 mV Y axis T = 25 °C; Vdd=3.3 V -140 mV OffDr NL ± 0.01 Vdd/2 - 4% CrossAx Cross-axis(6) An Vt Acceleration noise density Self test output voltage change(7),(8),(9) Fres Sensing element resonant frequency(10) Top Operating temperature range Wh Product weight X,Y axis Vdd/2 %/°C Vdd/2 + 4% V 2.0 KHz -40 +85 0.040 °C gram 1. The product is factory calibrated at 3.3 V. The operational power supply range is from 2.4 V to 3.6 V. Voff, So and Vt parameters will vary with supply voltage. 2. Typical specifications are not guaranteed. 3. Guaranteed by wafer level test and measurement of initial offset and sensitivity. 4. Zero-g level and Sensitivity are essentially ratiometric to supply voltage at the calibration level ±8%. 5. Guaranteed by design. 6. Contribution to the measuring output of an inclination/acceleration along any perpendicular axis. 7. “Self test output voltage change” is defined as Vout(Vst=Logic1)-Vout(Vst=Logic0). 8. “Self test output voltage change” varies cubically with supply voltage. 9. When Full-scale is set to ±6 g, “Self test output voltage change” is one third of the specified value at ±2 g. 10. Minimum resonance frequency Fres=2.0 KHz. Sensor bandwidth=1/(2*π*110kΩ*Cload), with Cload>1 nF. 7/16 Mechanical and electrical specifications LIS244ALH 2.2 Electrical characteristics Table 4. Electrical characteristics @ Vdd =3.3 V, T = 25 °C unless otherwise noted(1) Symbol Parameter Vdd Supply voltage Idd Supply current Test condition Min. Typ.(2) Max. Unit 2.4 3.3 3.6 V Normal mode 680 µA Power-down mode 1 Vfs Vst Vpd Full-scale input Self-test input Power-down input Rout Output impedance of VoutX, VoutY 90 Cload Capacitive load drive(3) for VoutX, VoutY 1 Ton Turn-on time at exit of Power-down mode Top Operating temperature range 5 Logic 0 level 0 0.3*Vdd V Logic 1 level 0.7*Vdd Vdd V 130 KΩ 110 nF 550*Cload+ 0.3 Cload expressed in µF -40 1. The product is factory calibrated at 3.3 V. 2. Typical specifications are not guaranteed. 3. Minimum resonance frequency Fres=2.0 KHz. Device bandwidth=1/(2*π*110 kΩ*Cload), with Cload>1 nF. 8/16 ms +85 ºC LIS244ALH 2.3 Mechanical and electrical specifications Absolute maximum ratings Stresses above those listed as “Absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 5. Absolute maximum rating Symbol Ratings Vdd Supply voltage Vin Input voltage on any control pin (FS, ST, PD) APOW Acceleration (any axis, powered, Vdd = 3.3 V) AUNP Acceleration (any axis, not powered) TSTG Storage temperature range Maximum value Unit -0.3 to 6 V -0.3 to Vdd +0.3 V 3000 g for 0.5 ms 10000 g for 0.1 ms 3000 g for 0.5 ms ESD 10000 g for 0.1 ms Electrostatic discharge protection -40 to +125 °C 4 (HBM) KV 1.5 (CDM) KV 400 (MM) V This is a mechanical shock sensitive device, improper handling can cause permanent damages to the part This is an ESD sensitive device, improper handling can cause permanent damages to the part 9/16 Mechanical and electrical specifications 2.4 LIS244ALH Terminology Sensitivity describes the gain of the sensor and can be determined by applying 1g acceleration to it. As the sensor can measure DC accelerations this can be done easily by pointing the axis of interest towards the center of the Earth, note the output value, rotate the sensor by 180 degrees (point to the sky) and note the output value again thus applying ±1g acceleration to the sensor. Subtracting the larger output value from the smaller one, and dividing the result by 2, will give the actual sensitivity of the sensor. This value changes very little over temperature (see sensitivity change vs. temperature) and also very little over time. The Sensitivity tolerance describes the range of Sensitivities of a large population of sensors. Zero-g level describes the actual output signal if there is no acceleration present. A sensor in a steady state on a horizontal surface will measure 0g in X axis and 0g in Y axis. The output is ideally for a 3.3V powered sensor Vdd/2 = 1650 mV. A deviation from ideal 0-g level (1650 mV in this case) is called Zero-g offset. Offset of precise MEMS sensors is to some extend a result of stress to the sensor and therefore the offset can slightly change after mounting the sensor onto a printed circuit board or exposing it to extensive mechanical stress. Offset changes little over temperature - see “Zero-g level change vs. temperature” the Zero-g level of an individual sensor is very stable over lifetime. The Zero-g level tolerance describes the range of Zero-g levels of a population of sensors. Self test allows to test the mechanical and electric part of the sensor, allowing the seismic mass to be moved by means of an electrostatic test-force. The Self Test function is off when the ST pin is connected to GND. When the ST pin is tied at Vdd an actuation force is applied to the sensor, simulating a definite input acceleration. In this case the sensor outputs will exhibit a voltage change in their DC levels which is related to the selected full-scale and depending on the Supply Voltage through the device sensitivity. When ST is activated, the device output level is given by the algebraic sum of the signals produced by the acceleration acting on the sensor and by the electrostatic test-force. If the output signals change within the amplitude specified inside Table 3, then the sensor is working properly and the parameters of the interface chip are within the defined specification. Output impedance describes the resistor inside the output stage of each channel. This resistor is part of a filter consisting of an external capacitor of at least 1 nF and the internal resistor. Due to the high resistor level, only small inexpensive external capacitors are needed to generate low corner frequencies. When interfacing with an ADC it is important to use high input impedance input circuitries to avoid measurement errors. Note that the minimum load capacitance forms a corner frequency close to the resonance frequency of the sensor. In general the smallest possible bandwidth for a particular application should be chosen to get the best results. 10/16 LIS244ALH 3 Functionality Functionality The LIS244ALH is an ultra compact low-power, analog output two-axis linear accelerometer packaged in a LGA package. The complete device includes a sensing element and an IC interface able to take the information from the sensing element and provide an analog signal to the external world. 3.1 Sensing element A proprietary process is used to create a surface micro-machined accelerometer. The technology allows to carry out suspended silicon structures which are attached to the substrate in a few points called anchors and are free to move in the direction of the sensed acceleration. To be compatible with the traditional packaging techniques a cap is placed on top of the sensing element to avoid blocking the moving parts during the moulding phase of the plastic encapsulation. When an acceleration is applied to the sensor the proof mass displaces from its nominal position, causing an imbalance in the capacitive half-bridge. This imbalance is measured using charge integration in response to a voltage pulse applied to the sense capacitor. At steady state the nominal value of the capacitors are few pF and when an acceleration is applied the maximum variation of the capacitive load is in the fF range. 3.2 IC interface The complete signal processing uses a fully differential structure, while the final stage converts the differential signal into a single-ended one to be compatible with the external world. The first stage is a low-noise capacitive amplifier that implements a Correlated Double Sampling (CDS) at its output to cancel the offset and the 1/f noise. The produced signal is then sent to two different S&Hs, one for each channel, and made available to the outside. All the analog parameters (output offset voltage and sensitivity) are ratiometric to the voltage supply. Increasing or decreasing the voltage supply, the sensitivity and the offset will increase or decrease linearly. This feature provides the cancellation of the error related to the voltage supply along an analog to digital conversion chain. 3.3 Factory calibration The IC interface is factory calibrated for sensitivity (So) and Zero-g level (Voff). The trimming values are stored inside the device by a non volatile structure. Any time the device is turned on, the trimming parameters are downloaded into the registers to be employed during the normal operation. This allows the user to employ the device without further calibration. 11/16 Application hints 4 LIS244ALH Application hints Figure 3. LIS244ALH electrical connection GND GND 100nF FS ST 16 15 14 Vdd 10µF 13 Optional 12 1 2 LIS244ALH 11 3 (top view) 10 5 6 7 Pin 1 indicator Cload X Optional 9 4 1 Vout x Vout y Cload Y Y X 8 (TOP VIEW) PD DIRECTIONS OF THE DETECTABLE ACCELERATIONS GND Digital signals Power supply decoupling capacitors (100 nF ceramic or polyester + 10 µF Aluminum) should be placed as near as possible to the device (common design practice). The LIS244ALH allows to band limit VoutX and VoutY through the use of external capacitors. The recommended frequency range spans from DC up to 2.0 KHz. In particular, capacitors are added at output VoutX and VoutY pins to implement low-pass filtering for antialiasing and noise reduction. The equation for the cut-off frequency (ft) of the external filters is in this case: 1 f t = ----------------------------------------------------------------2π ⋅ R out ⋅ C load ( x, y ) Taking into account that the internal filtering resistor (Rout) has a nominal value equal to 110 KΩ, the equation for the external filter cut-off frequency may be simplified as follows: 1.45µF f t = ------------------------------- [ Hz ] C load ( x, y ) The tolerance of the internal resistor can vary typically of ±20% within its nominal value of 110 KΩ; thus the cut-off frequency will vary accordingly. A minimum capacitance of 1 nF for Cload(x, y) is required. 12/16 LIS244ALH Application hints Table 6. 4.1 Filter capacitor selection, Cload (x,y) Cut-off frequency Capacitor value 1 Hz 1500 nF 10 Hz 150 nF 20 Hz 68 nF 50 Hz 30 nF 100 Hz 15 nF 200 Hz 6.8 nF 500 Hz 3 nF Soldering information The LGA package is compliant with the ECOPACK, RoHs and “Green” standard. It is qualified for soldering heat resistance according to JEDEC J-STD-020C. Leave “Pin 1 Indicator” unconnected during soldering. Land pattern and soldering recommendations are available at www.st.com/mems. 4.2 Output response vs. orientation Figure 4. Output response vs. orientation X=2.31V (+1g) Y=1.65V (0g) X=1.65V (0g) Y=2.31V (+1g) X=1.65V (0g) Y=0.99V (-1g) X=0.99V (-1g) Y=1.65V (0g) Bottom Top Top X=1.65V (0g) Y=1.65V (0g) X=1.65V (0g) Y=1.65V (0g) Bottom Earth’s Surface Figure 4 shows output voltage values of LIS244ALH, powered at 3.3 V, with full-scale ±2 g. 13/16 Package information 5 LIS244ALH Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK® is an ST trademark. ECOPACK® specifications are available at: www.st.com. Figure 5. LGA16: mechanical data and package dimensions Dimensions Ref. mm Min. A1 1.500 A2 A3 0.160 d inch Typ. Max. 0.200 0.300 Min. Typ. Max. 1.600 0.0591 0.0630 1.330 0.0524 Outline and mechanical data 0.240 0.0063 0.0079 0.0094 0.0118 D1 3.850 4.000 4.150 0.1516 0.1575 0.1634 E1 3.850 4.000 4.150 0.1516 0.1575 0.1634 L2 1.950 0.0768 M 0.100 0.0039 N1 0.650 0.0256 N2 0.980 0.0386 P1 1.750 0.0689 P2 1.525 0.0600 T1 0.400 0.0157 T2 0.300 0.0118 k 0.050 0.0020 LGA16L (4x4x1.5mm) Land Grid Array Package 7974136D 14/16 LIS244ALH 6 Revision history Revision history Table 7. Document revision history Date Revision Changes 15-Jan-2008 1 Initial release. 19-Feb-2008 2 Updated Figure 2: Pin connection on page 5 15/16 LIS244ALH Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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