M74HCT174 HEX D-TYPE FLIP FLOP WITH CLEAR ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 56MHz (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174 DESCRIPTION The M74HCT174 is an high speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. Information signals applied to D inputs are transferred to the Q output on the positive going edge of the CLOCK (CK) pulse. When the CLEAR DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HCT174B1R M74HCT174M1R T&R M74HCT174RM13TR M74HCT174TTR (CLR) input is held low, the Q outputs are held low independently of the other inputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/10 M74HCT174 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1 CLEAR 2, 5, 7, 10, 12, 15 3, 4, 6, 11, 13, 14 NAME AND FUNCTION Asynchronous Master Reset (Active Low) Q0 to Q5 Flip-Flop Outputs D0 to D5 Data Inputs 9 CLOCK 8 16 GND Vcc Clock Input (LOW to HIGH, edge triggered) Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS FUNCTION CLEAR D CK Q X L L X H L L H H H H X Qn X : Don’t Care LOGIC DIAGRAM This logic diagram has not to be used to estimate propagation delays 2/10 CLEAR NO CHANGE M74HCT174 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value Supply Voltage Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Unit Supply Voltage 4.5 to 5.5 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C tr, tf Input Rise and Fall Time (VCC = 4.5 to 5.5V) 0 to 500 ns DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL II ICC ∆ ICC Parameter High Level Input Voltage Low Level Input Voltage Min. 4.5 to 5.5 4.5 to 5.5 4.5 Low Level Output Voltage 4.5 Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current TA = 25°C VCC (V) High Level Output Voltage Value Typ. Max. 2.0 -40 to 85°C -55 to 125°C Min. Min. Max. 2.0 0.8 Max. 2.0 0.8 V 0.8 IO=-20 µA 4.4 4.5 4.4 4.4 IO=-4.0 mA 4.18 4.31 4.13 4.10 Unit V V IO=20 µA 0.0 0.1 0.1 0.1 IO=4.0 mA 0.17 0.26 0.33 0.40 V 5.5 VI = VCC or GND ± 0.1 ±1 ±1 µA 5.5 VI = VCC or GND 4 40 80 µA 5.5 Per Input pin VI = 0.5V or VI = 2.4V Other Inputs at VCC or GND IO = 0 2.0 2.9 3.0 mA 3/10 M74HCT174 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CLOCK - Q) tPLH tPHL Propagation Delay Time (CLEAR - Q) fMAX Maximum Clock Frequency Minimum Pulse tW(H) Width (CLOCK) tW(L) tW(L) ts th tREM Minimum Pulse Width (CLEAR) Minimum Set-up Time Minimum Hold Time Minimum Removal Time Value TA = 25°C VCC (V) Min. -40 to 85°C -55 to 125°C Min. Min. Typ. Max. 4.5 8 15 19 4.5 18 28 35 4.5 18 28 35 4.5 30 56 Max. Unit Max. 22 ns ns 42 24 ns MHz 4.5 8 15 19 22 ns 4.5 8 15 19 22 ns 4.5 2 10 13 15 ns 5 6 8 ns 5 5 5 ns 4.5 4.5 5 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25°C Min. Typ. Max. 10 CIN Input Capacitance 5 CPD Power Dissipation Capacitance (note 1) 68 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + I CC/6 (per FLIP/ FLOP) And the total CPD when N pcs of FLIP-FLOP operate can be gained by the following equation : CPD (total) = 38 + 15 x n 4/10 M74HCT174 TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM 1 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH (CLOCK), SETUP AND HOLD TIME (nD TO CLOCK), CLOCK MAXIMUM FREQUENCY (f=1MHz; 50% duty cycle) 5/10 M74HCT174 WAVEFORM 2 : PROPAGATION DELAY TIME (nQ TO CLEAR)(f=1MHz; 50% duty cycle) WAVEFORM 3 : MINIMUM PULSE WIDTH (CLEAR), MINIMUM REMOVAL TIME (CLEAR TO CLOCK)(f=1MHz; 50% duty cycle) 6/10 M74HCT174 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 7/10 M74HCT174 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) PO13H 8/10 M74HCT174 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 9/10 M74HCT174 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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