SN74LVC1G18 1-OF-2 NONINVERTING DEMULTIPLEXER WITH 3-STATE DESELECTED OUTPUT SCES406G – JULY 2002 – REVISED SEPTEMBER 2003 D D D D D D D D D D D DBV OR DCK PACKAGE (TOP VIEW) Available in the Texas Instruments NanoStar and NanoFree Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 3.4 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) S GND A 1 6 2 5 3 4 Y0 VCC Y1 YEA, YEP, YZA, OR YZP PACKAGE (BOTTOM VIEW) A GND S 3 4 2 5 1 6 Y1 VCC Y0 description/ordering information This noninverting demultiplexer is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G18 is a 1-of-2 noninverting demultiplexer with a 3-state output. This device buffers the data on input A and passes it to either output Y0 or Y1, depending on whether the state of the select (S) input is low or high, respectively. ORDERING INFORMATION ORDERABLE PART NUMBER PACKAGE† TA NanoStar – WCSP (DSBGA) 0.17-mm Small Bump – YEA NanoFree – WCSP (DSBGA) 0.17-mm Small Bump – YZA (Pb-free) –40 C to 85 –40°C 85°C C NanoStar – WCSP (DSBGA) 0.23-mm Large Bump – YEP TOP-SIDE MARKING‡ SN74LVC1G18YEAR SN74LVC1G18YZAR Reel of 3000 _ _ _CJ_ SN74LVC1G18YEPR NanoFree – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-free) SN74LVC1G18YZPR SOT (SOT-23) – DBV Reel of 3000 SN74LVC1G18DBVR C18_ SOT (SC-70) – DCK Reel of 3000 SN74LVC1G18DCKR CJ_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar and NanoFree are trademarks of Texas Instruments. Copyright 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74LVC1G18 1-OF-2 NONINVERTING DEMULTIPLEXER WITH 3-STATE DESELECTED OUTPUT SCES406G – JULY 2002 – REVISED SEPTEMBER 2003 description/ordering information (continued) NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE INPUTS OUTPUTS S A Y0 Y1 L L L Z L H H Z H L Z L H H Z H logic diagram (positive logic) 6 S A Y0 1 3 4 Y1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259°C/W YEA/YZA package . . . . . . . . . . . . . . . . . . . . . . . . . . . 143°C/W YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 123°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74LVC1G18 1-OF-2 NONINVERTING DEMULTIPLEXER WITH 3-STATE DESELECTED OUTPUT SCES406G – JULY 2002 – REVISED SEPTEMBER 2003 recommended operating conditions (see Note 4) VCC VIH Supply voltage High-level input voltage Operating Data retention only VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V MIN MAX 1.65 5.5 1.5 UNIT V 0.65 × VCC 1.7 V 2 0.7 × VCC 0.35 ×VCC VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V 0.7 VIL Low-level input voltage VI VO Input voltage 0 5.5 V Output voltage 0 VCC –4 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 1.65 V VCC = 2.3 V IOH High-level output current VCC = 3 V VCC = 4.5 V VCC = 1.65 V VCC = 2.3 V IOL ∆t/∆v t/ v Low-level output current Input transition rise or fall rate VCC = 3 V 0.8 V 0.3 × VCC –8 –16 mA –24 –32 4 8 16 mA 24 VCC = 4.5 V VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 32 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 10 20 ns/V 5 TA Operating free-air temperature –40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74LVC1G18 1-OF-2 NONINVERTING DEMULTIPLEXER WITH 3-STATE DESELECTED OUTPUT SCES406G – JULY 2002 – REVISED SEPTEMBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 mA IOH = –4 mA VOH MIN 1.65 V to 5.5 V 1.65 V VCC–0.1 1.2 2.3 V 1.9 IOH = –8 mA IOH = –16 mA MAX 2.3 4.5 V IOH = –32 mA IOL = 100 mA IOL = 4 mA 3.8 1.65 V to 5.5 V 0.1 1.65 V 0.45 2.3 V 0.3 IOL = 8 mA IOL = 16 mA 0.4 3V IOL = 24 mA 0.55 ±5 mA 0 ±10 mA 3.6 V 10 mA 1.65 V to 5.5 V 10 mA 3 V to 5.5 V 500 mA II Ioff VI = 5.5 V or GND VI or VO = 5.5 V 0 to 5.5 V IOZ ICC VO = 0 to 5.5 V VI = 5.5 V or GND, ∆ICC Ci One input at VCC – 0.6 V, IO = 0 Other inputs at VCC or GND V 0.55 4.5 V IOL = 32 mA UNIT V 2.4 3V IOH = –24 mA VOL TYP† VCC VI = VCC or GND Co VO = VCC or GND † All typical values are at VCC = 3.3 V, TA = 25°C. 3.3 V 4 pF 3.3 V 6 pF switching characteristics over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX 2.3 8.4 1.1 4.2 1.1 3.4 0.8 2.7 UNIT ns switching characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 1.8 V ± 0.15 V MIN VCC = 2.5 V ± 0.2 V MAX MIN VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MAX MIN MAX MIN MAX UNIT tpd A Y 3.5 9.3 1.7 5 1.5 4.2 0.7 3.2 ns ten S Y 3.6 10.2 1.7 5.6 1.5 4.6 0.9 3.4 ns tdis S Y 1.9 12.7 1 5.3 1.1 4.9 0.5 3.3 ns operating characteristics, TA = 25°C PARAMETER Cpd 4 Power dissipation capacitance TEST CONDITIONS f = 10 MHz POST OFFICE BOX 655303 VCC = 1.8 V TYP VCC = 2.5 V TYP 17 • DALLAS, TEXAS 75265 17 VCC = 3.3 V TYP 18 VCC = 5 V TYP 21 UNIT pF SN74LVC1G18 1-OF-2 NONINVERTING DEMULTIPLEXER WITH 3-STATE DESELECTED OUTPUT SCES406G – JULY 2002 – REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION RL From Output Under Test CL (see Note A) VLOAD Open S1 GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 15 pF 15 pF 15 pF 15 pF 1 MΩ 1 MΩ 1 MΩ 1 MΩ 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V tPLH tPHL VOH VM Output VM VOL tPHL Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM VM 0V tPLZ tPZL VLOAD/2 VM VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ tPZH VOH Output VI Output Control VM VOH – V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN74LVC1G18 1-OF-2 NONINVERTING DEMULTIPLEXER WITH 3-STATE DESELECTED OUTPUT SCES406G – JULY 2002 – REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION RL From Output Under Test CL (see Note A) VLOAD Open S1 GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V tPLH tPHL VOH VM Output VM VOL tPHL Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM VM 0V tPLZ tPZL VLOAD/2 VM VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ tPZH VOH Output VI Output Control VM VOH – V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 2. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDS114 – FEBRUARY 2002 DCK (R-PDSO-G6) PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,15 0,65 6 0,10 M 4 1,40 1,10 1 0,13 NOM 2,40 1,80 3 Gage Plane 2,15 1,85 0,15 0°–8° 0,46 0,26 Seating Plane 1,10 0,80 0,10 0,00 0,10 4093553-3/D 01/02 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. Falls within JEDEC MO-203 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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