SCES208F − APRIL 1999 − REVISED SEPTEMBER 2003
D Available in the Texas Instruments
D
D
D
D
D
D
D
D
D
D
DCT OR DCU PACKAGE
(TOP VIEW)
NanoStar and NanoFree Packages
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 4.6 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 1000-V Charged-Device Model (C101)
1OE
1A
2Y
GND
1
8
2
7
3
6
4
5
VCC
2OE
1Y
2A
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
GND
2Y
1A
1OE
4 5
3 6
2 7
1 8
2A
1Y
2OE
VCC
description/ordering information
This dual buffer/driver is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G240 is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC2G240YEAR
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
−40°C to 85°C
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
TOP-SIDE
MARKING‡
SN74LVC2G240YZAR
Tape and reel
_ _ _CK_
SN74LVC2G240YEPR
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SN74LVC2G240YZPR
SSOP − DCT
Tape and reel
SN74LVC2G240DCTR
C40_ _ _
VSSOP − DCU
Tape and reel
SN74LVC2G240DCUR
C40_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
Copyright 2003, Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1 "** (""!'#'$,
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1
SCES208F − APRIL 1999 − REVISED SEPTEMBER 2003
description/ordering information (continued)
This device is organized as two 1-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low,
the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
L
L
L
H
H
X
Z
logic diagram (positive logic)
1
1OE
1A
2
6
1Y
7
2OE
5
2A
2
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2Y
• DALLAS, TEXAS 75265
SCES208F − APRIL 1999 − REVISED SEPTEMBER 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DCT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C/W
DCU package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227°C/W
YEA/YZA package . . . . . . . . . . . . . . . . . . . . . . . . . . . 140°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 102°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of VCC is provided in the recommended operating conditions table.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
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3
SCES208F − APRIL 1999 − REVISED SEPTEMBER 2003
recommended operating conditions (see Note 4)
Operating
VCC
VIH
Supply voltage
High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VO
Output voltage
Data retention only
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
High-level output current
∆t/∆v
Input transition rise or fall rate
5.5
UNIT
V
1.5
0.65 × VCC
1.7
V
2
0.7 × VCC
0.35 × VCC
0.7
0.8
V
0.3 × VCC
0
5.5
V
High or low state
0
3-state
0
VCC
5.5
V
−4
−8
−16
VCC = 3 V
VCC = 2.3 V
Low-level output current
1.65
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 4.5 V
VCC = 1.65 V
IOL
MAX
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 1.65 V
VCC = 2.3 V
IOH
MIN
−32
4
8
16
VCC = 3 V
mA
−24
mA
24
VCC = 4.5 V
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
32
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
10
20
ns/V
5
TA
Operating free-air temperature
−40
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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SCES208F − APRIL 1999 − REVISED SEPTEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
1.65 V to 5.5 V
IOH = −100 mA
IOH = −4 mA
IOH = −8 mA
IOH = −16 mA
VOH
1.65 V
VCC−0.1
1.2
2.3 V
1.9
3V
2.3
4.5 V
1.65 V to 5.5 V
0.1
1.65 V
0.45
IOL = 8 mA
IOL = 16 mA
2.3 V
0.3
3.8
0.4
3V
Ioff
IOZ
VI or VO = 5.5 V
VO = 0 to 5.5 V
ICC
∆ICC
VI = 5.5 V or GND,
One input at VCC − 0.6 V,
Ci
VI = VCC or GND
IO = 0
Other inputs at VCC or GND
V
0.55
4.5 V
VI = 5.5 V or GND
UNIT
V
IOL = 100 mA
IOL = 4 mA
IOL = 32 mA
A or OE
inputs
MAX
IOH = −32 mA
IOL = 24 mA
II
TYP†
2.4
IOH = −24 mA
VOL
MIN
0.55
0 to 5.5 V
±5
mA
0
±10
mA
3.6 V
10
mA
1.65 V to 5.5 V
10
mA
500
mA
3 V to 5.5 V
Co
VO = VCC or GND
† All typical values are at VCC = 3.3 V, TA = 25°C.
3.3 V
4
pF
3.3 V
6
pF
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
ten
OE
tdis
OE
PARAMETER
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
Y
2
11.3
1.4
5.5
1.1
Y
2.7
11.7
1.9
6.6
1.4
Y
1.7
12.8
0.8
5.7
1.2
VCC = 5 V
± 0.5 V
UNIT
MIN
MAX
4.6
1
4
ns
5.4
1.1
5
ns
5.5
0.5
4.2
ns
operating characteristics, TA = 25°C
TEST
CONDITIONS
PARAMETER
Cpd
Power dissipation
capacitance
per buffer/driver
VCC = 1.8 V
TYP
VCC = 2.5 V
TYP
Outputs enabled
VCC = 3.3 V
TYP
VCC = 5 V
TYP
15
17
2
3
f = 10 MHz
Outputs disabled
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1
5
SCES208F − APRIL 1999 − REVISED SEPTEMBER 2003
PARAMETER MEASUREMENT INFORMATION
RL
From Output
Under Test
CL
(see Note A)
VLOAD
Open
S1
GND
RL
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
VI
tr/tf
VCC
VCC
3V
VCC
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
VM
VLOAD
CL
RL
V∆
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6V
2 × VCC
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tw
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
tPHL
VOH
VM
Output
VM
VOL
tPHL
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VM
VM
VM
0V
tPZL
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
VM
VOH − V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
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MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCTOBER 2002
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
0,65
8
0,13 M
5
0,15 NOM
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
2,90
2,70
4,25
3,75
Gage Plane
PIN 1
INDEX AREA
1
0,25
4
0° – 8°
3,15
2,75
0,60
0,20
1,30 MAX
Seating Plane
0,10
0,10
0,00
NOTES: A.
B.
C.
D.
4188781/C 09/02
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion
Falls within JEDEC MO-187 variation DA.
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1
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