TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED DECEMBER 2003 D D D D D D D D D TLV2470 DBV PACKAGE (TOP VIEW) CMOS Rail-To-Rail Input/Output Input Bias Current . . . 2.5 pA Low Supply Current . . . 600 µA/Channel Ultra-Low Power Shutdown Mode - IDD(SHDN) . . . 350 nA/ch at 3 V - IDD(SHDN) . . . 1000 nA/ch at 5 V Gain-Bandwidth Product . . . 2.8 MHz High Output Drive Capability - ±10 mA at 180 mV - ±35 mA at 500 mV Input Offset Voltage . . . 250 µV (typ) Supply Voltage Range . . . 2.7 V to 6 V Ultra Small Packaging - 5 or 6 Pin SOT-23 (TLV2470/1) - 8 or 10 Pin MSOP (TLV2472/3) OUT 1 6 VDD GND 2 5 SHDN IN+ 3 4 IN - description The TLV247x is a family of CMOS rail-to-rail input/output operational amplifiers that establishes a new performance point for supply current versus ac performance. These devices consume just 600 µA/channel while offering 2.8 MHz of gain-bandwidth product. Along with increased ac performance, the amplifier provides high output drive capability, solving a major shortcoming of older micropower operational amplifiers. The TLV247x can swing to within 180 mV of each supply rail while driving a 10-mA load. For non-RRO applications, the TLV247x can supply ±35 mA at 500 mV off the rail. Both the inputs and outputs swing rail-to-rail for increased dynamic range in low-voltage applications. This performance makes the TLV247x family ideal for sensor interface, portable medical equipment, and other data acquisition circuits. FAMILY PACKAGE TABLE PACKAGE TYPES DEVICE NUMBER OF CHANNELS PDIP SOIC SOT-23 TSSOP MSOP TLV2470 1 8 8 6 — — Yes TLV2471 1 8 8 5 — — — TLV2472 2 8 8 — — 8 — TLV2473 2 14 14 — — 10 Yes TLV2474 4 14 14 — 14 — — TLV2475 4 16 16 — 16 — Yes UNIVERSAL EVM BOARD SHUTDOWN Refer to the EVM Selection Guide (Lit# SLOU060) A SELECTION OF SINGLE-SUPPLY OPERATIONAL AMPLIFIER PRODUCTS† † DEVICE VDD (V) VIO (µV) BW (MHz) SLEW RATE (V/µs) IDD (per channel) (µA) OUTPUT DRIVE RAIL-TO-RAIL TLV247X 2.7 - 6.0 250 TLV245X 2.7 - 6.0 20 2.8 1.5 600 ±35 mA I/O 0.22 0.11 23 ±10 mA I/O TLV246X 2.7 - 6.0 150 6.4 TLV277X 2.5 - 6.0 360 5.1 1.6 550 ±90 mA I/O 10.5 1000 ±10 mA O All specifications measured at 5 V. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1999 - 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 TLV2470 and TLV2471 AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C ° to 125°C ° - 40°C † SOT-23 SMALL OUTLINE (D)† (DBV)† SYMBOL PLASTIC DIP (P) TLV2470CD TLV2471CD TLV2470CDBV TLV2471CDBV VAUC VAVC TLV2470CP TLV2471CP TLV2470ID TLV2471ID TLV2470IDBV TLV2471IDBV VAUI VAVI TLV2470IP TLV2471IP — — — — TLV2470AID TLV2471AID TLV2470AIP TLV2471AIP This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2470CDR). TLV2472 AND TLV2473 AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C ° to 125°C ° - 40°C † ‡ SMALL OUTLINE (D)† SYMBOL‡ PLASTIC DIP (N) PLASTIC DIP (P) (DGN)† SYMBOL‡ (DGQ)† TLV2472CD TLV2473CD TLV2472CDGN — xxTIABU — — TLV2473CDGQ — xxTIABW — TLV2473CN TLV2472CP — TLV2472ID TLV2473ID TLV2472IDGN — xxTIABV — — TLV2473IDGQ — xxTIABX — TLV2473IN TLV2472IP — TLV2472AID TLV2473AID — — — — — — — — — TLV2473AIN TLV2472AIP — MSOP MSOP This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2472CDR). xx represents the device date code. TLV2474 and TLV2475 AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C ° to 125°C ° - 40°C † 2 SMALL OUTLINE (D)† PLASTIC DIP (N) TSSOP (PWP)† TLV2474CD TLV2475CD TLV2474CN TLV2475CN TLV2474CPWP TLV2475CPWP TLV2474ID TLV2475ID TLV2474IN TLV2475IN TLV2474IPWP TLV2475IPWP TLV2474AID TLV2475AID TLV2474AIN TLV2475AIN TLV2474AIPWP TLV2475AIPWP This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2474CDR). POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 TLV247x PACKAGE PINOUTS(1) TLV2470 DBV PACKAGE (TOP VIEW) OUT 1 VDD 6 GND 2 5 SHDN IN+ 3 4 IN - 1OUT 1IN 1IN+ GND NC 1SHDN NC 1 8 2 7 3 6 4 5 NC IN IN + GND 1 8 2 7 3 6 4 5 SHDN VDD OUT NC NC VDD OUT NC 1OUT 1IN 1IN + GND 1 8 2 7 3 6 4 5 TLV2474 D, N, OR PWP PACKAGE (TOP VIEW) (TOP VIEW) 14 2 13 3 12 4 11 5 10 6 9 7 8 1 GND 2 IN+ 3 VDD 2OUT 2IN 2IN+ NC 2SHDN NC 1OUT 1IN 1IN+ VDD 2IN+ 2IN 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 5 VDD 4 IN - TLV2473 DGQ PACKAGE (TOP VIEW) VDD 2OUT 2IN 2IN+ TLV2473 D OR N PACKAGE 1 OUT TLV2472 D, DGN, OR P PACKAGE (TOP VIEW) TLV2471 D OR P PACKAGE (TOP VIEW) NC IN IN + GND TLV2471 DBV PACKAGE (TOP VIEW) TLV2470 D OR P PACKAGE (TOP VIEW) 1OUT 1IN 1IN+ GND 1SHDN 1 2 3 4 5 10 9 8 7 6 VDD 2OUT 2IN 2IN+ 2SHDN TLV2475 D, N, OR PWP PACKAGE (TOP VIEW) 4OUT 4IN 4IN+ GND 3IN+ 3IN 3OUT 1OUT 1IN 1IN+ VDD 2IN+ 2IN 2OUT 1/2SHDN NC - No internal connection 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 4OUT 4IN 4IN+ GND 3IN + 3IN 3OUT 3/4SHDN TYPICAL PIN 1 INDICATORS Pin 1 Printed or Molded Dot Pin 1 Stripe Pin 1 Bevel Edges POST OFFICE BOX 655303 Pin 1 Molded ”U” Shape • DALLAS, TEXAS 75265 3 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 description (continued) Three members of the family (TLV2470/3/5) offer a shutdown terminal for conserving battery life in portable applications. During shutdown, the outputs are placed in a high-impedance state and the amplifier consumes only 350 nA/channel. The family is fully specified at 3 V and 5 V across an expanded industrial temperature range ( - 40°C to 125°C). The singles and duals are available in the SOT23 and MSOP packages, while the quads are available in TSSOP. The TLV2470 offers an amplifier with shutdown functionality all in a 6-pin SOT23 package, making it perfect for high density power-sensitive circuits. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VDD Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40°C to 125°C Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE: All voltage values, except differential voltages, are with respect to GND. DISSIPATION RATING TABLE PACKAGE θJC (°C/W) θJA (°C/W) TA ≤ 25°C POWER RATING D (8) 38.3 176 710 mW D (14) 26.9 122.3 1022 mW D (16) 25.7 114.7 1090 mW DBV (5) 55 324.1 385 mW DBV (6) 55 294.3 425 mW DGN (8) 4.7 52.7 2.37 W DGQ (10) 4.7 52.3 2.39 W N (14, 16) 32 78 1600 mW P (8) 41 104 1200 mW PWP (14) 2.07 30.7 4.07 W PWP (16) 2.07 29.7 4.21 W recommended operating conditions Single supply Supply voltage, VDD Split supply Common-mode input voltage range, VICR C-suffix Operating free-air temperature, TA I-suffix VIH Shutdown on/off voltage level‡ ‡ 4 VIL Relative to GND POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN MAX 2.7 6 UNIT ±1.35 ±3 V 0 VDD V 0 70 - 40 125 ° °C 2 0.8 V TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† MIN 25°C TLV247x VIO Input offset voltage αVIO IIO Temperature coefficient of input offset voltage Input offset current VIC = VDD/2, VO = VDD/2, RS = 50 Ω Input bias current High-level output voltage 2400 Full range TLV247xC Full range TLV247xI Full range 1.5 300 2 100 Full range 300 VIC = VDD/2 25°C 2.85 Full range 2.8 25°C 2.6 Full range 2.5 IO Output current AVD Large-signal differential voltage amplification ri(d) Differential input resistance CIC Common-mode input capacitance f = 10 kHz zo Closed-loop output impedance f = 10 kHz, VO(PP) = 1 V, 0.2 Full range 20 25°C 62 TLV247xC Full range 60 TLV247xI Full range 59 25°C 30 Full range 20 25°C 62 TLV247xC Full range 60 TLV247xI Full range 59 AV = 10 V mA ±22 25°C RL = 10 kΩ Ω 0.35 0.5 Full range VO = 0.5 V from rail 0.15 0.2 30 Sinking V 2.74 0.07 25°C Short-circuit output current pA 2.94 Full range 25°C Sourcing Sinking, Outside of rails‡ 50 Full range IOL = 10 mA IOS 50 TLV247xI IOL = 2.5 mA Sourcing, Outside of rails‡ µV/°C ° TLV247xC VIC = VDD/2 µV 100 25°C Low-level output voltage 1600 UNIT 1800 25°C IOH = - 10 mA VOL 2200 0.4 IOH = - 2.5 mA VOH 250 250 25°C IIB MAX Full range 25°C TLV247xA TYP 25°C 90 Full range 88 mA 116 dB 25°C 1012 Ω 25°C 19.3 pF 25°C 2 Ω † Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C. ‡ Depending on package dissipation rating POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) (continued) PARAMETER CMRR kSVR Common-mode rejection ratio Supply voltage rejection ratio (∆VDD /∆VIO) IDD Supply current (per channel) IDD(SHDN) Supply current in shutdown mode (TLV2470, TLV2473, TLV2475) (per channel) † TEST CONDITIONS VIC = 0 to 3 V, RS = 50 Ω VDD = 2.7 V to 6 V, No load VDD = 3 V to 5 V, No load TA† MIN TYP 25°C 61 78 TLV247xC Full range 59 TLV247xI Full range 58 25°C 74 Full range 66 25°C 77 Full range 68 VIC = VDD /2, VIC = VDD /2, 25°C MAX dB 90 dB 92 550 750 VO = 1.5 V, No load SHDN = 0 V TLV247xC Full range 2000 TLV247xI Full range 4000 Full range 800 25°C UNIT 350 µ µA 1500 nA Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C. operating characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage In TEST CONDITIONS VO(PP) = 0.8 V, RL = 10 kΩ CL = 150 pF, TA† MIN TYP 25°C 1.1 1.4 Full range 0.6 f = 100 Hz 25°C 28 25°C 15 Equivalent input noise current f = 1 kHz 25°C 0.405 THD + N Total harmonic distortion plus noise VO(PP) = 2 V, RL = 10 kΩ, f = 1 kHz t(on) Amplifier turnon time t(off) Amplifier turnoff time φm † ‡ 6 AV = 100 RL = OPEN‡ 0.5% 25°C 5 µs 25°C 250 ns 25°C 2.8 MHz V(STEP)PP = 2 V, AV = - 1, CL = 10 pF, RL = 10 kΩ 0.1% V(STEP)PP = 2 V, AV = - 1, CL = 56 pF, RL = 10 kΩ 0.1% Phase margin RL = 10 kΩ, CL = 1000 pF 25°C 61° Gain margin RL = 10 kΩ, CL = 1000 pF 25°C 15 1.5 0.01% 3.9 25°C ° 0.01% • DALLAS, TEXAS 75265 µs 1.6 4 Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C. Depending on package dissipation rating POST OFFICE BOX 655303 pA /√Hz 0.1% RL = 600 Ω Settling time √ nV/√Hz 0.02% 25°C 25 C f = 10 kHz, Gain-bandwidth product ts AV = 10 UNIT V/µs f = 1 kHz AV = 1 MAX dB TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA† MIN 25°C TLV247x VIO Input offset voltage αVIO IIO Temperature coefficient of input offset voltage VIC = VDD/2, VO = VDD/2, RS = 50 Ω Input offset current Input bias current High-level output voltage 2400 Full range TLV247xC Full range TLV247xI Full range 1.7 300 2.5 100 Full range 300 VIC = VDD/2 25°C 4.85 Full range 4.8 25°C 4.72 Full range 4.65 IO Output current AVD Large-signal differential voltage amplification ri(d) Differential input resistance CIC Common-mode input capacitance f = 10 kHz zo Closed-loop output impedance f = 10 kHz, VO(PP) = 3 V, 0.178 Full range 60 25°C 63 TLV247xC Full range 61 TLV247xI Full range 58 25°C 90 Full range 60 25°C 63 TLV247xC Full range 61 TLV247xI Full range 58 AV = 10 V mA ±35 25°C RL = 10 kΩ Ω 0.28 0.35 Full range VO = 0.5 V from rail 0.15 0.2 110 Sinking V 4.82 0.07 25°C Short-circuit output current pA 4.96 Full range 25°C Sourcing Sinking, Outside of rails‡ 50 Full range IOL = 10 mA IOS 50 TLV247xI IOL = 2.5 mA Sourcing, Outside of rails‡ µV/°C ° TLV247xC VIC = VDD/2 µV 100 25°C Low-level output voltage 1600 UNIT 2000 25°C IOH = - 10 mA VOL 2200 0.4 IOH = - 2.5 mA VOH 250 250 25°C IIB MAX Full range 25°C TLV247xA TYP 25°C 92 Full range 91 mA 120 dB 25°C 1012 Ω 25°C 18.9 pF 25°C 1.8 Ω † Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C. ‡ Depending on package dissipation rating POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) (continued) PARAMETER CMRR kSVR Common-mode rejection ratio Supply voltage rejection ratio (∆VDD /∆VIO) IDD Supply current (per channel) IDD(SHDN) Supply current in shutdown mode (TLV2470, TLV2473, TLV2475) (per channel) † TEST CONDITIONS VIC = 0 to 5 V, RS = 50 Ω VDD = 2.7 V to 6 V, No load VDD = 3 V to 5 V, No load TA† MIN TYP 25°C 64 84 TLV247xC Full range 63 TLV247xI Full range 58 25°C 74 Full range 66 25°C 77 Full range 66 VIC = VDD /2, VIC = VDD /2, 25°C MAX dB 90 dB 92 600 900 VO = 2.5 V, No load SHDN = 0 V TLV247xC Full range 3000 TLV247xI Full range 6000 Full range 1000 25°C UNIT 1000 µ µA 2500 nA nA Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C. operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage In TEST CONDITIONS VO(PP) = 2 V, RL = 10 kΩ CL = 150 pF, TA† MIN TYP 25°C 1.1 1.5 Full range 0.7 f = 100 Hz 25°C 28 25°C 15 Equivalent input noise current f = 1 kHz 25°C 0.39 THD + N Total harmonic distortion plus noise VO(PP) = 4 V, RL = 10 kΩ, f = 1 kHz t(on) Amplifier turnon time t(off) Amplifier turnoff time φm † ‡ 8 AV = 100 RL = OPEN‡ pA /√Hz 0.05% 0.3% 25°C 5 µs 25°C 250 ns 25°C 2.8 MHz RL = 600 Ω V(STEP)PP = 2 V, AV = - 1, CL = 10 pF, RL = 10 kΩ 0.1% V(STEP)PP = 2 V, AV = - 1, CL = 56 pF, RL = 10 kΩ 0.1% Phase margin RL = 10 kΩ, CL = 1000 pF 25°C 68° Gain margin RL = 10 kΩ, CL = 1000 pF 25°C 23 Settling time √ nV/√Hz 0.01% 25°C 25 C f = 10 kHz, Gain-bandwidth product ts AV = 10 UNIT V/µs f = 1 kHz AV = 1 MAX 1.8 0.01% 3.3 25°C ° µs 1.7 0.01% 3 dB Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C. Disable and enable time are defined as the interval between application of logic signal to SHDN and the point at which the supply current has reached half its final value. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage IIB Input bias current vs Common-mode input voltage 1, 2 IIO Input offset current vs Free-air temperature 3, 4 VOH VOL High-level output voltage vs High-level output current 5, 7 Low-level output voltage vs Low-level output current 6, 8 Zo Output impedance vs Frequency 9 IDD Supply current vs Supply voltage 10 PSRR Power supply rejection ratio vs Frequency 11 CMRR Common-mode rejection ratio vs Frequency 12 Vn Equivalent input noise voltage vs Frequency 13 VO(PP) Maximum peak-to-peak output voltage vs Frequency 14, 15 AVD Differential voltage gain and phase vs Frequency 16, 17 φm Phase margin vs Load capacitance 18, 19 Gain margin vs Load capacitance 20, 21 Gain-bandwidth product vs Supply voltage 22 vs Supply voltage 23 SR Slew rate vs Free-air temperature 24, 25 Crosstalk vs Frequency 26 THD+N Total harmonic distortion + noise vs Frequency 27, 28 VO Large and small signal follower vs Time 29 - 32 Shutdown pulse response vs Time 33, 34 35, 36 Shutdown forward and reverse isolation vs Frequency IDD(SHDN) Shutdown supply current vs Supply voltage 37 IDD(SHDN) Shutdown supply current vs Free-air temperature 38 IDD(SHDN) Shutdown pulse current vs Time POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 39, 40 9 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 TYPICAL CHARACTERISTICS 600 TA=25° C 200 0 - 200 - 400 - 600 400 0 - 200 - 400 - 600 - 800 - 0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VICR - Common-Mode Input Voltage - V - 800 - 0.5 0.5 1.5 2.5 3.5 4.5 5.5 VICR - Common-Mode Input Voltage - V Figure 1 Figure 2 20 IIB 10 0 IIO - 10 - 55 - 35 - 15 5 25 45 65 85 105 125 TA - Free-Air Temperature - °C VDD=3 V 3.0 2.5 2.0 TA=125°C 1.5 TA=85°C 1.0 TA=25°C 0.5 TA= - 40°C 3.5 3.0 1.5 0.5 TA= - 40°C 0.0 20 40 60 80 100 120 140 160 IOH - High-Level Output Current - mA Figure 7 TA= - 40°C 1.0 0.5 10 20 30 40 50 IOL - Low-Level Output Current - mA Figure 6 OUTPUT IMPEDANCE vs FREQUENCY 1000 VDD=3 & 5 V TA=25°C TA=125°C 4.5 TA=85°C 4.0 3.5 TA=25°C 3.0 TA= - 40°C 2.5 2.0 1.5 1.0 100 AV=100 10 AV=10 1 AV=1 0.1 0.5 VDD=5 V 0.0 0 TA=25°C 1.5 0 Z o - Output Impedance - Ω 4.0 TA=25°C TA=85°C LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VOL - Low-Level Output Voltage - V V OH - High-Level Output Voltage - V 4.5 1.0 TA=125°C 2.0 10 20 30 40 50 60 IOH - High-Level Output Current - mA 5.0 TA=85°C VDD=3 V 2.5 Figure 5 VDD=5 V TA=125°C IIO 0.0 0 5.5 2.0 0 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.0 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 2.5 10 3.0 Figure 4 5.0 IIB 20 Figure 3 VOL - Low-Level Output Voltage - V 30 V OH - High-Level Output Voltage - V I IO - Input Offset Current - pA 40 30 - 10 - 55 - 35 - 15 5 25 45 65 85 105 125 TA - Free-Air Temperature - °C 3.5 VDD=5 V 40 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 50 I IB - Input Bias Current - pA TA=25 °C 200 INPUT BIAS AND INPUT OFFSET CURRENTS vs FREE-AIR TEMPERATURE VDD=3 V I IB - Input Bias Current - pA 400 50 VDD=5 V I IO - Input Offset Current - pA VDD=3 V VIO - Input Offset Voltage - µ V VIO - Input Offset Voltage - µ V 600 10 INPUT BIAS AND INPUT OFFSET CURRENTS vs FREE-AIR TEMPERATURE INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 0 20 40 60 80 100 120 140 IOL - Low-Level Output Current - mA Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0.01 100 1k 10k 100k f - Frequency - Hz Figure 9 1M 10M TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 TYPICAL CHARACTERISTICS POWER SUPPLY REJECTION RATIO vs FREQUENCY TA=125°C 0.7 0.6 TA=25°C 0.5 TA= - 40°C 0.4 0.3 0.2 A V= 1 SHDN= VDD Per Channel 0.1 0.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VDD - Supply Voltage - V PSRR+ 90 80 PSRR - 70 60 50 40 30 10 6.0 100 VDD=3 & 5 V AV= 10 VIN= VDD/2 TA=25°C 50 40 30 20 10 0 10 100 1k 10k f - Frequency - Hz 100k V O(PP) - Maximum Peak-To-Peak Output Voltage - V 80 5.0 4.5 VO(PP)=5 V THD+N ≤ 2.0% RL=10 kΩ TA=25°C 4.0 3.5 3.0 2.5 VO(PP)=3 V 2.0 1.5 1.0 0.5 0.0 10k 100k f - Frequency - Hz 100 VDD=5 V 90 VIC=2.5 V 80 70 60 50 100 VDD=3 V VIC=1.5 V 1k 20 - 135 0 - 180 - 20 - 225 10k 100k 1M Frequency - Hz 10M Phase - ° - 45 - 90 10k 100k f - Frequency - Hz - 270 100M 1M 10M 1M MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY 5.5 THD+N ≤ 2.0% RL=600 Ω TA=25°C 5.0 4.5 4.0 VO(PP)=5 V 3.5 3.0 2.5 2.0 VO(PP)=3 V 1.5 1.0 0.5 0.0 10k 100k f - Frequency - Hz 1M Figure 15 DIFFERENTIAL VOLTAGE GAIN AND PHASE vs FREQUENCY 100 0 40 1k 110 Figure 12 45 VDD=±3 RL=600 Ω CL=0 TA=25°C 60 120 Figure 14 100 80 10M 5.5 DIFFERENTIAL VOLTAGE GAIN AND PHASE vs FREQUENCY - 40 100 1M MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY Figure 13 AVD - Differential Voltage Gain - dB V n - Equivalent Input Noise Voltage - nV/ Hz EQUIVALENT NOISE VOLTAGE vs FREQUENCY 60 1k 10k 100k f - Frequency - Hz 130 Figure 11 Figure 10 70 VDD=3 & 5 V RF=5 kΩ RI=50 Ω TA=25°C V O(PP) - Maximum Peak-To-Peak Output Voltage - V TA=85°C 0.8 100 AVD - Differential Voltage Gain - dB I DD - Supply Current - mA 0.9 45 VDD=±5 RL=600 Ω CL=0 TA=25°C 80 60 0 - 45 40 - 90 20 - 135 0 - 180 - 20 - 225 - 40 100 1k 1M 10k 100k Frequency - Hz 10M Phase - ° 1.0 COMMON-MODE REJECTION RATIO vs FREQUENCY CMRR - Common-Mode Rejection Ratio - dB PSRR - Power Supply Rejection Ratio - dB SUPPLY CURRENT vs SUPPLY VOLTAGE - 270 100M Figure 17 Figure 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 TYPICAL CHARACTERISTICS PHASE MARGIN vs LOAD CAPACITANCE PHASE MARGIN vs LOAD CAPACITANCE 90 60 Rnull=50 80 Rnull=100 50 Rnull=20 40 30 20 10 0 VDD=5V RL=10 kΩ TA=25°C See Figure 42 90 VDD=3V RL=10 kΩ TA=25°C Rnull=50 5 Rnull=0 70 Gain Margin - dB 70 100 VDD=3 V RL=10 kΩ TA=25°C See Figure 42 φ m - Phase Margin - ° φ m - Phase Margin - ° 80 GAIN MARGIN vs LOAD CAPACITANCE Rnull=100 60 50 40 30 10 15 Rnull=20 Rnull=20 20 25 Rnull=0 0 100 10 1k 10k CL - Load Capacitance - pF Rnull=50 Rnull=0 0 100 100k 1k 10k CL - Load Capacitance - pF Figure 18 30 100 100k 1k 10k CL - Load Capacitance - pF Figure 19 GAIN MARGIN vs LOAD CAPACITANCE 0 4.0 5 3.5 SLEW RATE vs SUPPLY VOLTAGE 2.0 Gain Margin - dB 15 Rnull=20 20 25 Rnull=50 Rnull=100 VDD=5V RL=10 kΩ TA=25°C 30 RL=10 kΩ SR - Slew Rate - V/µs Gain-Bandwidth Product - MHz 1.8 Rnull=0 3.0 RL=600 Ω 2.5 2.0 1.5 CL=11 pF f=10 kHz TA=25°C 1.0 1k 10k CL - Load Capacitance - pF 3.0 3.5 4.0 4.5 5.0 5.5 VDD - Supply Voltage - V 1.75 SR+ SR - Slew Rate - V/µs SR - Slew Rate - V/µs 1.75 SR - 1.00 0.75 0.25 VDD=3 V RL=10 kΩ CL=150 pF A V= - 1 VO(PP)=1.5 V A V= - 1 RL=10 kΩ CL=150 pF 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VDD - Supply Voltage - V Figure 23 SR - 1.50 SR+ 1.25 1.00 0.75 0.50 0.25 0.00 - 55 - 35 - 15 5 25 45 65 85 105 125 TA - Free-Air Temperature - °C VDD=5 V RL=10 kΩ CL=150 pF A V= - 1 0.00 - 55 - 35 - 15 5 25 45 65 85 105 125 TA - Free-Air Temperature - °C Figure 24 12 0.6 SLEW RATE vs FREE-AIR TEMPERATURE 2.00 0.50 0.8 Figure 22 2.00 1.25 1.0 6.0 SLEW RATE vs FREE-AIR TEMPERATURE 1.50 1.2 0.0 2.5 Figure 21 SR+ 1.4 0.2 0.5 100k SR - 1.6 0.4 0.0 35 100 100k Figure 20 GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 10 Rnull=100 20 Figure 25 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 6.0 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 TYPICAL CHARACTERISTICS VDD = 3V & 5V AV = 1 RL= 600Ω VI(PP)=2V All Channels - 20 Crosstalk - dB - 40 - 60 - 80 - 100 - 120 - 140 - 160 1k 100 10 k f - Frequency - Hz 10 100 k 1 AV = 100 AV = 10 0.1 AV = 1 0.01 VDD = 3 V RL = 10 kΩ V0 = 2 VPP TA = 25°C 0.001 10 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD+N - Total Harmonic Distortion + Noise 0 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY THD+N - Total Harmonic Distortion + Noise CROSSTALK vs FREQUENCY 100 1k AV = 100 AV = 10 0.1 AV = 1 0.01 VDD = 5 V RL = 10 kΩ V0 = 4 VPP TA = 25°C 0.001 10 100k 10k 1 100 f - Frequency - Hz Figure 26 Figure 27 LARGE SIGNAL FOLLOWER PULSE RESPONSE vs TIME LARGE SIGNAL FOLLOWER PULSE RESPONSE vs TIME VI (50 mV/DIV) VDD = 3 V RL = 10 kΩ CL = 8 pF f = 85 kHz TA = 25°C 3 4 5 6 t - Time - µs 7 8 9 10 VO (1 V/DIV) VDD = 5 V RL = 10 kΩ CL = 8 pF f = 85 kHz TA = 25°C 0 1 2 3 Figure 29 VDD = 3 V RL = 10 kΩ CL = 8 pF f = 1 MHz TA = 25°C V O - Output Voltage V O - Output Voltage V O - Output Voltage VO (1 V/DIV) 2 VO (50 mV/DIV) 4 5 6 t - Time - µs 7 8 9 0 10 100 200 300 t - Time - µs Figure 30 SMALL SIGNAL FOLLOWER PULSE RESPONSE vs TIME SHUTDOWN (ON AND OFF) PULSE RESPONSE vs TIME SHUTDOWN (ON AND OFF) PULSE RESPONSE vs TIME Figure 32 400 500 RL = 600 Ω RL = 10 kΩ VO (500 mV/DIV) VDD = 3 V CL = 8 pF TA = 25°C 0 2 V O - Output Voltage V O - Output Voltage V O - Output Voltage VSHDN (2 V/DIV) VO (50 mV/DIV) 200 300 t - Time - µs 500 VSHDN (2 V/DIV) VDD = 5 V RL = 10 kΩ CL = 8 pF f = 1 MHz TA = 25°C 100 400 Figure 31 VI (50 mV/DIV) 0 100k SMALL SIGNAL FOLLOWER PULSE RESPONSE vs TIME VI (2 V/DIV) 1 10k Figure 28 VI (2 V/DIV) 0 1k f - Frequency - Hz RL = 600 Ω RL = 10 kΩ VO (1 V/DIV) VDD = 5 V CL = 8 pF TA = 25°C 4 6 8 t - Time - µs 10 12 14 16 Figure 33 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0 2 4 6 8 10 t - Time - µs 12 14 16 18 Figure 34 13 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 TYPICAL CHARACTERISTICS SHUTDOWN FORWARD ISOLATION vs FREQUENCY I DD(SHDN) - Shutdown Supply Current - µA 120 120 VDD = 3 & 5 V CL=0 pF AV = 1 VI(PP)=0.1, 1.5, 3 V 100 Shutdown Forward Isolation - dB Shutdown Forward Isolation - dB SHUTDOWN SUPPLY CURRENT vs SUPPLY VOLTAGE SHUTDOWN REVERSE ISOLATION vs FREQUENCY 80 RL=600 Ω 60 RL=10 kΩ 40 20 VDD = 3 & 5 V RL=10 kΩ CL=0 pF AV = 1 VIN=0.1, 1.5, 3 Vp-p 100 80 RL=600 Ω 60 RL=10 kΩ 40 20 0 0 100 1k 10k 100k f - Frequency - Hz 1M 10M 100 1k Figure 35 10k 100k f - Frequency - Hz 1M 2.0 1.8 1.6 1.4 TA=125 1.2 TA=85 1.0 TA=25 0.8 TA= - 40 0.6 0.4 Shutdown On RL=OPEN VI=VDD/2 0.2 0.0 2.5 10M 3.0 3.5 4.0 4.5 5.0 5.5 VDD - Supply Voltage - V Figure 36 Figure 37 SHUTDOWN SUPPLY CURRENT vs FREE-AIR TEMPERATURE I DD - Shutdown Supply Current - µ A 1.6 SD MODE Channel 1 & 2 AV = 1 RL= OPEN VIN=VDD/2 1.4 1.2 1.0 VDD=5 V 0.8 0.6 0.4 VDD=3 V 0.2 0.0 - 55 - 35 - 15 5 25 45 65 85 105 125 TA - Free-Air Temperature - °C Figure 38 SHUTDOWN PULSE CURRENT vs TIME I DD - Supply Current - mA 4 2 3 1.75 2 1.5 1 1.25 0 IDD RL=10 kΩ 1 -1 0.75 -2 0.5 -3 IDD RL=600Ω -4 0.25 -5 VDD = 3 V CL=8 pF TA=25°C 0 - 0.25 -6 - 0.5 0 4 8 12 16 20 t - Time - µs 24 I DD - Supply Current - mA Shutdown Pulse Shutdown Pulse - V 2 1.75 2 1.25 0 1 IDD RL=10 kΩ -2 0.75 -4 IDD RL=600 Ω 0.5 -6 0.25 - 0.25 -8 - 0.5 4 8 12 16 t - Time - µs Figure 40 • DALLAS, TEXAS 75265 - 10 - 12 0 28 30 -8 VDD = 5 V CL=8 pF TA=25°C 0 -7 POST OFFICE BOX 655303 4 Shutdown Pulse 1.5 Figure 39 14 6 Shutdown Pulse - V SHUTDOWN PULSE CURRENT vs TIME 20 24 28 30 6.0 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION Rnull _ + RL CL Figure 41 APPLICATION INFORMATION driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 42. A minimum value of 20 Ω should work well for most applications. RF RG RNULL _ Input Output + CLOAD Figure 42. Driving a Capacitive Load offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF IIB - RG + - VI RS IIB+ V OO +V IO ǒ ǒ ǓǓ 1) R R F G VO + "I IB) R S ǒ ǒ ǓǓ 1) R R F G "I IB– R F Figure 43. Output Offset Voltage Model POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 APPLICATION INFORMATION general configurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 44). RG RF VO + VI R1 C1 f V O + V I ǒ 1) R R F G –3dB Ǔǒ + 1 2pR1C1 Ǔ 1 1 ) sR1C1 Figure 44. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 f C2 RG RF –3dB RG = + ( 1 2pRC RF 1 2Q ) Figure 45. 2-Pole Low-Pass Sallen-Key Filter shutdown function Three members of the TLV247x family (TLV2470/3/5) have a shutdown terminal for conserving battery life in portable applications. When the shutdown terminal is tied low, the supply current is reduced to 350 nA/channel, the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, care should be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place the operational amplifier into shutdown. The shutdown terminal threshold is always referenced to VDD/2. Therefore, when operating the device with split supply voltages (e.g. ± 2.5 V), the shutdown terminal needs to be pulled to VDD - (not GND) to disable the operational amplifier. 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 APPLICATION INFORMATION shutdown function (continued) The amplifier’s output with a shutdown pulse is shown in Figures 33 and 34. The amplifier is powered with a single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnon and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the output waveform. The times for the single, dual, and quad are listed in the data tables. Figures 35 and 36 show the amplifier’s forward and reverse isolation in shutdown. The operational amplifier is powered by ±1.35-V supplies and configured as a voltage follower (AV = 1). The isolation performance is plotted across frequency using 0.1-VPP, 1.5-VPP, and 2.5-VPP input signals. During normal operation, the amplifier would not be able to handle a 2.5-VPP input signal with a supply voltage of ±1.35 V since it exceeds the common-mode input voltage range (VICR). However, this curve illustrates that the amplifier remains in shutdown even under a worst case scenario. circuit layout considerations To achieve the levels of high performance of the TLV247x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following. D Ground planes - It is highly recommended that a ground plane be used on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. D Proper power supply decoupling - Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. D Sockets - Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the best implementation. D Short trace runs/compact part placements - Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout should be made as compact as possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at the input of the amplifier. D Surface-mount passive components - Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be kept as short as possible. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 APPLICATION INFORMATION general PowerPAD design considerations The TLV247x is available in a thermally-enhanced PowerPAD family of packages. These packages are constructed using a downset leadframe upon which the die is mounted [see Figure 46(a) and Figure 46(b)]. This arrangement results in the lead frame being exposed as a thermal pad on the underside of the package [see Figure 46(c)]. Because this thermal pad has direct thermal contact with the die, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad. The PowerPAD package allows for both assembly and thermal management in one manufacturing operation. During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be soldered to a copper area underneath the package. Through the use of thermal paths within this copper area, heat can be conducted away from the package into either a ground plane or other heat dissipating device. The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of surface mount with the, heretofore, awkward mechanical methods of heatsinking. DIE Side View (a) Thermal Pad DIE End View (b) Bottom View (c) NOTE A: The thermal pad is electrically isolated from all terminals in the package. Figure 46. Views of Thermally Enhanced DGN Package Although there are many ways to properly heatsink the PowerPAD package, the following steps illustrate the recommended approach. Thermal Pad Area Quad Single or Dual 68 mils x 70 mils) with 5 vias (Via diameter = 13 mils Figure 47. PowerPAD PCB Etch and Via Pattern PowerPAD is a trademark of Texas Instruments Incorporated. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 78 mils x 94 mils) with 9 vias (Via diameter = 13 mils) TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 APPLICATION INFORMATION general PowerPAD design considerations (continued) 1. Prepare the PCB with a top side etch pattern as shown in Figure 47. There should be etch for the leads as well as etch for the thermal pad. 2. Place five holes (dual) or nine holes (quad) in the area of the thermal pad. These holes should be 13 mils in diameter. Keep them small so that solder wicking through the holes is not a problem during reflow. 3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps dissipate the heat generated by the TLV247x IC. These additional vias may be larger than the 13-mil diameter vias directly under the thermal pad. They can be larger because they are not in the thermal pad area to be soldered so that wicking is not a problem. 4. Connect all holes to the internal ground plane. 5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes the soldering of vias that have plane connections easier. In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the TLV247x PowerPAD package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated-through hole. 6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five holes (dual) or nine holes (quad) exposed. The bottom-side solder mask should cover the five or nine holes of the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the reflow process. 7. Apply solder paste to the exposed thermal pad area and all of the IC terminals. 8. With these preparatory steps in place, the TLV247x IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This results in a part that is properly installed. For a given θJA, the maximum power dissipation is shown in Figure 48 and is calculated by the following formula: P D Where: PD TMAX TA θJA + ǒ T Ǔ –T MAX A q JA = Maximum power dissipation of TLV247x IC (watts) = Absolute maximum junction temperature (150°C) = Free-ambient air temperature (°C) = θJC + θCA θJC = Thermal coefficient from junction to case θCA = Thermal coefficient from case to ambient air (°C/W) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 APPLICATION INFORMATION general PowerPAD design considerations (continued) MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE 7 Maximum Power Dissipation - W 6 5 4 3 2 PWP Package Low-K Test PCB θJA = 29.7°C/W DGN Package Low-K Test PCB θJA = 52.3°C/W TJ = 150°C SOT-23 Package Low-K Test PCB θJA = 324°C/W PDIP Package Low-K Test PCB θJA = 104°C/W SOIC Package Low-K Test PCB θJA = 176°C/W 1 0 - 55 - 40 - 25 - 10 5 20 35 50 65 80 95 110 125 TA - Free-Air Temperature - °C NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB. Figure 48. Maximum Power Dissipation vs Free-Air Temperature The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent power and output power. The designer should never forget about the quiescent heat generated within the device, especially multi-amplifier devices. Because these devices have linear output stages (Class A-B), most of the heat dissipation is at low output voltages with high output currents. Figure 49 to Figure 54 show this effect, along with the quiescent heat, with an ambient air temperature of 70°C and 125°C. When using VDD = 3 V, there is generally not a heat problem with an ambient air temperature of 70°C. But, when using VDD = 5 V, the packages are severely limited in the amount of heat it can dissipate. The other key factor when looking at these graphs is how the devices are mounted on the PCB. The PowerPAD devices are extremely useful for heat dissipation. But, the device should always be soldered to a copper plane to fully use the heat dissipation properties of the PowerPAD. The SOIC package, on the other hand, is highly dependent on how it is mounted on the PCB. As more trace and copper area is placed around the device, θJA decreases and the heat dissipation capability increases. The currents and voltages shown in these graphs are for the total package. For the dual or quad amplifier packages, the sum of the RMS output currents and voltages should be used to choose the proper package. 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 APPLICATION INFORMATION general PowerPAD design considerations (continued) TLV2470, TLV2471† MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 Maximum Output Current Limit Line 160 | IO | - Maximum RMS Output Current - mA | IO | - Maximum RMS Output Current - mA 180 140 Packages With θJA ≤ 110°C/W at TA = 125°C or θJA ≤ 355°C/W at TA = 70°C C 120 100 B A 80 60 Safe Operating Area 40 VDD = ± 3 V TJ = 150°C TA = 125°C 20 TLV2470, TLV2471† MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS Maximum Output Current Limit Line 160 140 G B 100 A 80 Packages With θJA ≤ 210°C/W at TA = 70°C 60 40 VDD = ± 5 V TJ = 150°C TA = 125°C 20 0 0 0 1.5 0.25 0.5 0.75 1 1.25 | VO | - RMS Output Voltage - V 0 C 120 Packages With θJA ≤ 55°C/W at TA = 125°C or θJA ≤ 178°C/W at TA = 70°C D 100 80 60 40 VDD = ± 3 V TJ = 150°C TA = 125°C 20 Safe Operating Area TLV2472, TLV2473† MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 | IO | - Maximum RMS Output Current - mA | IO | - Maximum RMS Output Current - mA G Maximum Output Current Limit Line 160 140 F 120 G 100 H D 80 C 60 40 VDD = ± 5 V TJ = 150°C TA = 125°C 20 0 0 0 0.25 0.5 0.75 1 1.25 | VO | - RMS Output Voltage - V 1.5 0 Packages With θJA ≤ 105°C/W at TA = 70°C Safe Operating Area 0.5 1 1.5 2 | VO | - RMS Output Voltage - V 2.5 Figure 52 Figure 51 † 2.5 Figure 50 TLV2472, TLV2473† MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 Maximum Output Current Limit Line 160 H Safe Operating Area 0.5 1 1.5 2 | VO | - RMS Output Voltage - V Figure 49 140 C 120 A - SOT23(5); B - SOT23 (6); C - SOIC (8); D - SOIC (14); E - SOIC (16); F - MSOP PP (8); G - PDIP (8); H - PDIP (14); I - PDIP (16); J - TSSOP PP (14/16) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 APPLICATION INFORMATION general PowerPAD design considerations (continued) TLV2474, TLV2475† MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS 180 Maximum Output Current Limit Line 160 140 | IO | - Maximum RMS Output Current - mA | IO | - Maximum RMS Output Current - mA 180 J 120 H and I 100 E Packages With θJA ≤ 88°C/W D at TA = 70°C 80 60 40 VDD = ±3 V TJ = 150°C TA = 125°C 20 0 0 TLV2474, TLV2475† MAXIMUM RMS OUTPUT CURRENT vs RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS Safe Operating Area Maximum Output Current Limit Line 160 140 J 120 100 H and I 80 VDD = ± 5 V TJ = 150°C TA = 125°C 60 1.5 20 Safe Operating Area 0 Figure 53 † D 40 0 0.25 0.5 0.75 1 1.25 | VO | - RMS Output Voltage - V E Packages With θJA ≤ 52°C/W at TA = 70°C 0.5 1 1.5 2 | VO | - RMS Output Voltage - V 2.5 Figure 54 A - SOT23(5); B - SOT23 (6); C - SOIC (8); D - SOIC (14); E - SOIC (16); F - MSOP PP (8); G - PDIP (8); H - PDIP (14); I - PDIP (16); J - TSSOP PP (14/16) 22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS232C - JUNE 1999 - REVISED AUGUST 2003 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 2) and subcircuit in Figure 55 are generated using the TLV247x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): D D D D D D D D D D D D Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit NOTE 1: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 3 99 VDD + egnd rd1 rd2 rss ro2 css fb rp c1 7 11 12 + c2 vlim 1 + r2 9 6 IN+ vc D D 8 + vb ga 2 G G IN ro1 gcm ioff 53 S S OUT dp 91 10 iss GND 4 vlp - ve + 54 90 dln + hlim - + dc - dlp 5 92 vln + de * TLV247x operational amplifier ”macromodel” subcircuit * created using Parts release 8.0 on 4/27/99 at 14:31 * Parts is a MicroSim product. * * connections: non - inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | .subckt TLV247x 1 2 3 4 5 * c1 11 12 1.1094E- 12 c2 6 7 5.5000E- 12 css 10 99 556.53E- 15 dc 5 53 dy de 54 5 dy dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 + 39.614E6 - 1E3 1E3 40E6 - 40E6 ga 6 0 11 12 79.828E - 6 gcm 0 6 10 99 32.483E - 9 iss hlim ioff j1 j2 r2 rd1 rd2 ro1 ro2 rp rss vb vc ve vlim vlp vln .model .model .model .model .ends *$ 10 90 0 11 12 6 3 3 8 7 3 10 9 3 54 7 91 0 dx dy jx1 jx2 4 dc 10.714E- 6 0 vlim 1K 6 dc 75E- 9 2 10 jx1 1 10 jx2 9 100.00E3 11 12.527E3 12 12.527E3 5 10 99 10 4 3.8023E3 99 18.667E6 0 dc 0 53 dc .842 4 dc .842 8 dc 0 0 dc 110 92 dc 110 D(Is=800.00E- 18) D(Is=800.00E- 18 Rs=1m Cjo=10p) NJF(Is=1.0825E- 12 Beta=594.78E - 06 + Vto= - 1) NJF(Is=1.0825E- 12 Beta=594.78E - 06 + Vto= - 1) Figure 55. Boyle Macromodel and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23 PACKAGE OPTION ADDENDUM www.ti.com 4-Nov-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2470AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2470AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2470CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470CDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470CDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470CDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470CDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2470CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2470ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470IDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470IDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470IDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470IDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2470IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2470IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2471AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 4-Nov-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2471AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2471AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2471CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471CDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471CDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2471CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2471ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471IDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471IDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2471IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2471IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2472AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 2 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 4-Nov-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2472AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2472AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2472CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472CDGN ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472CDGNR ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472CDGNRG4 ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2472CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2472ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472IDGN ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472IDGNG4 ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472IDGNR ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472IDGNRG4 ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2472IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2472IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2473AID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473AIDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473AIN ACTIVE PDIP N 14 25 Addendum-Page 3 Pb-Free (RoHS) Lead/Ball Finish CU NIPD MSL Peak Temp (3) Level-NC-NC-NC PACKAGE OPTION ADDENDUM www.ti.com 4-Nov-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2473AINE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD TLV2473CD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473CDGQ ACTIVE MSOPPower PAD DGQ 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473CDGQR ACTIVE MSOPPower PAD DGQ 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473CDGQRG4 ACTIVE MSOPPower PAD DGQ 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473CDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473ID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473IDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473IDGQ ACTIVE MSOPPower PAD DGQ 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473IDGQG4 ACTIVE MSOPPower PAD DGQ 10 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473IDGQR ACTIVE MSOPPower PAD DGQ 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473IDGQRG4 ACTIVE MSOPPower PAD DGQ 10 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2473IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2473INE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2474AID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474AIDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474AIDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474AIN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Level-NC-NC-NC TLV2474AINE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Level-NC-NC-NC TLV2474AIPWP ACTIVE HTSSOP PWP 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2474AIPWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Addendum-Page 4 Lead/Ball Finish MSL Peak Temp (3) Level-NC-NC-NC PACKAGE OPTION ADDENDUM www.ti.com 4-Nov-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2474AIPWPRG4 ACTIVE HTSSOP PWP 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2474AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474CD ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474CDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Level-NC-NC-NC TLV2474CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Level-NC-NC-NC TLV2474CPWP ACTIVE HTSSOP PWP 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2474CPWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2474CPWPRG4 ACTIVE HTSSOP PWP 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2474ID ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474IDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2474IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Level-NC-NC-NC TLV2474INE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Level-NC-NC-NC TLV2474IPWP ACTIVE HTSSOP PWP 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2474IPWPG4 ACTIVE HTSSOP PWP 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2474IPWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2474IPWPRG4 ACTIVE HTSSOP PWP 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2475AIDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2475AIN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2475AINE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC TLV2475AIPWP ACTIVE HTSSOP PWP 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2475AIPWPR ACTIVE HTSSOP PWP 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2475AIPWPRG4 ACTIVE HTSSOP PWP 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV2475CD ACTIVE SOIC D 16 CU NIPDAU Level-1-260C-UNLIM 50 50 40 Addendum-Page 5 Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 4-Nov-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2475CDR ACTIVE SOIC D 16 TLV2475CN ACTIVE PDIP N 16 25 TLV2475CNE4 ACTIVE PDIP N 16 25 TLV2475CPWPR ACTIVE HTSSOP PWP 16 TLV2475IDR ACTIVE SOIC D 16 TLV2475IN ACTIVE PDIP N 16 25 TLV2475INE4 ACTIVE PDIP N 16 25 TLV2475IPWPR ACTIVE HTSSOP PWP 16 TLV2475IPWPRG4 ACTIVE HTSSOP PWP 16 2500 Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) CU NIPDAU Level-1-260C-UNLIM Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 6 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 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