SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
20
2Y4
1A1
1OE
VCC
1
19 2OE
18 1Y1
2
3
17 2A4
16 1Y2
4
5
15 2A3
14 1Y3
6
7
SN54LVTH240 . . . FK PACKAGE
(TOP VIEW)
1A2
2Y3
1A3
2Y2
1A4
13 2A2
12 1Y4
8
9
10
11
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
1Y1
2A4
1Y2
2A3
1Y3
2Y1
GND
2A1
1Y4
2A2
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
Need for External Pullup/Pulldown
Resistors
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
SN74LVTH240 . . . RGY PACKAGE
(TOP VIEW)
VCC
SN54LVTH240 . . . J OR W PACKAGE
SN74LVTH240 . . . DB, DW, NS,
OR PW PACKAGE
(TOP VIEW)
D
2A1
D
D
1OE
D
GND
D
D Bus Hold on Data Inputs Eliminates the
Input and Output Voltages With 3.3-V VCC)
Support Unregulated Battery Operation
Down to 2.7 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Ioff and Power-Up 3-State Support Hot
Insertion
2OE
D Support Mixed-Mode Signal Operation (5-V
description/ordering information
These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V system environment.
ORDERING INFORMATION
QFN − RGY
SN74LVTH240RGYR
Tube
SN74LVTH240DW
Tape and reel
SN74LVTH240DWR
SOP − NS
Tape and reel
SN74LVTH240NSR
LVTH240
SSOP − DB
Tape and reel
SN74LVTH240DBR
LXH240
Tube
SN74LVTH240PW
Tape and reel
SN74LVTH240PWR
TSSOP − PW
VFBGA − GQN
VFBGA − ZQN (Pb-free)
−55°C
125°C
−55
C to 125
C
TOP-SIDE
MARKING
Tape and reel
SOIC − DW
−40°C
−40
C to 85
85°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
LXH240
LVTH240
LXH240
SN74LVTH240GQNR
Tape and reel
SN74LVTH240ZQNR
LXH240
CDIP − J
Tube
SNJ54LVTH240J
SNJ54LVTH240J
CFP − W
Tube
SNJ54LVTH240W
SNJ54LVTH240W
LCCC − FK
Tube
SNJ54LVTH240FK
SNJ54LVTH240FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
!"#$%! & '("")% $& ! *(+,'$%! -$%)
"!-('%& '!!"# %! &*)''$%!& *)" %.) %)"#& ! )/$& &%"(#)%&
&%$-$"- 0$""$%1 "!-('%! *"!')&&2 -!)& !% )')&&$",1 ',(-)
%)&%2 ! $,, *$"$#)%)"&
*"!-('%& '!#*,$% %! 34 $,, *$"$#)%)"& $") %)&%)(,)&& !%.)"0&) !%)- $,, !%.)" *"!-('%& *"!-('%!
*"!')&&2 -!)& !% )')&&$",1 ',(-) %)&%2 ! $,, *$"$#)%)"&
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003
description/ordering information (continued)
These devices are organized as two 4-bit buffer/line drivers with separate output-enable (OE) inputs. When OE
is low, the devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
SN74LVTH240 . . . GQN OR ZQN PACKAGE
(TOP VIEW)
1
2
3
terminal assignments
4
1
2
3
4
A
A
1A1
1OE
B
1A2
2A4
VCC
2Y4
2OE
B
C
C
1A3
2Y3
2A3
1Y2
D
D
1A4
2A2
2Y2
1Y3
E
E
GND
2Y1
2A1
1Y4
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
2
OUTPUT
Y
OE
A
L
H
L
L
L
H
H
X
Z
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1Y1
SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
1
2OE
2
18
4
16
6
14
8
12
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
19
11
9
13
7
15
5
17
3
2Y1
2Y2
2Y3
2Y4
Pin numbers shown are for the DB, DW, FK, J, NS, PW, RGY, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high state, VO (see Note 1) . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Current into any output in the low state, IO: SN54LVTH240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74LVTH240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Current into any output in the high state, IO (see Note 2): SN54LVTH240 . . . . . . . . . . . . . . . . . . . . . . . 48 mA
SN74LVTH240 . . . . . . . . . . . . . . . . . . . . . . . 64 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
(see Note 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
(see Note 3): GQN/ZQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . 78°C/W
(see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and VO > VCC.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003
recommended operating conditions (see Note 5)
SN54LVTH240
SN74LVTH240
MIN
MAX
MIN
MAX
2.7
3.6
2.7
3.6
UNIT
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
0.8
0.8
Input voltage
5.5
5.5
V
IOH
IOL
High-level output current
−24
−32
mA
48
64
mA
∆t/∆v
Input transition rise or fall rate
10
10
ns/V
∆t/∆VCC
TA
Power-up ramp rate
200
Operating free-air temperature
−55
High-level input voltage
2
Low-level output current
Outputs enabled
2
V
−40
V
µs/V
200
125
V
85
°C
NOTE 5: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
VCC = 2.7 V,
VCC = 2.7 V to 3.6 V,
II = −18 mA
IOH = −100 µA
VCC = 2.7 V,
IOH = −8 mA
IOH = −24 mA
VCC = 3 V
VCC = 2.7 V
VOL
VCC = 3 V
Control inputs
II
Data inputs
Ioff
II(hold)
Data inputs
VCC = 0 or 3.6 V,
VCC = 3.6 V,
VCC = 3.6 V
SN54LVTH240
TYP†
MAX
MIN
SN74LVTH240
TYP†
MAX
MIN
−1.2
VCC−0.2
2.4
−1.2
V
VCC−0.2
2.4
V
2
IOH = −32 mA
IOL = 100 µA
2
0.2
0.2
IOL = 24 mA
IOL = 16 mA
0.5
0.5
0.4
0.4
IOL = 32 mA
IOL = 48 mA
0.5
0.5
V
0.55
IOL = 64 mA
VI = 5.5 V
0.55
VI = VCC or GND
VI = VCC
VI = 0
VCC = 0, VI or VO = 0 to 4.5 V
VI = 0.8 V
VCC = 3 V
VI = 2 V
UNIT
10
10
±1
±1
1
1
−5
A
µA
−5
±100
75
75
−75
−75
500
−750
µA
µA
VCC = 3.6 V‡,
VI = 0 to 3.6 V
IOZH
IOZL
VCC = 3.6 V,
VCC = 3.6 V,
VO = 3 V
VO = 0.5 V
5
5
µA
−5
−5
µA
IOZPU
VCC = 0 to 1.5 V, VO = 0.5 V to 3 V,
OE = don’t care
±100∗
±100
µA
IOZPD
VCC = 1.5 V to 0, VO = 0.5 V to 3 V,
OE = don’t care
±100∗
±100
µA
0.19
0.19
ICC
VCC = 3.6 V,
IO = 0,
VI = VCC or GND
5
5
0.19
0.19
0.2
0.2
∆ICC§
Ci
Outputs high
Outputs low
Outputs disabled
VCC = 3 V to 3.6 V,
One input at VCC − 0.6 V,
Other inputs at VCC or GND
VI = 3 V or 0
3
3
mA
mA
pF
Co
VO = 3 V or 0
7
7
pF
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.
† All typical values are at VCC = 3.3 V, TA = 25°C.
‡ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
§ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
SN54LVTH240
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
VCC = 3.3 V
± 0.3 V
SN74LVTH240
VCC = 2.7 V
VCC = 2.7 V
MIN
MAX
MAX
MIN
TYP†
MAX
0.9
4.3
5.1
1.1
2.2
3.8
4.6
1.2
4.7
4.9
1.3
2.6
4
4.2
MIN
MIN
1
5.7
6.7
1.1
2.6
4.6
5.6
5.5
6.2
1.4
2.7
4.4
5
1
5.1
5.2
2
2.9
4.4
4.6
1.1
5.4
5.4
1.8
3
4.3
4.3
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
MAX
1.2
† All typical values are at VCC = 3.3 V, TA = 25°C.
6
VCC = 3.3 V
± 0.3 V
ns
ns
ns
SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003
PARAMETER MEASUREMENT INFORMATION
500 Ω
From Output
Under Test
6V
Open
S1
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
2.7 V
LOAD CIRCUIT
Timing Input
1.5 V
0V
tw
tsu
2.7 V
Input
1.5 V
1.5 V
th
2.7 V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
2.7 V
1.5 V
Input
1.5 V
0V
VOH
Output
1.5 V
1.5 V
VOL
1.5 V
tPLZ
3V
1.5 V
tPZH
VOH
Output
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
0V
Output
Waveform 1
S1 at 6 V
(see Note B)
tPLH
tPHL
1.5 V
tPZL
tPHL
tPLH
2.7 V
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
MCFP006B − JANUARY 1995 − REVISED JULY 2003
W (R-GDFP-F20)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.300 (7,62)
0.245 (6,22)
0.045 (1,14)
0.026 (0,66)
0.009 (0,23)
0.004 (0,10)
0.100 (2,54)
0.045 (1,14)
0.320 (8,13) MAX
1
0.022 (0,56)
0.015 (0,38)
20
0.050 (1,27)
0.540 (13,72)
MAX
0.005 (0,13) MIN
4 Places
10
11
0.370 (9,40)
0.250 (6,35)
0.370 (9,40)
0.250 (6,35)
4040180-4 /D 07/03
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only.
Falls within Mil-Std 1835 GDFP2-F20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MPBG133C – APRIL 2000 – REVISED AUGUST 2002
GQN (R-PBGA-N20)
PLASTIC BALL GRID ARRAY
1,95 TYP
3,10
2,90
0,65
0,325
0,65
E
D
4,10
3,90
2,60
C
B
A
1
A1 Corner
2
3
4
Bottom View
1,00 MAX
0,08
Seating Plane
20×
0,45
0,35
0,25
0,15
0,05 M
4200704/D 07/2002
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
MicroStar Juniort configuration
Falls within JEDEC MO-225 variation BC.
This package is tin-lead (SnPb). Refer to the 20 ZQN package (drawing 4204492) for lead-free.
MicroStar Junior is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MPBG297 – JULY 2002
ZQN (R-PBGA-N20)
PLASTIC BALL GRID ARRAY
1,95
0,65
3,10
2,90
0,325
0,65
E
D
4,10
3,90
2,60
C
B
A
1
2
3
4
Bottom View
A1 Corner
1,00 Max
0,08
Seating Plane
20×
0,45
0,35
0,05 M
0,25
0,15
4204492/A 06/2002
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
MicroStar Junior configuration.
Fall within JEDEC MO-225 variation BC.
This package is lead-free. Refer to the 20 GQN package (drawing 4200704) for tin-lead )SnPb).
MicroStar Junior is a trademark of Texas Instruments.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MSOI003E – JANUARY 1995 – REVISED SEPTEMBER 2001
DW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
16 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
9
0.050 (1,27)
16
0.010 (0,25)
0.419 (10,65)
0.400 (10,15)
0.010 (0,25) NOM
0.299 (7,59)
0.291 (7,39)
Gage Plane
0.010 (0,25)
1
8
0°– 8°
0.050 (1,27)
0.016 (0,40)
A
Seating Plane
0.104 (2,65) MAX
0.012 (0,30)
0.004 (0,10)
PINS **
0.004 (0,10)
16
18
20
24
28
A MAX
0.410
(10,41)
0.462
(11,73)
0.510
(12,95)
0.610
(15,49)
0.710
(18,03)
A MIN
0.400
(10,16)
0.453
(11,51)
0.500
(12,70)
0.600
(15,24)
0.700
(17,78)
DIM
4040000/E 08/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MS-013
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Amplifiers
Applications
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2003, Texas Instruments Incorporated