LT3791-1 60V 4-Switch Synchronous Buck-Boost Controller Features Description 4-Switch Single Inductor Architecture Allows VIN Above, Below or Equal to VOUT n Synchronous Switching: Up to 98.5% Efficiency n Wide V Range: 4.7V to 60V IN n2% Output Voltage Accuracy: 1.2V ≤ V OUT < 60V n6% Output Current Accuracy: 0V ≤ V OUT < 60V n Input and Output Current Regulation with Current Monitor Outputs n No Top FET Refresh in Buck or Boost n V OUT Disconnected from VIN During Shutdown n C/10 Charge Termination and Output Shorted Flags n Capable of 100W or greater per IC n38-Lead TSSOP with Exposed Pad The LT®3791-1 is a synchronous 4-switch buck-boost voltage/current regulator controller. The controller can regulate output voltage, output current, or input current with input voltages above, below, or equal to the output voltage. The constant-frequency, current mode architecture allows its frequency to be adjusted or synchronized from 200kHz to 700kHz. No top FET refresh switching cycle is needed in buck or boost operation. With 60V input, 60V output capability and seamless transitions between operating regions, the LT3791-1 is ideal for voltage regulator, battery/super-capacitor charger applications in automotive, industrial, telecom, and even battery-powered systems. n The LT3791-1 provides input current monitor, output current monitor, and various status flags, such as C/10 charge termination and shorted output flag. Applications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Automotive, Telecom, Industrial Systems n High Power Battery-Powered System n Typical Application 120W (24V 5A) Buck-Boost Voltage Regulator 0.003Ω VIN 1µF 50Ω IVINP TEST1 499k 0.1µF TG1 0.1µF SWI OVLO 56.2k BG1 INTVCC 27.4k 100k LT3791-1 200k 47µF 80V 220µF 35V 0.015Ω 4.7µF 50V ×2 10µH 3.83k SNSN PGND CTRL SS SYNC V C RT 5.1k 33nF 10nF SGND 100 95 90 85 80 75 70 VIN = 12V VIN = 24V VIN = 54V 65 BG2 SW2 TG2 ISP ISN FB Efficiency vs Load Current VOUT 24V 5A 73.2k 0.004Ω PWM 100k + SNSP SHORT C/10 CCM IVINMON ISMON CLKOUT PWMOUT VREF 0.1µF + BST1 EN/UVLO 4.7µF 100V 4.7µF BST2 IVINN 470nF 499k INTVCC EFFICIENCY (%) VIN 12V TO 58V 60 0 1 2 3 LOAD CURRENT (A) 4 5 37911 TA01b 37911 TA01a 147k 200kHz 37911f 1 LT3791-1 Absolute Maximum Ratings (Note 1) Pin Configuration Supply Voltages Input Supply (VIN)......................................................60V SW1, SW2.......................................................–1V to 60V C/10, SHORT..............................................................15V EN/UVLO, IVINP, IVINN, ISP, ISN...............................60V INTVCC, (BST1-SW1), (BST2-SW2)..............................6V CCM, SYNC, RT, CTRL, OVLO, PWM...........................6V IVINMON, ISMON, FB, SS, VC, VREF............................6V IVINP-IVINN, ISP-ISN, SNSP-SNSN........................±0.5V SNSP, SNSN............................................................±0.3V Operating Junction Temperature (Notes 2, 3) LT3791E-1/LT3791I-1.......................... –40°C to 125°C LT3791H-1.......................................... –40°C to 150°C LT3791MP-1....................................... –55°C to 150°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec).................... 300°C TOP VIEW CTRL 1 38 OVLO SS 2 37 FB PWM 3 36 VC C/10 4 35 RT SHORT 5 34 SYNC VREF 6 33 CLKOUT ISMON 7 32 CCM IVINMON 8 31 PWMOUT EN/UVLO 9 IVINP 10 30 SGND 39 SGND 29 TEST1 IVINN 11 28 SNSN VIN 12 27 SNSP INTVCC 13 26 ISN TG1 14 25 ISP BST1 15 24 TG2 SW1 16 23 NC PGND 17 22 BST2 BG1 18 21 SW2 BG2 19 20 PGND FE PACKAGE 38-LEAD PLASTIC TSSOP TJMAX = 150°C, θJA = 28°C/W EXPOSED PAD (PIN 39) IS SGND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3791EFE-1#PBF LT3791EFE-1#TRPBF LT3791FE-1 38-Lead Plastic TSSOP –40°C to 125°C LT3791IFE-1#PBF LT3791IFE-1#TRPBF LT3791FE-1 38-Lead Plastic TSSOP –40°C to 125°C LT3791HFE-1#PBF LT3791HFE-1#TRPBF LT3791FE-1 38-Lead Plastic TSSOP –40°C to 150°C LT3791MPFE-1#PBF LT3791MPFE-1#TRPBF LT3791FE-1 38-Lead Plastic TSSOP –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Electrical Characteristics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Input VIN Operating Voltage 4.7 60 V VIN Shutdown IQ VEN/UVLO = 0V 0.1 1 µA VIN Operating IQ (Not Switching) FB = 1.3V, RT = 59.0k 3.0 4 mA 37911f 2 LT3791-1 Electrical Characteristics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX 1.16 1.2 1.24 UNITS Logic Inputs EN/UVLO Falling Threshold l EN/UVLO Rising Hysteresis 15 EN/UVLO Input Low Voltage IVIN Drops Below 1µA EN/UVLO Pin Bias Current Low VEN/UVLO = 1V EN/UVLO Pin Bias Current High VEN/UVLO = 1.6V 2 CCM Threshold Voltage CTRL Input Bias Current 0.3 V 3 4 µA 10 100 nA 1.5 V 0.3 VCTRL = 1V 20 CTRL Latch-Off Threshold 50 175 OVLO Rising Shutdown Voltage l 2.85 OVLO Falling Hysteresis V mV 3 nA mV 3.15 75 V mV Regulation VREF Voltage l VREF Line Regulation 4.7V < VIN < 60V V(ISP-ISN) Threshold VCTRL = 2V 1.96 2.00 2.04 V 0.002 0.04 %/V l 97.5 94 100 100 102.5 106 mV mV l 87 84 90 90 93 96 mV mV l 47.5 46 50 50 52.5 54 mV mV l 6.5 5 10 10 13.5 15 mV mV VCTRL = 1100mV VCTRL = 700mV VCTRL = 300mV ISP Bias Current 110 µA ISN Bias Current 20 µA Output Current Sense Common Mode Range 0 Output Current Sense Amplifier gm 60 890 ISMON Monitor Voltage V(ISP-ISN) = 100mV l 0.96 1 1.04 Input Current Sense Threshold V(IVINP-IVINN) 3V ≤ VIVINP ≤ 60V l 46.5 50 54 IVINP Bias Current 90 IVINN Bias Current 20 Input Current Sense Common Mode Range 3 Input Current Sense Amplifier gm IVINMON Monitor Voltage µA 60 mS 0.96 1 1.04 V l 1.194 1.176 1.2 1.2 1.206 1.220 V V 0.002 0.025 %/V 4.7V < VIN < 60V FB Amplifier gm 565 FB Pin Input Bias Current FB in Regulation VC Standby Input Bias Current PWM = 0V VSENSE(MAX) (VSNSP-SNSN) Boost Buck V l FB Regulation Voltage FB Line Regulation V mV µA 2.12 V(IVINP-IVINN) = 50mV V µS 100 –20 l l 42 –56 51 –47.5 µS 150 nA 20 nA 60 –39 mV mV Fault SS Pull-Up Current SS Discharge Current VSS = 0V 14 µA 1.4 µA 37911f 3 LT3791-1 Electrical Characteristics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VEN/UVLO = 12V unless otherwise noted. PARAMETER CONDITIONS C/10 Rising Threshold (VFB) V(ISP-ISN) = 0V C/10 Falling Threshold (VFB) C/10 Falling Threshold (V(ISP-ISN)) VFB = 1.2V MIN TYP MAX UNITS l 1.127 1.15 1.173 V l 1.078 1.1 1.122 V 5 10 15 mV 380 400 450 mV C/10 Pin Output Impedance 1.1 2.0 kΩ SHORT Pin Output Impedance 1.1 2.0 kΩ SS Latch-Off Threshold 1.75 V SS Reset Threshold 0.2 V SHORT Falling Threshold (VFB) Oscillator Switching Frequency RT = 147k RT = 59.0k RT = 29.1k SYNC Frequency 190 380 665 200 400 700 200 SYNC Pin Resistance to GND 210 420 735 kHz kHz kHz 700 kHz 90 SYNC Threshold Voltage 0.3 kΩ 1.5 V 5 5.2 V 240 350 mV 3.5 3.9 V Internal VCC Regulator INTVCC Regulation Voltage Dropout (VIN – INTVCC) 4.8 IINTVCC = –10mA, VIN = 5V INTVCC Undervoltage Lockout INTVCC Current Limit 3.1 VINTVCC = 4V 67 mA PWM PWM Threshold Voltage 0.3 1.5 V PWM Pin Resistance to GND 90 kΩ PWMOUT Pull-Up Resistance 10 20 Ω PWMOUT Pull-Down Resistance 5 10 Ω NMOS Drivers TG1, TG2 Gate Driver On-Resistance Gate Pull-Up Gate Pull-Down VBST – VSW = 5V BG1, BG2 Gate Driver On-Resistance Gate Pull-Up Gate Pull-Down VINTVCC = 5V TG Off to BG On Delay BG Off to TG On Delay TG1, TG2, tOFF(MIN) 2.6 1.7 Ω Ω 3 1.2 Ω Ω CL = 3300pF 60 ns CL = 3300pF 60 ns RT = 59.0k 220 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3791E-1 is guaranteed to meet performance from 0°C to 125°C junction temperature. Specification over the -40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3791I-1 is guaranteed to meet performance specifications over the –40°C to 125°C operating junction temperature range. The LT3791H-1 is guaranteed to meet performance specifications over the –40°C to 150°C 260 ns operating junction temperature range. The LT3791MP-1 is guaranteed to meet performance specifications over the –55°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated for junction temperatures greater than 125°C. Note 3: The LT3791-1 includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed the maximum operating junction temperature when overtemperature protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability. 37911f 4 LT3791-1 Typical Performance Characteristics INTVCC Dropout Voltage vs Current, Temperature 80 5.15 5.10 1.5 INTVCC (V) VIN-VINTVCC (V) 90 5.20 TA = 150°C TA = 25°C TA = –50°C 2.0 INTVCC Current Limit vs Temperature INTVCC Voltage vs Temperature INTVCC CURRENT LIMIT (mA) 2.5 TA = 25°C, unless otherwise noted. 1.0 5.05 VIN = 60V 5.00 VIN = 12V 4.95 4.90 0.5 4.85 0 20 10 0 30 LDO CURRENT (mA) 0 37911 G01 50 40 30 20 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) VREF Voltage vs Temperature VREF Load Regulation 5.75 2.03 2.15 5.50 2.02 2.10 5.25 2.01 2.05 2.00 4.75 1.99 4.50 1.98 4.25 10 20 30 40 50 60 1.96 –50 –25 70 1.80 25 50 75 100 125 150 TEMPERATURE (°C) 80 V(ISP-ISN) (mV) 70 60 50 40 30 20 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VCTRL (V) 37911 G07 0 50 V(ISP-ISN) Threshold vs Temperature 108 108 106 106 104 104 102 100 98 100 98 96 94 94 0 10 20 40 30 VISP (V) 50 60 37911 G08 VIN = 12V 102 96 92 100 150 200 250 300 350 400 IREF (µA) 37911 G06 V(ISP-ISN) Threshold vs VISP 90 V(ISP-ISN) (mV) 1.85 37911 G05 V(ISP-ISN) Threshold vs VCTRL 0 0 37911 G04 100 0 1.90 VIN = 60V VIN = 12V VIN = 4.7V V(ISP-ISN) (mV) 0 2.00 1.95 1.97 ILOAD (mA) 110 VREF (V) 2.20 VREF (V) 2.04 4.00 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G03 6.00 5.00 0 37911 G02 INTVCC Load Regulation INTVCC (V) 60 10 4.80 –50 –25 40 70 92 –50 –25 VISP = 60V VISP = 12V VISP = 0V 0 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G09 37911f 5 LT3791-1 Typical Performance Characteristics 120 V(ISP-ISN) Threshold vs VFB TA = 25°C, unless otherwise noted. ISMON Voltage vs Temperature 1.04 VIN = 12V V(ISP-ISN) = 100mV 1.03 100 1.0 0.9 0.8 60 40 0.7 1.01 VISMON (V) VISMON (V) V(ISP-ISN) (mV) 1.02 80 1.00 0.99 1.19 1.18 1.20 1.21 VFB (V) 1.22 0 25 50 75 100 125 150 TEMPERATURE (°C) V(IVINP-IVINN) Threshold vs VIVINP 1.04 54 51.5 1.03 51.0 1.02 50.5 1.01 50 VIVINP = 3V 48 46 44 42 –50 –25 0 50.0 49.5 48.5 0.97 10 20 30 40 VIVINP (V) 37911 G13 50 50 40 0.500 1.23 0.475 1.22 0.450 VFB (V) 1.20 1.18 10 1.20 1.21 VFB (V) 1.22 1.23 37911 G16 1.16 –50 –25 RISING 0.425 0.400 FALLING 0.375 0.350 VIN = 60V VIN = 12V VIN = 4.7V 1.17 1.19 37911 G15 1.24 1.19 20 25 50 75 100 125 150 TEMPERATURE (°C) SHORT Threshold vs Temperature 1.21 30 0 37911 G14 FB VOLTAGE (V) 60 1.18 0.96 –50 –25 60 FB Regulation Voltage vs Temperature V(IVINP-IVINN) Threshold vs VFB 0 1.17 0.99 0.98 0 VIVINP = 12V V(IVINP-VINN) = 50mV 1.00 49.0 48.0 25 50 75 100 125 150 TEMPERATURE (°C) VIVINMON (V) 52.0 VIVINP = 60V 10 20 30 40 50 60 70 80 90 100 V(ISP-ISN) (mV) IVINMON Voltage vs Temperature 56 52 0 37911 G12 37911 G11 V(IVINP-IVINN) (mV) V(IVINP-IVINN) (mV) 0 37911 G10 V(IVINP-IVINN) Threshold vs Temperature V(IVINP-IVINSN) (mV) 0.4 0.1 0.96 –50 –25 1.23 0.5 0.2 0.97 0 1.17 0.6 0.3 0.98 20 ISMON Voltage vs V(ISP-ISN) 0 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G17 0.325 0.300 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G18 37911f 6 LT3791-1 Typical Performance Characteristics C/10 Threshold vs Temperature OVLO Threshold vs Temperature 1.125 FALLING 1.100 1.075 1.050 1.025 1.000 –50 –25 0 16 3.2 14 3.1 12 RISING 3.0 2.9 FALLING 2.7 4 2.6 2 0 Supply Current vs Input Voltage 7 IQ (mA) 2.0 1.5 1.0 TA = 150°C TA = 25°C TA = –50°C 0 0 10 20 30 VIN (V) 40 50 60 5 4 3 2 RT = 59.0k RT = 147k 200 100 0 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G25 RISING 1.20 1.18 FALLING 1.16 1.14 1.12 0 –50 –25 1.10 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 0 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G23 TG1, TG2 MINIMUM ON-TIME (ns) SWITCHING FREQUENCY (kHz) 600 300 1.22 37911 G24 TG1, TG2 Minimum On-Time vs Temperature RT = 29.1k 400 1.26 1.24 1 100 500 1.28 37911 G22 800 0 –50 –25 VEN/ULO = 1V 6 Oscillator Frequency vs Temperature 700 EN/UVLO Threshold Voltage 1.30 EN/UVLO THRESHOLD (V) EN/UVLO PIN CURRENT (µA) 3.5 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G21 EN/UVLO Pin Current 8 2.5 0 37911 G20 4.0 3.0 DISCHARGING 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G19 0.5 8 6 2.5 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) CHARGING 10 2.8 TG1, TG2 Minimum Off-Time vs Temperature 350 TG2 90 TG1, TG2 MINIMUM OFF-TIME (ns) FB VOLTAGE (V) 1.150 OVLO THRESHOLD (V) RISING Soft-Start Current vs Temperature 3.3 ISS (µA) 1.200 1.175 TA = 25°C, unless otherwise noted. TG1 80 70 60 50 40 30 20 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G26 300 fSW = 200kHz 250 fSW = 400kHz 200 fSW = 700kHz 150 100 50 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G27 37911f 7 LT3791-1 Typical Performance Characteristics BG1, BG2 Driver On-Resistance vs Temperature 4.5 3.8 4.0 RISING 3.7 3.6 3.5 3.4 FALLING 3.3 3.2 4.0 3.5 PULL-UP 3.5 3.0 2.5 2.0 PULL-DOWN 1.5 1.0 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 0 37911 G28 PWMOUT RESISTANCE (Ω) 14 1.6 12 1.4 1.0 25 50 75 100 125 150 TEMPERATURE (°C) V(SNSP-SNSN) Buck Threshold vs VC VC (V) 60 40 BG2 1.0 PULL-DOWN 0 37911 G30 V(SNSP-SNSN) = 0V 1.2 PULL-UP 6 1.5 VC Voltage vs Duty Cycle 8 PULL-DOWN 2.0 37911 G29 PWMOUT On-Resistance vs Temperature 10 2.5 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) V(SNSP-SNSN) (mV) 0 PULL-UP 3.0 0.5 0.5 3.1 –50 –25 BG1 0.8 0.6 4 20 0 –20 0.4 2 –40 0.2 0 –50 –25 0 25 50 0 75 100 125 150 TEMPERATURE (°C) 0 20 40 60 DUTY CYCLE (%) 80 V(SNSP-SNSN) Buck Threshold vs Temperature V(SNSP-SNSN) (mV) 20 0 –20 VC(MAX) –60 –50 –25 0 60 60 40 40 20 0 –20 –40 –60 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G34 –80 0.6 0.8 1.0 1.2 VC (V) 1.4 1.0 0.8 1.2 VC (V) 1.4 1.6 1.8 37911 G33 V(SNSP-SNSN) Boost Threshold vs Temperature V(SNSP-SNSN) THRESHOLD (mV) VC(MIN) –40 0.6 V(SNSP-SNSN) Boost Threshold vs VC 60 40 –60 100 37911 G32 37911 G31 V(SNSP-SNSN) THRESHOLD (mV) TG1, TG2 Driver On-Resistance vs Temperature TG1, TG2 RESISTANCE (Ω) 3.9 BG1, BG2 RESISTANCE (Ω) V(BST1-SW1), V(BST2,SW2) (V) V(BST1-SW1), V(BST2-SW2) UVLO vs Temperature TA = 25°C, unless otherwise noted. 1.6 1.8 37911 G35 VC(MAX) 20 0 –20 –40 –60 –80 –50 –25 VC(MIN) 0 25 50 75 100 125 150 TEMPERATURE (°C) 37911 G36 37911f 8 LT3791-1 Pin Functions CTRL (Pin 1): Output Current Sense Threshold Adjustment Pin. Regulating threshold V(ISP-ISN) is 1/10th of (VCTRL – 200mV). CTRL linear range is from 200mV to 1.1V. For VCTRL > 1.3V, the current sense threshold is constant at the full-scale value of 100mV. For 1.1V < VCTRL < 1.3V, the dependence of the current sense threshold upon VCTRL transitions from a linear function to a constant value, reaching 98% of full scale by VCTRL = 1.2V. Connect CTRL to VREF for the 100mV default threshold. Force less than 175mV (typical) to stop switching. Do not leave this pin open. EN/UVLO (Pin 9): Enable Control Pin. Forcing an accurate 1.2V falling threshold with an externally programmable hysteresis is generated by the external resistor divider and a 3µA pull-down current. Above the 1.2V (typical) threshold (but below 6V), EN/UVLO input bias current is sub-µA. Below the falling threshold, a 3µA pull-down current is enabled so the user can define the hysteresis with the external resistor selection. An undervoltage condition resets soft-start. Tie to 0.3V, or less, to disable the device and reduce VIN quiescent current below 1µA. SS (Pin 2): Soft-start reduces the input power sources surge current by gradually increasing the controller’s current limit. A minimum value of 22nF is recommended on this pin. A 100k resistor must be placed between SS and VREF for the LT3791-1. IVINP (Pin 10): Positive Input for the Input Current Limit and Monitor. Input bias current for this pin is typically 90µA. PWM (Pin 3): A signal low turns off switches, idles switching and disconnects the VC pin from all external loads. The PWMOUT pin follows the PWM pin. PWM has an internal 90k pull-down resistor. If not used, connect to INTVCC. VIN (Pin 12): Main Input Supply. Bypass this pin to PGND with a capacitor. C/10 (Pin 4): C/10 Charge Termination Pin. An open-drain pull-down on C/10 asserts if FB is greater than 1.15V (typical) and V(ISP-ISN) is less than 10mV (typical). To function, the pin requires an external pull-up resistor. SHORT (Pin 5): Output Shorted Pin. An open-drain pulldown on SHORT asserts if FB is less than 400mV (typical). To function, the pin requires an external pull-up resistor. VREF (Pin 6): Voltage Reference Output Pin, Typically 2V. This pin drives a resistor divider for the CTRL pin, either for output current adjustment or for temperature limit/ compensation of the output load. Can supply up to 200µA of current. ISMON (Pin 7): Monitor pin that produces a voltage that is ten times the voltage V(ISP-ISN). ISMON will equal 1V when V(ISP-ISN) = 100mV. IVINMON (Pin 8): Monitor pin that produces a voltage that is twenty times the voltage V(IVINP-IVINN). IVINMON will equal 1V when V(IVINP-IVINN) = 50mV. IVINN (Pin 11): Negative Input for the Input Current Limit and Monitor. The input bias current for this pin is typically 20µA. INTVCC (Pin 13): Internal 5V Regulator Output. The driver and control circuits are powered from this voltage. Bypass this pin to PGND with a minimum 4.7µF ceramic capacitor. TG1 (Pin 14): Top Gate Drive. Drives the top N-channel MOSFET with a voltage equal to INTVCC superimposed on the switch node voltage SW1. BST1 (Pin 15): Bootstrapped Driver Supply. The BST1 pin swings from a diode voltage below INTVCC up to a diode voltage below VIN + INTVCC. SW1 (Pin 16): Switch Node. SW1 pin swings from a diode voltage drop below ground up to VIN. PGND (Pins 17, 20): Power Ground. Connect these pins closely to the source of the bottom N-channel MOSFET. BG1 (Pin 18): Bottom Gate Drive. Drives the gate of the bottom N-channel MOSFET between ground and INTVCC. BG2 (Pin 19): Bottom Gate Drive. Drives the gate of the bottom N-channel MOSFET between ground and INTVCC. SW2 (Pin 21): Switch Node. SW2 pin swings from a diode voltage drop below ground up to VOUT. 37911f 9 LT3791-1 Pin Functions BST2 (Pin 22): Bootstrapped Driver Supply. The BST2 pin swings from a diode voltage below INTVCC up to a diode voltage below VOUT + INTVCC. NC (Pin 23): No Connect Pin. Leave this pin floating. TG2 (Pin 24): Top Gate Drive. Drives the top N-channel MOSFET with a voltage equal to INTVCC superimposed on the switch node voltage SW2. ISP (Pin 25): Connection Point for the Positive Terminal of the Output Current Feedback Resistor. ISN (Pin 26): Connection Point for the Negative Terminal of the Output Current Feedback Resistor. SNSP (Pin 27): The Positive Input to the Current Sense Comparator. The VC pin voltage and controlled offsets between the SNSP and SNSN pins, in conjunction with a resistor, set the current trip threshold. SNSN (Pin 28): The Negative Input to the Current Sense Comparator. TEST1 (Pin 29): This pin is used for testing purposes only and must be connected to SGND for the part to operate properly. SGND (Pin 30, Exposed Pad Pin 39): Signal Ground. All small-signal components and compensation should connect to this ground, which should be connected to PGND at a single point. Solder the exposed pad directly to the ground plane. PWMOUT (Pin 31): Buffered Version of PWM Signal for Driving Output Load Disconnect N-Channel MOSFET. The PWMOUT pin is driven from INTVCC. Use of a MOSFET with a gate cutoff voltage higher than 1V is recommended. CCM (Pin 32): Continuous Conduction Mode Pin. When the pin voltage is higher than 1.5V, the part runs in fixed frequency forced continuous conduction mode and allows the inductor current to flow negative. When the pin voltage is less than 0.3V, the part runs in discontinuous conduction mode and does not allow the inductor current to flow backward. This pin is only meant to block inductor reverse current, and should only be pulled low when the output current is low. This pin must be either connected to INTVCC (pin 13) for continuous conduction mode across all loads, or it must be connected to the C/10 (pin 4) with a pull-up resistor to INTVCC for continuous conduction mode at heavy load and for discontinuous conduction mode at light load. CLKOUT (Pin 33): Clock Output Pin. A 180° out-of-phase clock is provided at the oscillator frequency to allow for paralleling two devices for extending output power capability. SYNC (Pin 34): External Synchronization Input Pin. This pin is internally terminated to GND with a 90k resistor. The internal buck clock is synchronized to the rising edge of the SYNC signal while the internal boost clock is 180° phase shifted. RT (Pin 35): Frequency Set Pin. Place a resistor to GND to set the internal frequency. The range of oscillation is 200kHz to 700kHz. VC (Pin 36): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0.7V to 1.9V. FB (Pin 37): Voltage Loop Feedback Pin. FB is intended for constant-voltage regulation. The internal transconductance amplifier with output VC will regulate FB to 1.2V (typical) through the DC/DC converter. If the FB input is regulating the loop and V(ISP-ISN) < 10mV, the C/10 pull-down is asserted. If the FB pin is less than 400mV, the SHORT pull-down is asserted. OVLO (Pin 38): Overvoltage Input Pin. This pin is used for OVLO, if OVLO > 3V then SS is pulled low, the part stops switching and resets. Do not leave this pin open. 37911f 10 LT3791-1 Block Diagram 26 – + A = 10 7 8 9 A1 A = 10 A = 20 ISMON_INT A = 24 33 13 VREF INTVCC REGS SHDN_INT TSD IVINMON_INT BST1 + A13 A3 EN/UVLO – A4 SHDN_INT SHDN_INT SS_RESET SS LATCH PWM + INTVCC A14 BG1 A15 17 BG2 19 SLOPE_COMP_BOOST INTVCC RT BOOST LOGIC SYNC CLKOUT SW2 + A16 0.4V – + SNSP – SNSN A11 FB + C/10 + A8 A6 – Q R S VREF 0.2V 1.15V + SS LATCH 22 27 28 IVINMON_INT FB 37 1.2V A12 SS RESET – – + 14µA – 24 BST2 A10 + 21 TG2 – SHORT + + – ISMON_INT + 3V CTRL 1 A9 – 1.75V INTVCC PWM 18 PGND A5 3 16 BUCK LOGIC CCM SLOPE_COMP_BUCK 4 14 SW1 A7 5 15 TG1 – OSC 34 6 VIN IVINMON 1.2V 35 12 IVINN ISMON 3µA 32 11 IVINP + A2 10 ISN ISP – 25 A18 A17 PWMOUT 31 SGND 30, 39 1.4µA – 38 VC SS 2 OVLO 36 37911 BD 37911f 11 LT3791-1 Operation The LT3791-1 is a current mode controller that provides an output voltage above, equal to or below the input voltage. The LTC proprietary topology and control architecture uses a current sensing resistor in buck or boost operation. The sensed inductor current is controlled by the voltage on the VC pin, which is the output of the feedback amplifiers A11 and A12. The VC pin is controlled by three inputs, one input from the output current loop, one input from the input current loop, and the third input from the feedback loop. Whichever feedback input is higher takes precedence, forcing the converter into either a constant-current or a constant-voltage mode. The LT3791-1 is designed to transition cleanly between the two modes of operation. Current sense amplifier A1 senses the voltage between the IVINP and IVINN pins and provides a pre-gain to amplifier A11. When the voltage between IVINP and IVINN reaches 50mV, the output of A1 provides IVINMON_INT to the inverting input of A11 and the converter is in constant-current mode. If the current sense voltage exceeds 50mV, the output of A1 increases causing the output of A11 to decrease, thus reducing the amount of current delivered to the output. In this manner the current sense voltage is regulated to 50mV. The output current amplifier works similar to the input current amplifier but with a 100mV voltage instead of 50mV. The output current sense level is also adjustable by the CTRL pin. Forcing CTRL to less than 1.2V forces ISMON_INT to the same level as CTRL, thus providing current-level control. The output current amplifier provides rail-to-rail operation. Similarly if the FB pin goes above 1.2V the output of A11 decreases to reduce the current level and regulate the output (constant-voltage mode). The LT3791-1 provides monitoring pins IVINMON and ISMON that are proportional to the voltage across the input and output current amplifiers respectively. The main control loop is shut down by pulling the EN/ UVLO pin low. When the EN/UVLO pin is higher than 1.2V, an internal 14µA current source charges soft-start capacitor CSS at the SS pin. The VC voltage is then clamped a diode voltage higher than the SS voltage while the CSS is slowly charged during start-up. This soft-start clamping prevents abrupt current from being drawn from the input power supply. The top MOSFET drivers are biased from floating bootstrap capacitors C1 and C2, which are normally recharged through an external diode when the top MOSFET is turned off. A unique charge sharing technique eliminates top FET refresh switching cycle in buck or boost operation.Schottky diodes across the synchronous switch M4 and synchronous switch M2 are not required, but they do provide a lower drop during the dead time. The addition of the Schottky diode typically improves peak efficiency by 1% to 2% at 500kHz. Power Switch Control Figure 1 shows a simplified diagram of how the four power switches are connected to the inductor, VIN, VOUT and GND. Figure 2 shows the regions of operation for the LT3791-1 as a function of duty cycle D. The power switches are properly controlled so the transfer between regions is continuous. When VIN approaches VOUT, the buck-boost region is reached. Buck Region (VIN > VOUT) Switch M4 is always on and switch M3 is always off during this mode. At the start of every cycle, synchronous switch M2 is turned on first. Inductor current is sensed when synchronous switch M2 is turned on. After the sensed inductor current falls below the reference voltage, which is proportional to VC, synchronous switch M2 is turned off and switch M1 is turned on for the remainder of the cycle. Switches M1 and M2 will alternate, behaving like a typical VOUT VIN TG1 M1 SW1 BG1 M2 TG2 M4 L1 SW2 M3 BG2 RSENSE 37911 F01 Figure 1. Simplified Diagram of the Output Switches DMAX BOOST (BG2) DMIN BOOST DMAX BUCK (TG1) DMIN BUCK BOOST REGION BUCK-BOOST REGION BUCK REGION M1 ON, M2 OFF PWM M3, M4 SWITCHES 4-SWITCH PWM M4 ON, M3 OFF PWM M2, M1 SWITCHES 37911 F02 Figure 2. Operating Regions vs Duty Cycle 37911f 12 LT3791-1 Operation synchronous buck regulator. The duty cycle of switch M1 increases until the maximum duty cycle of the converter in buck operation reaches DMAX(BUCK, TG1), given by: M2 + M4 M2 + M4 M1 + M4 M2 + M4 M1 + M4 M1 + M4 DMAX(BUCK,TG1) = 100% – D(BUCK-BOOST) where D(BUCK-BOOST) is the duty cycle of the buck-boost switch range: 37911 F03 Figure 3. Buck Operation (VIN > VOUT) D(BUCK-BOOST) = 8% Figure 3 shows typical buck operation waveforms. If VIN approaches VOUT, the buck-boost region is reached. Buck-Boost Region (VIN ~ VOUT) When VIN is close to VOUT, the controller is in buck-boost operation. Figure 4 and Figure 5 show typical waveforms in this operation. Every cycle the controller turns on switches M2 and M4, then M1 and M4 are turned on until 180° later when switches M1 and M3 turn on, and then switches M1 and M4 are turned on for the remainder of the cycle. Boost Region (VIN < VOUT) Switch M1 is always on and synchronous switch M2 is always off in boost operation. Every cycle switch M3 is turned on first. Inductor current is sensed when synchronous switch M3 is turned on. After the sensed inductor current exceeds the reference voltage which is proportional to VC, switch M3 turns off and synchronous switch M4 is turned on for the remainder of the cycle. Switches M3 and M4 alternate, behaving like a typical synchronous boost regulator. The duty cycle of switch M3 decreases until the minimum duty cycle of the converter in boost operation reaches DMIN(BOOST,BG2), given by: DMIN(BOOST,BG2) = D(BUCK-BOOST) where D(BUCK-BOOST) is the duty cycle of the buck-boost switch range: D(BUCK-BOOST) = 8% Figure 6 shows typical boost operation waveforms. If VIN approaches VOUT, the buck-boost region is reached. Low Current Operation The LT3791-1 is recommended to run in forced continuous conduction mode at heavy load by pulling the CCM pin higher than 1.5V. In this mode the controller behaves as M1 + M4 M1+ M3 M1 + M4 M2 + M4 M1+ M3 M1 + M4 M1 + M4 M2 + M4 M1+ M3 M1 + M4 M2 + M4 M1 + M4 37911 F04 Figure 4. Buck-Boost Operation (VIN ≤ VOUT) M1 + M4 M2 + M4 M1 + M3 M1 + M4 M1 + M4 M2 + M4 M1 + M3 M1 + M4 M1 + M4 M2 + M4 M1 + M3 M1 + M4 37911 F05 Figure 5. Buck-Boost Operation (VIN ≥ VOUT) M1 + M3 M1 + M4 M1 + M3 M1 + M4 M1 + M3 M1 + M4 37911 F06 Figure 6. Boost Operation (VIN < VOUT) a continuous, PWM current mode synchronous switching regulator. In boost operation, switch M1 is always on, switch M3 and synchronous switch M4 are alternately turned on to maintain the output voltage independent of the direction of inductor current. In buck operation, synchronous switch M4 is always on, switch M1 and synchronous switch M2 are alternately turned on to maintain the output voltage independent of the direction of inductor current. In the forced continuous mode, the output can source or sink current. However, reverse inductor current from the output to the input is not desired for certain applications. For these applications, the CCM pin must be connected to C/10 (pin 4) with a pull-up resistor to INTVCC (see front page Typical Application). Therefore, the CCM pin will be pulled lower than 0.3V for discontinuous conduction mode by the C/10 pin when the output current is low. In this mode, switch M4 turns off when the inductor current flows negative. 37911f 13 LT3791-1 Applications Information The Typical Application on the front page is a basic LT3791-1 application circuit. External component selection is driven by the load requirement, and begins with the selection of RSENSE and the inductor value. Next, the power MOSFETs are selected. Finally, CIN and COUT are selected. This circuit can operate up to an input voltage of 60V. 200 180 ∆IL/ISENSE(MAX) (%) 160 Programming The Switching Frequency The RT frequency adjust pin allows the user to program the switching frequency from 200kHz to 700kHz to optimize efficiency/performance or external component size. Higher frequency operation yields smaller component size but increases switching losses and gate driving current, and may not allow sufficiently high or low duty cycle operation. Lower frequency operation gives better performance at the cost of larger external component size. For an appropriate RT resistor value see Table 1. An external resistor from the RT pin to GND is required; do not leave this pin open. 140 100 80 60 40 0 Figure 7. Maximum Peak-to-Peak Ripple vs Duty Cycle is the maximum ripple that will prevent subharmonic oscillation and also regulate with zero load. The ripple should be less than this to allow proper operation over all load currents. For a given ripple the inductance terms in continuous mode are as follows: RT (kΩ) 200 147 300 84.5 400 59.0 500 45.3 600 35.7 700 29.4 where: Inductor Selection The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use of smaller inductor and capacitor values. The inductor value has a direct effect on ripple current. The maximum inductor current ripple ΔIL can be seen in Figure 7. This 50 55 60 65 70 75 80 85 90 95 100 BG1, BG2 DUTY CYCLE (%) 37911 F07 fOSC (kHz) The LT3791-1 switching frequency can be synchronized to an external clock using the SYNC pin. Driving SYNC with a 50% duty cycle waveform is always a good choice, otherwise maintain the duty cycle between 10% and 90%. The falling edge of CLKOUT corresponds to the rising edge of SYNC thus allowing 2-phase paralleling converters. The rising edge of CLKOUT turns on switch M3 and the falling edge of CLKOUT turns on switch M2. BUCK ∆IL/ ISENSE(MAX) LIMIT 20 Table 1. Switching Frequency vs RT Value Frequency Synchronization BOOST ∆IL/ ISENSE(MAX) LIMIT 120 LBUCK > ( ) VOUT • VIN(MAX) – VOUT •100 f •IOUT(MAX) • %Ripple • VIN(MAX) LBOOST > ( ) VIN(MIN)2 • VOUT – VIN(MIN) •100 f •IOUT(MAX) • %Ripple • VOUT 2 f is operating frequency % ripple is allowable inductor current ripple VIN(MIN) is minimum input voltage VIN(MAX) is maximum input voltage VOUT is output voltage IOUT(MAX) is maximum output load current For high efficiency, choose an inductor with low core loss. Also, the inductor should have low DC resistance to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. To minimize radiated noise, use a shielded inductor. RSENSE Selection and Maximum Output Current RSENSE is chosen based on the required output current. The current comparator threshold sets the peak of the inductor 37911f 14 LT3791-1 Applications Information current in boost operation and the maximum inductor valley current in buck operation. In boost operation, the maximum average load current at VIN(MIN) is: 51mV ∆IL VIN(MIN) IOUT(MAX _ BOOST) = – • RSENSE 2 VOUT where ΔIL is peak-to-peak inductor ripple current. In buck operation, the maximum average load current is: RSENSE(MAX) = 2 • 51mV• VIN(MIN) 2 •ILED • VOUT + ∆IL(BOOST) • VIN(MIN) The maximum current sensing RSENSE value for the buck operation is: RSENSE(MAX) = 2 • 47.5mV 2 •ILED – ∆IL(BUCK) The final RSENSE value should be lower than the calculated RSENSE(MAX) in both the boost and buck operation. A 20% to 30% margin is usually recommended. CIN and COUT Selection In boost operation, input current is continuous. In buck operation, input current is discontinuous. In buck operation, the selection of input capacitor, CIN, is driven by the need to filter the input square wave current. Use a low ESR capacitor sized to handle the maximum RMS current. For buck operation, the input RMS current is given by: ∆VRIPPLE (BOOST _ CAP ) = 47.5mV ∆IL IOUT(MAX _ BUCK) = + 2 RSENSE The maximum current sensing RSENSE value for the boost operation is: In boost operation, the discontinuous current shifts from the input to the output, so COUT must be capable of reducing the output voltage ripple. The effects of ESR (equivalent series resistance) and the bulk capacitance must be considered when choosing the right capacitor for a given output ripple voltage. The steady ripple due to charging and discharging the bulk capacitance is given by: IRMS = ILED2 •D+ ∆IL 2 •D 12 ( ILED • VOUT – VIN(MIN) ) C OUT • VOUT • f ∆IL ∆VRIPPLE (BUCK _ CAP ) ≈ 8 • f •C OUT where COUT is the output filter capacitor. The steady ripple due to the voltage drop across the ESR is given by: ΔVBOOST(ESR) = ILED • ESR ΔVBUCK(ESR) = ILED • ESR Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Output capacitors are also used for stability for the LT3791‑1. A good starting point for output capacitors is seen in the Typical Applications circuits. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and are recommended for applications less than 100W. Capacitors available with low ESR and high ripple current ratings, such as OS-CON and POSCAP may be needed for applications greater than 100W. Programming VIN UVLO and OVLO The falling UVLO value can be accurately set by the resistor divider R1 and R2. A small 3µA pull-down current is active when the EN/UVLO is below the threshold. The purpose of this current is to allow the user to program the rising hysteresis. The following equations should be used to determine the resistor values: The formula has a maximum at VIN = 2VOUT. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. VIN(UVLO –) = 1.2 • R1+R2 R2 VIN(UVLO + ) = 3µA •R1+1.215 • R1+R2 R2 37911f 15 LT3791-1 Applications Information The rising OVLO value can be accurately set by the resistor divider R3 and R4. The following equations should be used to determine the resistor values: VIN(OVLO + ) = 3 • LT3791-1 V(ISP-ISN) (mV) 1.1 90 1.15 94.5 1.2 98 1.25 99.5 1.3 100 When VCTRL is higher than 1.3V, the output current is regulated to: VIN R1 R3 R2 R4 OVLO EN/UVLO 37911 F08 Figure 8. Resistor Connection to Set VIN UVLO and OVLO Thresholds Programming Output Current The output current is programmed by placing an appropriate value current sense resistor, ROUT, in series with the output load. The voltage drop across ROUT is (Kelvin) sensed by the ISP and ISN pins. The CTRL pin should be tied to a voltage higher than 1.2V to get the full-scale 100mV (typical) threshold across the sense resistor. The CTRL pin can also be used to adjust the output current, although relative accuracy decreases with the decreasing sense threshold. When the CTRL pin voltage is less than 1V, the output current is: VCTRL (V) R3+R4 R4 R3+R4 VIN(OVLO –) = 2.925 • R4 IOUT = Table 2. V(ISP-ISN) Threshold vs CTRL VCTRL – 200mV ROUT •10 When the CTRL pin voltage is between 1.1V and 1.3V the output current varies with VCTRL, but departs from the equation above by an increasing amount as VCTRL voltage increases. Ultimately, when VCTRL > 1.3V the output current no longer varies. The typical V(ISP-ISN) threshold vs VCTRL is listed in Table 2. IOUT = 100mV ROUT The CTRL pin should not be left open (tie to VREF if not used). The CTRL pin can also be used in conjunction with a thermistor to provide overtemperature protection for the output load, or with a resistor divider to VIN to reduce output power and switching current when VIN is low. The presence of a time varying differential voltage signal (ripple) across ISP and ISN at the switching frequency is expected. The amplitude of this signal is increased by high output load current, low switching frequency and/ or a smaller value output filter capacitor. Some level of ripple signal is acceptable: the compensation capacitor on the VC pin filters the signal so the average difference between ISP and ISN is regulated to the user-programmed value. Ripple voltage amplitude (peak-to-peak) in excess of 20mV should not cause mis-operation, but may lead to noticeable offset between the average value and the user-programmed value. ISMON The ISMON pin provides a linear indication of the current flowing through the output. The equation for VISMON is V(ISP–ISN) • 10. This pin is suitable for driving an ADC input, however, the output impedance of this pin is 12.5kΩ so care must be taken not to load this pin. Programming Input Current Limit The LT3791-1 has a standalone current sense amplifier. It can be used to limit the input current. The input current limit is calculated by the following equation: 37911f 16 LT3791-1 Applications Information IIN = Dimming Control 50mV RIN For loop stability a lowpass RC filter is needed. For most applications, a 50Ω resistor and 470nF capacitor is sufficient. Table 3 RIN (mΩ) 20 15 12 10 6 5 4 3 2 ILIMIT (A) 2.5 3.3 4.2 5.0 8.3 10.0 12.5 16.7 25 IVINMON The IVINMON pin provides a linear indication of the current flowing through the input. The equation for VIVINMON is V(IVINP-IVINN) • 20. This pin is suitable for driving an ADC input, however, the output impedance of this pin is 12.5kΩ so care must be taken not to load this pin. Programming Output Voltage (Constant Voltage Regulation) For a voltage regulator, the output voltage can be set by selecting the values of R5 and R6 (see Figure 9) according to the following equation: VOUT = 1.2 • R5+R6 R6 There are two methods to control the current source for dimming using the LT3791-1. One method uses the CTRL pin to adjust the current regulated in the output. A second method uses the PWM pin to modulate the current source between zero and full current to achieve a precisely programmed average current. To make PWM dimming more accurate, the switch demand current is stored on the VC node during the quiescent phase when PWM is low. This feature minimizes recovery time when the PWM signal goes high. To further improve the recovery time a disconnect switch may be used in the output current path to prevent the ISP node from discharging during the PWM signal low phase. The minimum PWM on- or off-time is affected by choice of operating frequency and external component selection. The best overall combination of PWM and analog dimming capabilities is available if the minimum PWM pulse is at least six switching cycles and the PWM pulse is synchronized to the SYNC signal. SHORT Pin The LT3791-1 provides an open-drain status pin, SHORT, which pulls low when the FB pin is below 400mV. The only time the FB pin will be below 400mV is during start-up or if the output is shorted. During start-up the LT3791-1 ignores the voltage on the FB pin until the softstart capacitor reaches 1.75V. To prevent false tripping after startup, a large enough soft-start capacitor must be used to allow the output to get up to approximately 40% to 50% of the final value. C/10 Pin VOUT LT3791-1 R5 FB R6 37911 F09 Figure 9. Resistor Connection for Constant Output Voltage Regulation The LT3791-1 provides an open-drain status pin, C/10, which pulls low when the FB pin is above 1.15V and the voltage across V(ISP-ISN) is less than 10mV. For voltage regulator applications with both ISP and ISN pins tied together to the output (i.e., no output current sense and limit), the C/10 pin provides a power good flag. For battery charger applications with output current sense and limit, the C/10 provides a C/10 charge termination flag. 37911f 17 LT3791-1 Applications Information Soft-Start Soft-start reduces the input power sources’ surge currents by gradually increasing the controller’s current limit (proportional to an internally buffered clamped equivalent of VC). The soft-start interval is set by the soft-start capacitor selection according to the following equation t SS = 1.2V •C 14µA SS A 100k resistor must be placed between SS and VREF for the LT3791-1. This 100k resistor also contributes the extra SS charge current. Make sure CSS is large enough when there is loading during start-up. Loop Compensation The LT3791-1 uses an internal transconductance error amplifier whose VC output compensates the control loop. The external inductor, output capacitor and the compensation resistor and capacitor determine the loop stability. In order to select the power MOSFETs, the power dissipated by the device must be known. For switch M1, the maximum power dissipation happens in boost operation, when it remains on all the time. Its maximum power dissipation at maximum output current is given by: 2 I •V PM1(BOOST) = LED OUT • ρT •RDS(ON) VIN where ρT is a normalization factor (unity at 25°C) accounting for the significant variation in on-resistance with temperature, typically 0.4%/°C as shown in Figure 10. For a maximum junction temperature of 125°C, using a value of ρT = 1.5 is reasonable. Switch M2 operates in buck operation as the synchronous rectifier. Its power dissipation at maximum output current is given by: PM2(BUCK) = VIN – VOUT •ILED2 • ρT •RDS(ON) VIN The inductor and output capacitor are chosen based on performance, size and cost. The compensation resistor and capacitor at VC are set to optimize control loop response and stability. For typical applications, a 10nF compensation capacitor at VC is adequate, and a series resistor should always be used to increase the slew rate on the VC pin to maintain tighter regulation of output current during fast transients on the input supply of the converter. Switch M3 operates in boost operation as the control switch. Its power dissipation at maximum current is given by: Power MOSFET Selections and Efficiency Considerations where CRSS is usually specified by the MOSFET manufacturers. The constant k, which accounts for the loss caused by reverse-recovery current, is inversely proportional to the gate drive current and has an empirical value of 1.7. The LT3791-1 requires four external N-channel power MOSFETs, two for the top switches (switch M1 and M4, shown in Figure 1) and two for the bottom switches (switch M2 and M3 shown in Figure 1). Important parameters for the power MOSFETs are the breakdown voltage, VBR(DSS), threshold voltage, VGS(TH), on-resistance, RDS(ON), reverse transfer capacitance, CRSS, and maximum current, IDS(MAX). The drive voltage is set by the 5V INTVCC supply. Consequently, logic-level threshold MOSFETs must be used in LT3791-1 applications. If the input voltage is expected to drop below the 5V, then sub-logic threshold MOSFETs should be considered. PM3(BOOST) = ( VOUT – VIN ) • VOUT •I VIN2 + k • VOUT 3 • LED 2 •ρ T •RDS(ON) ILED •C •f VIN RSS For switch M4, the maximum power dissipation happens in boost operation, when its duty cycle is higher than 50%. Its maximum power dissipation at maximum output current is given by: PM4(BOOST) = VIN VOUT 2 I •V • LED OUT • ρT •RDS(ON) VIN For the same output voltage and current, switch M1 has the highest power dissipation and switch M2 has the lowest power dissipation unless a short occurs at the output. 37911f 18 LT3791-1 Applications Information From a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following formula: TJ = TA + P • RTH(JA) The RTH(JA) to be used in the equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(JC)). This value of TJ can then be compared to the original, assumed value used in the iterative calculation process. ρT NORMALIZED ON-RESISTANCE (Ω) 2.0 1.5 1.0 Higher input voltage applications in which large MOSFETs are being driven at high frequencies may cause the maximum junction temperature rating for the LT3791-1 to be exceeded. The system supply current is normally dominated by the gate charge current. Additional external loading of the INTVCC also needs to be taken into account for the power dissipation calculations. Power dissipation for the IC in this case is VIN • IINTVCC, and overall efficiency is lowered. The junction temperature can be estimated by using the equations given TJ = TA + (PD • θJA) 0.5 0 –50 INTVCC pin regulator can supply a peak current of 67mA and must be bypassed to ground with a minimum of 4.7µF ceramic capacitor or low ESR electrolytic capacitor. An additional 0.1µF ceramic capacitor placed directly adjacent to the INTVCC and PGND IC pins is highly recommended. Good bypassing is necessary to supply the high transient current required by MOSFET gate drivers. where θJA (in °C/W) is the package thermal impedance. 50 100 0 JUNCTION TEMPERATURE (°C) 150 37911 F10 Figure 10. Normalized RDS(ON) vs Temperature Optional Schottky Diode (D3, D4) Selection The Schottky diodes D3 and D4 shown in the Typical Applications section conduct during the dead time between the conduction of the power MOSFET switches. They are intended to prevent the body diode of synchronous switches M2 and M4 from turning on and storing charge during the dead time. In particular, D4 significantly reduces reverse-recovery current between switch M4 turn-off and switch M3 turn-on, which improves converter efficiency and reduces switch M3 voltage stress. In order for the diode to be effective, the inductance between it and the synchronous switch must be as small as possible, mandating that these components be placed adjacently. INTVCC Regulator An internal P-channel low dropout regulator produces 5V at the INTVCC pin from the VIN supply pin. INTVCC powers the drivers and internal circuitry within the LT3791-1. The For example, a typical application operating in continuous current operation might draw 24mA from a 24V supply: TJ = 70°C + 24mA • 24V • 28°C/W = 86°C To prevent maximum junction temperature from being exceeded, the input supply current must be checked operating in continuous mode at maximum VIN. Top Gate (TG) MOSFET Driver Supply (C1, D1, C2, D2) The external bootstrap capacitors C1 and C2 connected to the BST1 and BST2 pins supply the gate drive voltage for the topside MOSFET switches M1 and M4. When the top MOSFET switch M1 turns on, the switch node SW1 rises to VIN and the BST1 pin rises to approximately VIN + INTVCC. When the bottom MOSFET switch M2 turns on, the switch node SW1 drops low and the bootstrap capacitor C1 is charged through D1 from INTVCC. When the bottom MOSFET switch M3 turns on, the switch node SW2 drops low and the bootstrap capacitor C2, is charged through D2 from INTVCC. The bootstrap capacitors C1 and C2 need to store about 100 times the gate charge required by the top MOSFET switch M1 and M4. In most applications a 0.1µF to 0.47µF, X5R or X7R ceramic capacitor is adequate. 37911f 19 LT3791-1 Applications Information Efficiency Considerations The power efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in circuits produce losses, four main sources account for most of the losses in LT3791-1 circuits: 1. DC I2R losses. These arise from the resistances of the MOSFETs, sensing resistor, inductor and PC board traces and cause the efficiency to drop at high output currents. 2. Transition loss. This loss arises from the brief amount of time switch M1 or switch M3 spends in the saturated region during switch node transitions. It depends upon the input voltage, load current, driver strength and MOSFET capacitance, among other factors. The loss is significant at input voltages above 20V and can be estimated from: When making adjustments to improve efficiency, the input current is the best indicator of changes in efficiency. If you make a change and the input current decreases, then the efficiency has increased. If there is no change in the input current, then there is no change in efficiency. PC Board Layout Checklist The basic PC board layout requires a dedicated ground plane layer. Also, for high current, a multilayer board provides heat sinking for power components. The PGND ground plane layer should not have any traces and it should be as close as possible to the layer with power MOSFETs. n Place CIN, switch M1, switch M2 and D1 in one compact area. Place COUT, switch M3, switch M4 and D2 in one compact area. n Use immediate vias to connect the components (including the LT3791-1’s SGND and PGND pins) to the ground plane. Use several large vias for each power component. n Transition Loss ≈ 2.7 • VIN2 • IOUT • CRSS • f where CRSS is the reverse-transfer capacitance. 3. INTVCC current. This is the sum of the MOSFET driver and control currents. 4. CIN and COUT loss. The input capacitor has the difficult job of filtering the large RMS input current to the regulator in buck operation. The output capacitor has the difficult job of filtering the large RMS output current in boost operation. Both CIN and COUT are required to have low ESR to minimize the AC I2R loss and sufficient capacitance to prevent the RMS current from causing additional upstream losses in fuses or batteries. 5. Other losses. Schottky diode D3 and D4 are responsible for conduction losses during dead time and light load conduction periods. Inductor core loss occurs predominately at light loads. Switch M3 causes reverse recovery current loss in boost operation. Use planes for VIN and VOUT to maintain good voltage filtering and to keep power losses low. n Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. Connect the copper areas to any DC net (VIN or PGND). n Separate the signal and power grounds. All small-signal components should return to the SGND pin at one point, which is then tied to the PGND pin close to the sources of switch M2 and switch M3. n Place switch M2 and switch M3 as close to the controller as possible, keeping the PGND, BG and SW traces short. n Keep the high dV/dT SW1, SW2, BST1, BST2, TG1 and TG2 nodes away from sensitive small-signal nodes. n 37911f 20 LT3791-1 Applications Information The path formed by switch M1, switch M2, D1 and the CIN capacitor should have short leads and PC trace lengths. The path formed by switch M3, switch M4, D2 and the COUT capacitor also should have short leads and PC trace lengths. n The output capacitor (–) terminals should be connected as close as possible to the (–) terminals of the input capacitor. n Connect the top driver bootstrap capacitor, C1, closely to the BST1 and SW1 pins. Connect the top driver bootstrap capacitor, C2, closely to the BST2 and SW2 pins. n Connect the input capacitors, CIN, and output capacitors, COUT, closely to the power MOSFETs. These capacitors carry the MOSFET AC current in boost and buck operation. n Route SNSN and SNSP leads together with minimum PC trace spacing. Avoid sense lines pass through noisy areas, such as switch nodes. Ensure accurate current sensing with Kelvin connections at the SENSE resistor. n Connect the VC pin compensation network close to the IC, between VC and the signal ground pins. The capacitor helps to filter the effects of PCB noise and output voltage ripple voltage from the compensation loop. n Connect the INTVCC bypass capacitor, CVCC, close to the IC, between the INTVCC and the power ground pins. This capacitor carries the MOSFET drivers’ current peaks. An additional 0.1µF ceramic capacitor placed immediately next to the INTVCC and PGND pins can help improve noise performance substantially. n 37911f 21 LT3791-1 Typical Applications 98% Efficient 60W (12V 5A) Voltage Regulator Runs Down to 3V VIN RIN 0.003Ω VIN 3V TO 55V STARTS UP FROM 5.5V R7 50Ω D5 D6 INTVCC VIN C3 1µF BST2 IVINP IVINN TG1 TEST1 EN/UVLO BG1 INTVCC R9 100k R10 200k RFAULT 100k M2 D4 + VO M4 L1, 6.8µH COUT2 100µF 35V ROUT 0.015Ω COUT 10µF 25V ×3 M3 D3 VOUT 12V 5A R5 73.2k R6 8.06k SNSP RSENSE 0.004Ω LT3791-1 SNSN SHORT C/10 CCM IVINMON PGND BG2 SW2 TG2 ISP ISN FB ISMON CLKOUT PWMOUT VREF C8 0.1µF M1 SWI OVLO R4 57.6k C2 0.1µF C1 0.1µF BST1 R3 1M R2 576k CVCC 4.7µF D1 D2 C7 470nF R1 866k CIN 4.7µF 100V ×4 VO PWM CTRL SS SYNC VC RT RC 5.1k CC 22nF CSS 33nF SGND R8 84.5k 300kHz 37911 TA02a D1, D2: NXP BAT46WJ D3: IRF 10BQ060 D4: IRF 10BQ040 D5, D6: DIODES INC. BAT46W L1: WURTH ELEKTRONIK WE-HCI 7443556680 M1, M2: RENASAS RJK0651DPB 60VDS M3, M4: VISHAY SiR424DP 40VDS COUT2: SUNCON 35HVT100M Efficiency vs Load Current Maximum Output Current vs VIN 100 6 MAXIMUM OUTPUT CURRENT (A) 95 EFFICIENCY (%) 90 85 80 75 70 VIN = 3V VIN = 6V VIN = 12V VIN = 28V VIN = 48V 65 60 55 50 0 1 2 3 LOAD CURRENT (A) 4 5 37911 TA02b 5 4 3 2 1 0 3 4 5 6 7 8 9 10 20 30 40 50 60 INPUT VOLTAGE (V) 37911 TA02c 37911f 22 LT3791-1 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 38-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1772 Rev C) Exposed Pad Variation AA 4.75 REF 38 9.60 – 9.80* (.378 – .386) 4.75 REF (.187) 20 6.60 ±0.10 4.50 REF 2.74 REF SEE NOTE 4 6.40 2.74 REF (.252) (.108) BSC 0.315 ±0.05 1.05 ±0.10 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.50 – 0.75 (.020 – .030) 0.09 – 0.20 (.0035 – .0079) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN MILLIMETERS (INCHES) 3. DRAWING NOT TO SCALE 1 0.25 REF 19 1.20 (.047) MAX 0° – 8° 0.50 (.0196) BSC 0.17 – 0.27 (.0067 – .0106) TYP 0.05 – 0.15 (.002 – .006) FE38 (AA) TSSOP REV C 0910 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 37911f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LT3791-1 Typical Application 2.5A Buck-Boost 36V SLA Battery Charger PVIN 9V TO 58V RIN 0.003Ω 1µF 50Ω VIN INTVCC D1 TG1 IVINP INTVCC 200k 30.9k BG1 LT3791-1 SHORT PWMOUT TEST1 CHARGE CURRENT CONTROL RBAT 0.04Ω SNSN + PGND IVINMON ISMON CTRL BG2 SW2 TG2 FB ISP PWM ISN C/10 SS CCM RT VREF SYNC VC D1, D2: BAT46WJ 22nF L1: COILCRAFT SER2915L-103K M1-M4: RENESAS RJK0651DPB M5: NXP NX7002AK CIN2: NIPPON CHEMI-CON EMZA630ADA101MJA0G COUT2: SUNCON 35HVT220M M3 RSENSE 0.004Ω SGND 100k L1 10µH M2 COUT 4.7µF 50V ×2 M4 0.1µF CIN2 100µF 63V + COUT2 220µF 35V SNSP CLKOUT 0.1µF M1 SWI OVLO + 0.1µF BST1 EN/UVLO 57.6k 4.7µF D2 BST2 IVINN 470nF 499k CIN 4.7µF 100V ×2 2.2k 1µF 2.5A CHARGE 36V SLA BATTERY AGM TYPE 41V FLOAT 44V CHARGE AT 25°C 50Ω 1.00M INTVCC 20k 84.5k 300kHz 402k 30.1k M5 22nF 37911 TA03 Related Parts PART NUMBER DESCRIPTION COMMENTS LT3791 60V, 4-Switch, Synchronous Buck-Boost LED Driver Controller VIN: 4.7V to 60V, VOUT Range: 1.2V to 60V, True Color PWM™, Analog, ISD < 1µA, TSSOP-38E Packages LTC®3780 High Efficiency, Synchronous, 4-Switch Buck-Boost Controller VIN: 4V to 36V, VOUT Range: 0.8V to 30V, ISD < 55µA, SSOP-24, QFN-32 Packages LTC3789 High Efficiency, Synchronous, 4-Switch Buck-Boost Controller VIN: 4V to 38V, VOUT Range: 0.8V to 38V, ISD < 40µA, 4mm × 5mm QFN-28, SSOP-28 Packages LT3755/LT3755-1 High Side 60V, 1MHz LED Controller with True Color LT3755-2 3000:1 PWM Dimming VIN: 4.5V to 40V, VOUT Range: 5V to 60V, 3000:1 True Color PWM, Analog, ISD < 1µA, 3mm × 3mm QFN-16, MSOP-16E Packages LT3756/LT3756-1 High Side 100V, 1MHz LED Controller with True Color VIN: 6V to 100V, VOUT Range: 5V to 100V, 3000:1 True Color PWM, Analog, ISD < 1µA, 3mm × 3mm QFN-16, MSOP-16E Packages LT3756-2 3000:1 PWM Dimming LT3596 60V, 300mA Step-Down LED Driver VIN: 6V to 60V, VOUT Range: 5V to 55V, 10000:1 True Color PWM, Analog, ISD < 1µA, 5mm × 8mm QFN-52 Package LT3743 Synchronous Step-Down 20A LED Driver with Thee-State LED Current Control VIN: 5.5V to 36V, VOUT Range: 5.5V to 35V, 3000:1 True Color PWM, Analog, ISD < 1µA, 4mm × 5mm QFN-28, TSSOP-28E Packages 37911f 24 Linear Technology Corporation LT 0812 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2012