ONSEMI NCP563SQ25T1G

NCP562, NCP563
80 mA CMOS Low Iq
Low-Dropout Voltage
Regulator
This series of fixed output low−dropout linear regulators are
designed for handheld communication equipment and portable battery
powered applications which require low quiescent. This series
features an ultra−low quiescent current of 2.5 A. Each device
contains a voltage reference unit, an error amplifier, a PMOS power
transistor, resistors for setting output voltage, current limit, and
temperature limit protection circuits. The NCP562 series provides an
enable pin for ON/OFF control.
The NCP562/NCP563 has been designed to be used with low cost
ceramic capacitors and requires a minimum output capacitor of 0.1 F.
The device is housed in the micro−miniature SC82−AB surface mount
package. Standard voltage versions are 1.5, 1.8, 2.1, 2.5, 2.7, 2.8, 3.0,
3.3, 3.5 and 5.0 V. Other voltages are available in 100 mV steps.
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4
1
SC82−AB (SC70−4)
SQ SUFFIX
CASE 419C
Features
PIN CONNECTIONS &
MARKING DIAGRAMS
Low Quiescent Current of 2.5 A Typical
Low Output Voltage Option
Output Voltage Accuracy of 2.0%
Temperature Range of −40°C to 85°C
NCP562 Provides an Enable Pin
Pb−Free Packages are Available
GND 1
Vin 2
Typical Applications
GND 1
Vin 2
GND Enable
OFF
C1
3 Vout
(NCP563 Top View)
Output
Vout
+
+
xxx
M
G
C2
= Specific Device Code
= Month Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position and
underbar may vary depending upon manufacturing location.
This device contains 28 active transistors
Figure 1. NCP562 Typical Application Diagram
GND
4 N/C
xxxM G
G
ON
Vin
3 Vout
(NCP562 Top View)
• Battery Powered Instruments
• Hand−Held Instruments
• Camcorders and Cameras
Input
4 Enable
xxxM G
G
•
•
•
•
•
•
N/C
ORDERING INFORMATION
Input
Vin
C1
Vout
+
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
Output
+
C2
This device contains 28 active transistors
Figure 2. NCP563 Typical Application Diagram
© Semiconductor Components Industries, LLC, 2009
July, 2009 − Rev. 12
1
Publication Order Number:
NCP562/D
NCP562, NCP563
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PIN FUNCTION DESCRIPTION
NCP562
NCP563
Pin Name
1
1
GND
Description
2
2
Vin
Positive power supply input voltage.
3
3
Vout
Regulated output voltage.
4
−
Enable
−
4
N/C
Power supply ground.
This input is used to place the device into low−power standby. When this input is pulled low, the
device is disabled. If this function is not used, Enable should be connected to Vin.
No internal connection.
MAXIMUM RATINGS
Rating
Symbol
Input Voltage
Value
Unit
Vin
6.0
V
Enable
−0.3 to Vin +0.3
V
Output Voltage
Vout
−0.3 to Vin +0.3
V
Power Dissipation and Thermal Characteristics
Power Dissipation
Thermal Resistance, Junction−to−Ambient
PD
RJA
Internally Limited
400
W
°C/W
Operating Junction Temperature
TJ
+150
°C
Operating Ambient Temperature
TA
−40 to +85
°C
Storage Temperature
Tstg
−55 to +150
°C
Enable Voltage (NCP562 ONLY)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015
Machine Model Method 200 V
2. Latch up capability (85°C) "100 mA DC with trigger voltage.
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NCP562, NCP563
ELECTRICAL CHARACTERISTICS
(Vin = Vout(nom.) + 1.0 V, Venable = Vin, Cin = 1.0 F, Cout = 1.0 F, TJ = 25°C, unless otherwise noted.)
Characteristic
Symbol
Output Voltage (TA = 25°C, Iout = 1.0 mA)
1.5 V
1.8 V
2.1 V
2.5 V
2.7 V
2.8 V
3.0 V
3.3 V
3.5 V
5.0 V
Min
Typ
Max
1.455
1.746
2.037
2.425
2.646
2.744
2.940
3.234
3.43
4.9
1.5
1.8
2.1
2.5
2.7
2.8
3.0
3.3
3.5
5.0
1.545
1.854
2.163
2.575
2.754
2.856
3.060
3.366
3.57
5.1
−
−
10
10
20
20
−
20
40
80
80
280
280
−
−
Vout
Line Regulation
1.5 V−4.4 V (Vin = Vo(nom.) + 1.0 V to 6.0 V
4.5 V−5.0 V (Vin = 5.5 V to 6.0 V)
Regline
Load Regulation (Iout = 10 mA to 80 mA)
Regload
Output Current (Vout = (Vout at Iout = 80 mA) −3.0%)
1.5 V to 3.9 V (Vin = Vout(nom.) + 2.0 V)
4.0 V−5.0 V (Vin = 6.0 V)
Io(nom.)
Dropout Voltage (TA = −40°C to 85°C, Iout = 80 mA, Measured at
Vout −3.0%)
1.5 V−1.7 V
1.8 V−2.4 V
2.5 V−2.6 V
2.7 V−2.9 V
3.0 V−3.2 V
3.3 V−4.9 V
5.0 V
Vin−Vout
Quiescent Current
(Enable Input = 0 V)
(Enable Input = Vin, Iout = 1.0 mA to Io(nom.))
IQ
Output Short Circuit Current
1.5 V to 3.9 V (Vin = Vnom + 2.0 V)
4.0 V−5.0 V (Vin = 6.0 V)
V
mV
Vn
Enable Input Threshold Voltage (NCP562 ONLY)
(Voltage Increasing, Output Turns On, Logic High)
(Voltage Decreasing, Output Turns Off, Logic Low)
mV
−
−
−
−
−
−
−
550
400
250
230
200
190
140
800
550
400
400
350
350
250
−
−
0.1
2.5
1.0
6.0
150
150
300
300
600
600
−
100
−
1.3
−
−
−
−
0.3
TC
−
"100
−
T
*TA
PD + J(max)
RJA
4. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
3
Vrms
V
3. Maximum package power dissipation limits must be observed.
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A
mA
Vth(en)
Output Voltage Temperature Coefficient
mV
mA
Iout(max)
Output Voltage Noise (f = 100 Hz to 100 kHz, Vout = 3.0 V)
Unit
ppm/°C
NCP562, NCP563
3
VIN = 4.0 V
VOUT = 3.0 V
IOUT = 0 mA
2.7
IQ, QUIESCENT CURRENT (A)
IQ, QUIESCENT CURRENT (A)
2.9
2.5
2.3
2.1
1.9
1.7
−60 −40
VOUT = 3.0 V
2.5
2
1.5
1
0.5
0
−20
0
20
40
60
0
100
80
1
T, TEMPERATURE (°C)
3
VIN = 6.0 V
3.010
3.005
3.000
VIN = 4.0 V
IOUT = 30 mA
2
1.5
1
0.5
0
−40
0
−20
20
40
60
80
100
0
1
2
3
4
5
T, TEMPERATURE (°C)
VIN, INPUT VOLTAGE (V)
Figure 5. Output Voltage versus Temperature
Figure 6. Output Voltage versus Input Voltage
300
VOUT(nom) = 3.0 V
250
80 mA LOAD
200
150
6
4
2
VIN = 4.0 V
CIN = 1.0 F
0
3
40 mA LOAD
100
50
0
6
2.5
ENABLE
VOLTAGE (V)
VIN − VOUT, DROPOUT VOLTAGE (mV)
VOUT, OUTPUT VOLTAGE (V)
3.015
VOUT, OUTPUT
VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
3.5
2.990
−60
5
4
Figure 4. Quiescent Current versus Input
Voltage
3.020
2.995
3
VIN, INPUT VOLTAGE (V)
Figure 3. Quiescent Current versus Temperature
VOUT(nom) = 3.0 V
IOUT = 10 mA
2
10 mA LOAD
−50
−25
0
25
50
75
100
1
0
125
COUT = 0.1 F
IOUT = 10 mA
2
0
T, TEMPERATURE (°C)
50
100
150
200
250
300
350 400
t, TIME (s)
Figure 7. Dropout Voltage versus Temperature
Figure 8. Turn−On Response (NCP562 ONLY)
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4
IOUT, OUTPUT
CURRENT (mA)
6
5
4
3
1
OUTPUT VOLTAGE
DEVIATION (V)
OUTPUT VOLTAGE
DEVIATION (V)
VIN, INPUT
VOLTAGE (V)
NCP562, NCP563
0.5
0
VOUT = 3.0 V
COUT = 0.1 F
IOUT = 10 mA
−0.5
−1
0
100 150 200 250 300 350 400
t, TIME (s)
50
60
IOUT = 1 mA to 30 mA
VIN = 4.0 V
30
0
−30
1
VOUT = 3.0 V
COUT = 0.1 F
0.5
0
−0.5
450 500
−1
0
60
IOUT = 1 mA to 30 mA
VIN = 4.0 V
30
0
−30
400
200
0
COUT = 1.0 F
VOUT = 3.0 V
−200
−400
0
100 200
100 150 200 250 300 350 400
t, TIME (s)
450 500
Figure 10. Load Transient Response
300 400 500 600 700 800 900 1000
t, TIME (s)
Vn, OUTPUT VOLTAGE NOISE (mV/√Hz)
OUTPUT VOLTAGE
DEVIATION (mV)
IOUT, OUTPUT
CURRENT (mA)
Figure 9. Line Transient Response
50
3.5
VIN = 5.0 V
VOUT = 3.0 V
IOUT = 50 mA
COUT = 0.1 F
3
2.5
2
1.5
1
0.5
0
0.01
Figure 11. Load Transient Response
0.1
1
10
f, FREQUENCY (kHz)
100
1000
Figure 12. Output Voltage Noise
DEFINITIONS
Load Regulation
Line Regulation
The change in output voltage for a change in output current
at a constant temperature.
The change in output voltage for a change in input voltage.
The measurement is made under conditions of low dissipation
or by using pulse technique such that the average chip
temperature is not significantly affected.
Dropout Voltage
The input/output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. Measured when the output drops 3.0% below
its nominal. The junction temperature, load current, and
minimum input supply requirements affect the dropout level.
Line Transient Response
Typical over and undershoot response when input voltage
is excited with a given slope.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 160°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Maximum Power Dissipation
The maximum total dissipation for which the regulator
will operate within its specifications.
Quiescent Current
The quiescent current is the current which flows through
the ground when the LDO operates without a load on its
output: internal IC operation, bias, etc. When the LDO
becomes loaded, this term is called the Ground current. It is
actually the difference between the input current (measured
through the LDO input pin) and the output current.
Maximum Package Power Dissipation
The maximum power package dissipation is the power
dissipation level at which the junction temperature reaches its
maximum operating value, i.e. 125°C. Depending on the
ambient power dissipation and thus the maximum available
output current.
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5
NCP562, NCP563
APPLICATIONS INFORMATION
Place external components, especially the output
capacitor, as close as possible to the circuit, and make leads
as short as possible.
A typical application circuit for the NCP562 and NCP563
series are shown in Figure 1 and Figure 2.
Input Decoupling (C1)
A 1.0 F capacitor either ceramic or tantalum is
recommended and should be connected close to the NCP562
package. Higher values and lower ESR will improve the
overall line transient response.
TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K
Thermal
As power across the NCP562 and NCP563 increases, it
might become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material and also the
ambient temperature effect the rate of temperature rise for
the part. This is stating that when the devices have good
thermal conductivity through the PCB, the junction
temperature will be relatively low with high power
dissipation applications.
The maximum dissipation the package can handle is
given by:
Output Decoupling (C2)
The NCP562 and NCP563 are very stable regulators and
do not require any specific Equivalent Series Resistance
(ESR) or a minimum output current. Capacitors exhibiting
ESRs ranging from a few m up to 10 can thus safely be
used. The minimum decoupling value is 0.1 F and can be
augmented to fulfill stringent load transient requirements.
The regulator accepts ceramic chip capacitors as well as
tantalum devices. Larger values improve noise rejection and
load regulation transient response.
TDK capacitor: C2012X5R1C105K, C1608X5R1A105K,
or C3216X7R1C105K
T
*TA
PD + J(max)
RJA
If junction temperature is not allowed above the
maximum 125°C, then the NCP562 and NCP563 can
dissipate up to 250 mW @ 25°C.
The power dissipated by the NCP562 and NCP563 can be
calculated from the following equation:
Enable Operation (NCP562 ONLY)
The enable pin will turn on the regulator when pulled high
and turn off the regulator when pulled low. These limits of
threshold are covered in the electrical specification section
of this data sheet. If the enable is not used, then the pin
should be connected to Vin.
Ptot + ƪVin * Ignd (Iout)ƫ ) [Vin * Vout] * Iout
or
P ) Vout * Iout
VinMAX + tot
Ignd ) Iout
Hints
If an 80 mA output current is needed then the ground
current from the data sheet is 2.5 A. For an NCP562 or
NCP563 (3.0 V), the maximum input voltage will then be
6.0 V.
Please be sure the Vin and GND lines are sufficiently
wide. When the impedance of these lines is high, there is a
chance to pick up noise or cause the regulator to
malfunction.
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6
NCP562, NCP563
ORDERING INFORMATION
Nominal
Output Voltage
Marking
NCP562SQ15T1G
1.5
LDI
NCP562SQ18T1G
1.8
LEY
NCP562SQ21T1G
2.1
AAA
NCP562SQ25T1G
2.5
LDK
NCP562SQ27T1G
2.7
LEZ
NCP562SQ28T1G
2.8
LDL
NCP562SQ30T1G
3.0
LDM
3.3
LDN
Device
NCP562SQ33T1
NCP562SQ33T1G
NCP562SQ35T1G
3.5
LJU
NCP562SQ50T1G
5.0
LDP
1.5
LDQ
1.8
LFA
2.5
LDS
2.7
LFB
2.8
LDT
3.0
LDU
3.3
LDV
5.0
LDX
NCP563SQ15T1
NCP563SQ15T1G
NCP563SQ18T1
NCP563SQ18T1G
NCP563SQ25T1
NCP563SQ25T1G
NCP563SQ27T1
NCP563SQ27T1G
NCP563SQ28T1
NCP563SQ28T1G
NCP563SQ30T1
NCP563SQ30T1G
NCP563SQ33T1
NCP563SQ33T1G
NCP563SQ50T1
NCP563SQ50T1G
Package
Shipping†
SC82−AB
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
NCP562, NCP563
PACKAGE DIMENSIONS
SC−82AB
CASE 419C−02
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. 419C−01 OBSOLETE. NEW STANDARD IS
419C−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
A
G
C
D 3 PL
N
K
B
S
1
2
H
J
F
L
MILLIMETERS
MIN
MAX
1.8
2.2
1.15
1.35
0.8
1.1
0.2
0.4
0.3
0.5
1.1
1.5
0.0
0.1
0.10
0.26
0.1
−−−
0.05 BSC
0.2 REF
1.8
2.4
DIM
A
B
C
D
F
G
H
J
K
L
N
S
3
4
0.05 (0.002)
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.008
0.016
0.012
0.020
0.043
0.059
0.000
0.004
0.004
0.010
0.004
−−−
0.002 BSC
0.008 REF
0.07
0.09
SOLDERING FOOTPRINT*
1.30
0.0512
0.65
0.026
0.95
0.037
0.90
0.035
0.70
0.028
1.90
0.075
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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For additional information, please contact your local
Sales Representative
NCP562/D