NL17SH126 Noninverting 3-State Buffer The NL17SH126 is an advanced high speed CMOS noninverting 3−state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffered 3−state output which provides high noise immunity and stable output. The NL17SH126 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the NL17SH126 to be used to interface 5 V circuits to 3 V circuits. http://onsemi.com MARKING DIAGRAM Features • • • • • • SOT−953 CASE 527AE High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families These are Pb−Free Devices J M JM 1 = Specific Device Code = Month Code PIN ASSIGNMENT IN A 5 1 GND 2 OE 3 VCC 4 EN IN A August, 2011 − Rev. 1 3 OE 4 OUT Y 5 VCC FUNCTION TABLE OUT Y A Input OE Input Y Output L H X H H L L H Z ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. Figure 2. Logic Symbol © Semiconductor Components Industries, LLC, 2011 IN A GND OUT Y Figure 1. Pinout (Top View) OE 1 2 1 Publication Order Number: NL17SH126/D NL17SH126 MAXIMUM RATINGS Symbol Characteristics Value Unit VCC DC Supply Voltage −0.5 to +7.0 V VIN DC Input Voltage −0.5 to +7.0 V −0.5 to 7.0 −0.5 to VCC + 0.5 V −20 mA ±20 mA VOUT DC Output Voltage VCC = 0 High or Low State IIK Input Diode Current IOK Output Diode Current IOUT DC Output Current, per Pin ±25 mA ICC DC Supply Current, VCC and GND 50 mA PD Power dissipation in still air 50 mW TL Lead temperature, 1 mm from case for 10 secs 260 °C TJ Junction temperature under bias +150 °C Tstg Storage temperature −65 to +150 °C ILatchup Latchup Performance ±100 mA VOUT < GND; VOUT > VCC Above VCC and Below GND at 125°C (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit VCC DC Supply Voltage 2.0 5.5 V VIN DC Input Voltage 0.0 5.5 V DC Output Voltage 0.0 VCC V Operating Temperature Range −55 +125 °C 0 0 100 20 ns/V VOUT TA tr , tf Input Rise and Fall Time VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80 ° C 117.8 419,300 TJ = 90 ° C 1,032,200 90 TJ = 100 ° C 80 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 110° C Time, Years TJ = 120° C Time, Hours TJ = 130 ° C Junction Temperature °C NORMALIZED FAILURE RATE Device Junction Temperature versus Time to 0.1% Bond Failures 1 1 10 100 1000 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NL17SH126 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions Min 1.5 2.1 3.15 3.85 VIH Minimum High−Level Input Voltage 2.0 3.0 4.5 5.5 VIL Maximum Low−Level Input Voltage 2.0 3.0 4.5 5.5 VOH Minimum High−Level Output Voltage VIN = VIH or VIL VOL Maximum Low−Level Output Voltage VIN = VIH or VIL TA = 25°C VCC (V) Typ TA ≤ 85°C Max Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 VIN = VIH or VIL IOH = −50 mA 2.0 3.0 4.5 1.9 2.9 4.4 VIN = VIH or VIL IOH = −4 mA IOH = −8 mA 3.0 4.5 2.58 3.94 VIN = VIH or VIL IOL = 50 mA 2.0 3.0 4.5 VIN = VIH or VIL IOL = 4 mA IOL = 8 mA Max 2.0 3.0 4.5 0.0 0.0 0.0 −55 ≤ TA ≤ 125°C Min Max 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 V 0.5 0.9 1.35 1.65 1.9 2.9 4.4 1.9 2.9 4.4 2.48 3.80 2.34 3.66 Unit V V V 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 V V IOZ Maximum 3−State Leakage Current VIN = VIH or VIL VOUT = VCC or GND 5.5 ±0.2 5 ±2.5 ±2.5 mA IIN Maximum Input Leakage Current VIN = 5.5 V or GND 0 to 5.5 ±0.1 ±1.0 ±1.0 mA ICC Maximum Quiescent Supply Current VIN = VCC or GND 5.5 1.0 20 40 mA ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr = tf = 3.0 ns TA = 25°C Symbol tPLH, tPHL tPZL, tPZH tPLZ, tPHZ CIN COUT Parameter Min Test Conditions TA ≤ 85°C Typ Max Min Max −55 ≤ TA ≤ 125°C Min Max Unit ns Maximum Propagation Delay, Input A to Y (Figures 3. and 5.) VCC = 3.3 ± 0.3 V CL = 15 pF CL = 50 pF 4.5 6.4 8.0 11.5 9.5 13.0 12.0 16.0 VCC = 5.0 ± 0.5 V CL = 15 pF CL = 50 pF 3.5 4.5 5.5 7.5 6.5 8.5 8.5 10.5 Maximum Output Enable Time, Input OE to Y (Figures 4. and 5.) VCC = 3.3 ± 0.3 V RL = 1000 W CL = 15 pF CL = 50 pF 4.5 6.4 8.0 11.5 9.5 13.0 11.5 15.0 VCC = 5.0 ± 0.5 V RL = 1000 W CL = 15 pF CL = 50 pF 3.5 4.5 5.1 7.1 6.0 8.0 8.5 10.5 Maximum Output Disable Time, Input OE to Y (Figures 4. and 5.) VCC = 3.3 ± 0.3 V RL = 1000 W CL = 15 pF CL = 50 pF 6.5 8.0 9.7 13.2 11.5 15.0 14.5 18.0 VCC = 5.0 ± 0.5 V RL = 1000 W CL = 15 pF CL = 50 pF 4.8 7.0 6.8 8.8 8.0 10.0 10.0 12.0 Maximum Input Capacitance 4.0 10 10 10 Maximum 3−State Output Capacitance (Output in High Impedance State) 6.0 ns ns pF pF Typical @ 25°C, VCC = 5.0 V 8.0 CPD Power Dissipation Capacitance (Note 2) pF 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 NL17SH126 SWITCHING WAVEFORMS OE VCC 50% GND tPZL VCC 50% GND tPZH tPHL tPLH HIGH IMPEDANCE 50% VCC Y A tPLZ VOL + 0.3V tPHZ VOH - 0.3V 50% VCC 50% VCC Y HIGH IMPEDANCE Y Figure 4. Switching Waveforms Figure 5. TEST POINT TEST POINT OUTPUT DEVICE UNDER TEST DEVICE UNDER TEST CL* *Includes all probe and jig capacitance OUTPUT 1 kW CL * CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. *Includes all probe and jig capacitance Figure 6. Test Circuit Figure 7. Test Circuit INPUT Figure 8. Input Equivalent Circuit ORDERING INFORMATION Device NL17SH126P5T5G Package Shipping† SOT−953 (Pb−Free) 8000 Units / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 NL17SH126 PACKAGE DIMENSIONS SOT−953 CASE 527AE ISSUE E X Y D PIN ONE INDICATOR 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A 4 HE E 1 2 3 DIM A b C D E e HE L L2 L3 C TOP VIEW SIDE VIEW e L 5X 5X L3 MILLIMETERS MIN NOM MAX 0.34 0.37 0.40 0.10 0.15 0.20 0.07 0.12 0.17 0.95 1.00 1.05 0.75 0.80 0.85 0.35 BSC 0.95 1.00 1.05 0.175 REF 0.05 0.10 0.15 −−− −−− 0.15 SOLDERING FOOTPRINT* 5X 0.35 5X 0.20 5X L2 5X BOTTOM VIEW b PACKAGE OUTLINE 0.08 X Y 1.20 1 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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