MC74VHC1G126 Noninverting 3−State Buffer The MC74VHC1G126 is an advanced high speed CMOS noninverting 3−state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffered 3−state output which provides high noise immunity and stable output. The MC74VHC1G126 input structure provides protection when voltages up to 7.0 V are applied, regardless of the supply voltage. This allows the MC74VHC1G126 to be used to interface 5.0 V circuits to 3.0 V circuits. • • • • • • • High Speed: tPD = 3.5 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 58; Equivalent Gates = 15 Pb−Free Packages are Available OE 1 IN A 2 GND 3 5 MARKING DIAGRAMS 5 5 1 SC−88A/SOT−353/SC−70 DF SUFFIX CASE 419A M Features http://onsemi.com W2 M G G 1 5 W2 AYW G G 5 1 TSOP−5/SOT−23/SC−59 DT SUFFIX CASE 483 1 W2 = Device Code M = Date Code* A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) VCC *Date Code orientation and/or position may vary depending upon manufacturing location. 4 OUT Y PIN ASSIGNMENT 1 Figure 1. Pinout (Top View) OE EN IN A OE 2 IN A 3 GND 4 OUT Y 5 VCC OUT Y FUNCTION TABLE A Input OE Input Y Output L H X H H L L H Z Figure 2. Logic Symbol ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. © Semiconductor Components Industries, LLC, 2005 August, 2005 − Rev. 13 1 Publication Order Number: MC74VHC1G126/D MC74VHC1G126 MAXIMUM RATINGS Symbol Characteristics Value Unit VCC DC Supply Voltage −0.5 to +7.0 V VIN DC Input Voltage −0.5 to +7.0 V −0.5 to 7.0 −0.5 to VCC + 0.5 V −20 mA +20 mA VOUT DC Output Voltage VCC = 0 High or Low State IIK Input Diode Current IOK Output Diode Current IOUT DC Output Current, per Pin +25 mA ICC DC Supply Current, VCC and GND +50 mA VOUT < GND; VOUT > VCC PD Power dissipation in still air qJA Thermal resistance TL Lead temperature, 1 mm from case for 10 s TJ Junction temperature under bias Tstg Storage temperature VESD ESD Withstand Voltage ILatchup Latchup Performance SC−88A, TSOP−5 200 mW SC−88A, TSOP−5 333 °C/W 260 °C +150 °C −65 to +150 °C > 2000 > 200 N/A V ±500 mA Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) Above VCC and Below GND at 125°C (Note 4) Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Tested to EIA/JESD22−A114−A 2. Tested to EIA/JESD22−A115−A 3. Tested to JESD22−C101−A 4. Tested to EIA/JESD78 RECOMMENDED OPERATING CONDITIONS Symbol Characteristics Min Max Unit VCC DC Supply Voltage 2.0 5.5 V VIN DC Input Voltage 0.0 5.5 V DC Output Voltage 0.0 VCC V −55 +125 °C 0 0 100 20 ns/V VOUT TA Operating Temperature Range tr , tf VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V Input Rise and Fall Time 90 419,300 47.9 100 178,700 20.4 110 79,600 9.4 120 37,000 4.2 130 17,800 2.0 140 8,900 1.0 TJ = 80° C 117.8 TJ = 90 ° C 1,032,200 TJ = 100° C 80 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 110° C Time, Years TJ = 120° C Time, Hours TJ = 130° C Junction Temperature °C NORMALIZED FAILURE RATE Device Junction Temperature versus Time to 0.1% Bond Failures 1 1 10 100 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 1000 MC74VHC1G126 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions Min 1.5 2.1 3.15 3.85 VIH Minimum High−Level Input Voltage 2.0 3.0 4.5 5.5 VIL Maximum Low−Level Input Voltage 2.0 3.0 4.5 5.5 VOH Minimum High−Level Output Voltage VIN = VIH or VIL VIN = VIH or VIL IOH = −50 mA VIN = VIH or VIL IOH = −4 mA IOH = −8 mA VOL Maximum Low−Level Output Voltage VIN = VIH or VIL TA ≤ 85°C TA = 25°C VCC (V) Typ Max Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 2.0 3.0 4.5 1.9 2.9 4.4 3.0 4.5 2.58 3.94 Max 2.0 3.0 4.5 −55 ≤ TA ≤ 125°C Min Max 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 V 0.5 0.9 1.35 1.65 1.9 2.9 4.4 1.9 2.9 4.4 2.48 3.80 2.34 3.66 Unit V V V VIN = VIH or VIL IOL = 50 mA 2.0 3.0 4.5 VIN = VIH or VIL IOL = 4 mA IOL = 8 mA 0.0 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 V V IOZ Maximum 3−State Leakage Current VIN = VIH or VIL VOUT = VCC or GND 5.5 ±0.25 ±2.5 ±2.5 mA IIN Maximum Input Leakage Current VIN = 5.5 V or GND 0 to 5.5 ±0.1 ±1.0 ±1.0 mA ICC Maximum Quiescent Supply Current VIN = VCC or GND 5.5 1.0 20 40 mA ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ Î ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎ AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr = tf = 3.0 ns TA ≤ 85°C TA = 25°C Symbol Parameter Test Conditions Typ Max Max Unit tPLH, tPHL Maximum Propagation Delay, Input A to Y (Figures 3. and 5.) VCC = 3.3 ± 0.3 V CL = 15 pF CL = 50 pF 4.5 6.4 8.0 11.5 9.5 13.0 12.0 16.0 ns VCC = 5.0 ± 0.5 V CL = 15 pF CL = 50 pF 3.5 4.5 5.5 7.5 6.5 8.5 8.5 10.5 Maximum Output Enable Time, Input OE to Y (Figures 4. and 5.) VCC = 3.3 ± 0.3 V CL = 15 pF RL = 1000 W CL = 50 pF 4.5 6.4 8.0 11.5 9.5 13.0 11.5 15.0 VCC = 5.0 ± 0.5 V CL = 15 pF RL = 1000 W CL = 50 pF 3.5 4.5 5.1 7.1 6.0 8.0 8.5 10.5 Maximum Output Disable Time, Input OE to Y (Figures 4. and 5.) VCC = 3.3 ± 0.3 V CL = 15 pF RL = 1000 W CL = 50 pF 6.5 8.0 9.7 13.2 11.5 15.0 14.5 18.0 VCC = 5.0 ± 0.5 V CL = 15 pF RL = 1000 W CL = 50 pF 4.8 7.0 6.8 8.8 8.0 10.0 10.0 12.0 Maximum Input Capacitance 4.0 10 10 10 Maximum 3−State Output Capacitance (Output in High Impedance State) 6.0 tPZL, tPZH tPLZ, tPHZ CIN COUT Min Min Max −55 ≤ TA ≤ 125°C Min ns ns pF pF Typical @ 25°C, VCC = 5.0 V CPD 8.0 Power Dissipation Capacitance (Note 5) pF 5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. http://onsemi.com 3 MC74VHC1G126 SWITCHING WAVEFORMS VCC 50% A OE tPHL tPLH VCC 50% GND tPZL GND tPZH Y VOL + 0.3V tPHZ VOH − 0.3V 50% VCC Y Figure 4. Switching Waveforms HIGH IMPEDANCE Figure 5. TEST POINT TEST POINT OUTPUT DEVICE UNDER TEST HIGH IMPEDANCE 50% VCC Y 50% VCC tPLZ DEVICE UNDER TEST C L* *Includes all probe and jig capacitance OUTPUT 1 kW CL * CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. *Includes all probe and jig capacitance Figure 6. Test Circuit Figure 7. Test Circuit INPUT Figure 8. Input Equivalent Circuit DEVICE ORDERING INFORMATION Package Type Tape and Reel Size† MC74VHC1G126DFT1 SC−88A/SOT−353/SC−70 178 mm (7”) 3000 Units / Tape & Reel M74VHC1G126DFT1G SC−88A/SOT−353/SC−70 (Pb−Free) 178 mm (7”) 3000 Units / Tape & Reel MC74VHC1G126DFT2 SC−88A/SOT−353/SC−70 178 mm (7”) 3000 Units / Tape & Reel M74VHC1G126DFT2G SC−88A/SOT−353/SC−70 (Pb−Free) 178 mm (7”) 3000 Units / Tape & Reel MC74VHC1G126DTT1 TSOP−5/SOT−23/SC−59 178 mm (7”) 3000 Units / Tape & Reel M74VHC1G126DTT1G TSOP−5/SOT−23/SC−59 (Pb−Free) 178 mm (7”) 3000 Units / Tape & Reel Device Order Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 4 MC74VHC1G126 PACKAGE DIMENSIONS SC−88A / SOT−353 / SC70 CASE 419A−02 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A G 5 4 −B− S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) M B M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 J C K H SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 mm Ǔ ǒinches MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 MC74VHC1G126 PACKAGE DIMENSIONS TSOP−5 / SOT23−5 / SC59−5 DT SUFFIX CASE 483−02 ISSUE D D S 5 4 1 2 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. B L G A DIM A B C D G H J K L M S J C 0.05 (0.002) H M K MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181 SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: [email protected] http://onsemi.com 6 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MC74VHC1G126/D