STi5162 Low-cost interactive set-top box decoder Data Brief Features ■ Enhanced ST20 32-bit VL-RISC CPU ■ Unified memory interface – up to 133 MHz, 16-bit wide SDR SDRAM, – up to 166 MHz, 16-bit wide DDR SDRAM ■ Programmable Flash memory interface ■ Demodulator compatible with I and Q or IF inputs for tuner interface ■ Channel management ■ Digital carrier, timing & symbol recovery loops ■ Decoding – QPSK - 16 QAM - 64 QAM constellations ■ MPEG-2 MP@ML video decoder ■ Graphics and display – 3 display planes – 2D paced blitter engine with fill function ■ ■ Central DMA controller ■ PAL/NTSC/SECAM encoder – RGB, CVBS, Y/C and YUV outputs with four 10-bit DAC outputs. ■ Audio subsystem – simultaneous MPEG audio decode and output of Dolby streams on S/PDIF – IEC958/IEC1937 digital audio output interface – integrated stereo audio DAC ■ On-chip peripherals – ASC (UART) with Tx and Rx FIFOs – 3 banks of 8-bit programmable I/O – integrated VCXO ■ JTAG/TAP interface ■ Package – 15 mm x 15mm PBGA240 0.8 mm pitch. Programmable transport interface (PTI) – single transport stream input for DVB DDR/SDR SDRAM NOR FLASH Video output Audio output AudioL/R S/PDIF RGB/YC/CVBS Digital video 16 16 Audio DACs ST20 C1 core 200 MHz DCU 4K ICache Int controller 4K SRAM LMI Audio decoder DENC FMI + SPI BDISP PCM + S/PDIF player 4K DCache DVO GDMA LCMPEG2 8KB TILE STBus Interconnect PTI DVB/ICAM/DES FDMA IR Rx PIO 2x ASC (UART) 2x SSC IF COFDM Comms block TS merger 16 TS in April 2009 Comms peripherals Rev 3 For further information contact your local STMicroelectronics sales office. 1/7 www.st.com 7 Description STi5162 1 Description 1.1 General The STi5162 is the latest in the family of STBus set-top box ICs providing high-performance, low-cost system-on-chip (SoC) for MPEG processing in digital terrestrial STBs. It is derived from the STi5107, with the addition of a DVB-T COFDM demodulator and supports multiple platforms using a unified architecture. The STi5162 delivers enhanced performance with respect to previous devices. Main memory is based upon a single 16-bit external SDR SDRAM or DDR DRAM. The display architecture of the devices is based upon a high performance blitter engine that supports CLUT8 and RGB16 formats for background, video and OSD/graphics displays. It makes the porting of middleware easier with improved rendering. 1.2 Applications Figure 1. Basic terrestrial TV STB IR Rx SDR RGB or YC+CVBS Tuner STi5162 DVB-T Rx CVBS VCR Flash The STi5162 is designed for low-cost basic STB applications. Its BGA package allows the use of a simple 2-layer PCB, with all signals and power supplies being routed through the top PCB layer. This leaves the bottom PCB layer dedicated to the ground plane and JTAG connections. The STi5162 provides the following features: 2/7 ● SDR and DDR SDRAM memory interface ● Digital video output port (exclusive with parallel Flash) ● serial Flash interface for program storage ● serial TS input port ● two ASCs (UARTs) STi5162 1.3 Description Main features ● Enhanced ST20 32-bit VL-RISC CPU – ● ● ● Local memory interface – up to 133 MHz, 16-bit wide SDR SDRAM, – up to 166 MHz, 16-bit wide DDR SDRAM Programmable Flash memory interface – 3 separately configurable banks, 8/16-bits wide – SRAM, peripheral, Flash, SFlash™ support Demodulator compatible with I and Q or IF inputs for tuner interface – ● 200-MHz, single cycle cache/4-Kbyte instruction cache, 4-Kbyte data cache, 4-Kbyte SRAM wide range carrier tracking loop for offset recovery – dual analog to digital conversion – signal strength indicator dedicated ADC – dual ΣΔ digital split AGC for RF and BB Channel management – NorDig Unified Specification (v1.0.2) capable – dynamic fading compatible – channel reception quality indicator – out of guard interval echo synchronization – impulsive noise rejection capable – flexible fully-integrated digital channel filter with outstanding adjacent channel rejection capability ● Digital carrier, timing & symbol recovery loops ● Decoding ● ● – 2 K, 4 K, 8 K FFT length – 5, 6, 7 and 8 MHz channel bandwidth – 1/4, 1/8, 1/16, 1/32 guard interval length – QPSK - 16 QAM - 64 QAM constellations – hierarchical capability – Viterbi soft decoder rate 1/2 – supports puncture rates 1/2, 2/3, 3/4, 5/6, 7/8 – Reed-Solomon decoder – energy dispersal descrambler Programmable transport interface (PTI) – single transport stream input – support for DVB transport streams – integrated DVB, ICAM descramblers MPEG-2 MP@ML video decoder – ● fully programmable horizontal and vertical SRCs Graphics and display – 3 display planes 3/7 Description STi5162 ● ● – 8 bpp CLUT graphics, 256 x 30 bits (AYCbCr) CLUT entries. 16 bpp true color graphics, RGB565, ARGB1555, ARGB4444 formats. Link-list control – alpha blending, antialiasing, antiflutter, antiflicker filters – 2D paced blitter engine with fill function – blitter based display compositor PAL/NTSC/SECAM encoder – RGB, CVBS, Y/C and YUV outputs with four 10-bit DAC outputs. RGB/CVBS or YUV/CVBS or YC/CVBS – encoding of CGMS closed caption, Teletext, WSS and VPS Audio subsystem – MPEG-1 layers I/II – simultaneous MPEG audio decode and output of Dolby streams on S/PDIF – IEC958/IEC1937 digital audio output interface – integrated stereo audio DACs ● Central DMA controller ● On-chip peripherals – ASC (UART) with Tx and Rx FIFOs – 3 banks of 8-bit programmable I/O – SPI for serial Flash support – 2 SSCs for I2C/SPI master/slave interfaces – infrared receiver – integrated VCXO – low-power / RTC / watchdog controller – flexible clock generation to operate with 4 MHz or 27 MHz external reference ● JTAG/TAP interface ● Package – 4/7 15mm x 15mm PBGA240 0.8 mm pitch STi5162 2 Ordering information Ordering information Table 1. Ordering information Order code STi5162ABB Packaging PBGA240 15 mm x 15 mm 5/7 Revision history 3 STi5162 Revision history Table 2. 6/7 Document revision history Date Revision Changes 09-March-2009 1 Initial release 01-Apr-2009 2 Memory interface values updated. 10-Apr-2009 3 Memory interface (SDR SDRAM) new update. STi5162 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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