LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 ADJUSTABLE MICROPOWER VOLTAGE REGULATORS WITH SHUTDOWN Check for Samples: LP2950, LP2951 FEATURES 1 • • • • • • • • Wide Input Range: Up to 30 V Rated Output Current of 100 mA Low Dropout: 380 mV (Typ) at 100 mA Low Quiescent Current: 75 μA (Typ) Tight Line Regulation: 0.03% (Typ) Tight Load Regulation: 0.04% (Typ) High VO Accuracy – 1.4% at 25°C – 2% Over Temperature Can Be Used as a Regulator or Reference LP2950 LP PACKAGE (BOTTOM VIEW) OUTPUT GND INPUT • • • • Stable With Low ESR (>12 mΩ) Capacitors Current- and Thermal-Limiting Features LP2950 Only (3-Pin Package) – Fixed-Output Voltages of 5 V, 3.3 V, and 3 V LP2951 Only (8-Pin Package) – Fixed- or Adjustable-Output Voltages: 5 V/ADJ, 3.3 V/ADJ, and 3 V/ADJ – Low-Voltage Error Signal on Falling Output – Shutdown Capability – Remote Sense Capability for Optimal Output Regulation and Accuracy LP2951 D OR P PACKAGE (TOP VIEW) OUTPUT SENSE SHUTDOWN GND 1 8 2 7 3 6 4 5 INPUT FEEDBACK VTAP ERROR LP2951 DRG PACKAGE (TOP VIEW) OUTPUT SENSE SHUTDOWN GND 8 1 2 3 4 Thermal Pad 7 6 5 INPUT FEEDBACK VTAP ERROR DESCRIPTION/ORDERING INFORMATION The LP2950 and LP2951 devices are bipolar, low-dropout voltage regulators that can accommodate a wide input supply-voltage range of up to 30 V. The easy-to-use, 3-pin LP2950 is available in fixed-output voltages of 5 V, 3.3 V, and 3 V. However, the 8-pin LP2951 is able to output either a fixed or adjustable output from the same device. By tying the OUTPUT and SENSE pins together, and the FEEDBACK and VTAP pins together, the LP2951 outputs a fixed 5 V, 3.3 V, or 3 V (depending on the version). Alternatively, by leaving the SENSE and VTAP pins open and connecting FEEDBACK to an external resistor divider, the output can be set to any value between 1.235 V to 30 V. The 8-pin LP2951 also offers additional functionality that makes it particularly suitable for battery-powered applications. For example, a logic-compatible shutdown feature allows the regulator to be put in standby mode for power savings. In addition, there is a built-in supervisor reset function in which the ERROR output goes low when VOUT drops by 6% of its nominal value for whatever reasons – due to a drop in VIN, current limiting, or thermal shutdown. The LP2950 and LP2951 are designed to minimize all error contributions to the output voltage. With a tight output tolerance (0.5% at 25°C), a very low output voltage temperature coefficient (20 ppm typical), extremely good line and load regulation (0.3% and 0.4% typical), and remote sensing capability, the parts can be used as either low-power voltage references or 100-mA regulators. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2009, Texas Instruments Incorporated LP2950 LP2951 SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 www.ti.com ORDERING INFORMATION (1) TA VOUT (NOM) LP2950-30LP Reel of 2000 LP2950-30LPR Tube of 50 LP2951-30P Tube of 75 LP2951-30D Reel of 2500 LP2951-30DR Reel of 1000 LP2951-30DRGR Bulk of 1000 LP2950-33LP Reel of 2000 LP2950-33LPR Tube of 50 LP2951-33P Tube of 75 LP2951-33D Reel of 2500 LP2951-33DR Reel of 1000 LP2951-33DRGR ZUE Bulk of 1000 LP2950-50LP PREVIEW Reel of 2000 LP2950-50LPR KY5050 Tube of 50 LP2951-50P PREVIEW Tube of 75 LP2951-50D Reel of 2500 LP2951-50DR WSON – DRG Reel of 1000 LP2951-50DRGR ZUF PDIP – P Tube of 50 LP2951P PREVIEW Tube of 75 LP2951D Reel of 2500 LP2951DR Reel of 1000 LP2951DRGR PDIP – P SOIC – D WSON – DRG TO-226/TO-92 – LP 3.3 V PDIP – P SOIC – D –40°C to 125°C WSON – DRG TO-226/TO-92 – LP 5V PDIP – P SOIC – D ADJ SOIC-D WSON – DRG (1) (2) 2 TOP-SIDE MARKING Bulk of 1000 TO-226/TO-92 – LP 3V ORDERABLE PART NUMBER PACKAGE (2) KY5030 PREVIEW KY5130 ZUD KY5033 TBD KY5133 KY5150 LP2951 PREVIEW For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 LP2950 FUNCTIONAL BLOCK DIAGRAM Unregulated DC + INPUT VOUT IL 3 100 mA OUTPUT + − + ERROR Amplifier + See Application Information 1.23-V Reference GND LP2951 FUNCTIONAL BLOCK DIAGRAM Unregulated DC + VOUT IL 3 100 mA 7 8 1 INPUT FEEDBACK OUTPUT 2 SENSE + − From CMOS or TTL 6 ERROR Amplifier 3 + VTAP SHUTDOWN 330 kW 5 + + ERROR 60 mV − See Application Information See Application Information To CMOS or TTL + 1.235-V Reference 4 GND ERROR Detection Comparator Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 3 LP2950 LP2951 SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VIN Continuous input voltage range –0.3 V to 30 V VSHDN SHUTDOWN input voltage range –1.5 V to 30 V ERROR comparator output voltage range (2) VFDBK FEEDBACK input voltage range (2) –1.5 V to 30 V (3) –1.5 V to 30 V D package θJA Package thermal impedance (4) P package Tstg Storage temperature range (5) (6) 52.44°C/W LP package (5) Operating virtual-junction temperature (2) (3) (4) 97°C/W DRG package (6) TJ (1) (5) 140°C/W (5) 84.6°C/W 150°C –65°C to 150°C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. May exceed input supply voltage If load is returned to a negative power supply, the output must be diode clamped to GND. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. The package thermal impedance is calculated in accordance with JESD 51-5. RECOMMENDED OPERATING CONDITIONS MIN VIN Supply input voltage TJ Operating virtual junction temperature (1) 4 MAX UNIT (1) 30 V –40 125 °C Minimum VIN is the greater of: (a) 2 V (25°C), 2.3 V (over temperature), or (b) VOUT(MAX) + Dropout (Max) at rated IL Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 ELECTRICAL CHARACTERISTICS VIN = VOUT (nominal) + 1 V, IL = 100 μA, CL = 1 μF (5-V versions) or CL = 2.2 μF (3-V and 3.3-V versions), 8-pin version: FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN ≤ 0.7 V PARAMETER TEST CONDITIONS TJ MIN TYP MAX UNIT 3-V VERSION (LP295x-30) VOUT Output voltage IL = 100 μA 25°C 2.970 3 3.030 –40°C to 125°C 2.940 3 3.060 V 3.3-V VERSION (LP295x-33) VOUT Output voltage IL = 100 μA 25°C 3.267 3.3 3.333 –40°C to 125°C 3.234 3.3 3.366 25°C 4.950 5 5.050 –40°C to 125°C 4.900 5 5.100 V 5-V VERSION (LP295x-50) VOUT Output voltage IL = 100 μA V ALL VOLTAGE OPTIONS Output voltage temperature coefficient (1) IL = 100 μA Line regulation (2) VIN = [VOUT(NOM) + 1 V] to 30 V Load regulation (2) IL = 100 μA to 100 mA IL = 100 μA VIN – VOUT Dropout voltage (3) IL = 100 mA IL = 100 μA IGND GND current IL = 100 mA Dropout ground current VIN = VOUT(NOM) – 0.5 V, IL = 100 μA Current limit VOUT = 0 V Thermal regulation (4) IL = 100 μA –40°C to 125°C 25°C 25°C (1) (2) (3) (4) 0.04 25°C –40°C to 125°C –40°C to 125°C 75 8 110 120 12 170 200 160 –40°C to 125°C 25°C 450 14 –40°C to 125°C 25°C % 80 140 –40°C to 125°C 25°C %/V mV 600 –40°C to 125°C 25°C 0.2 150 380 25°C 0.2 0.3 50 25°C 100 ppm/°C 0.4 –40°C to 125°C 200 220 0.05 0.2 μA mA μA mA %/W 430 CL = 200 μF LP2951-50: CL = 3.3 μF, CBypass = 0.01 μF between pins 1 and 7 0.03 –40°C to 125°C CL = 1 μF (5 V only) Output noise (RMS), 10 Hz to 100 kHz 20 160 μV 25°C 100 Output or reference voltage temperature coefficient is defined as the worst-case voltage change divided by the total temperature range. Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are covered under the specification for thermal regulation. Dropout voltage is defined as the input-to-output differential at which the output voltage drops 100 mV, below the value measured at 1-V differential. The minimum input supply voltage of 2 V (2.3 V over temperature) must be observed. Thermal regulation is defined as the change in output voltage at a time (T) after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for a 50-mA load pulse at VIN = 30 V, VOUT = 5 V (1.25-W pulse) for t = 10 ms. Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 5 LP2950 LP2951 SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VIN = VOUT (nominal) + 1 V, IL = 100 μA, CL = 1 μF (5-V versions) or CL = 2.2 μF (3-V and 3.3-V versions), 8-pin version: FEEDBACK tied to VTAP, OUTPUT tied to SENSE, VSHUTDOWN ≤ 0.7 V PARAMETER TEST CONDITIONS TJ MIN TYP MAX 1.235 1.252 UNIT (LP2951-xx) 8-PIN VERSION ONLY ADJ Reference voltage VOUT = VREF to (VIN – 1 V), VIN = 2.3 V to 30 V, IL = 100 μA to 100 mA Reference voltage temperature coefficient (5) FEEDBACK bias current 25°C 1.218 –40°C to 125°C 1.212 1.257 –40°C to 125°C 1.200 1.272 V 25°C 20 25°C 20 –40°C to 125°C FEEDBACK bias current temperature coefficient ppm/°C 40 60 25°C 0.1 25°C 0.01 nA nA/°C ERROR COMPARATOR Output leakage current VOUT = 30 V Output low voltage VIN = VOUT(NOM) – 0.5 V, IOL = 400 μA –40°C to 125°C 2 25°C 150 –40°C to 125°C 250 400 Upper threshold voltage (ERROR output high) (6) 25°C 40 –40°C to 125°C 25 Lower threshold voltage (ERROR output low) (6) –40°C to 125°C 25°C Hysteresis (6) 1 60 75 mV mV 95 140 25°C μA 15 mV mV SHUTDOWN INPUT Input logic voltage Low (regulator ON) High (regulator OFF) VTAP = 2.4 V SHUTDOWN input current VTAP = 30 V Regulator output current in shutdown (5) (6) 6 VSHUTDOWN ≥ 2 V, VIN ≤ 30 V, VOUT = 0, FEEDBACK tied to VTAP –40°C to 125°C 25°C 0.7 2 30 –40°C to 125°C 25°C –40°C to 125°C 25°C –40°C to 125°C 50 100 450 V 600 μA 750 3 10 20 μA Output or reference voltage temperature coefficient is defined as the worst-case voltage change divided by the total temperature range. Comparator thresholds are expressed in terms of a voltage differential equal to the nominal reference voltage (measured at VIN – VOUT = 1 V) minus FEEDBACK terminal voltage. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain = VOUT/VREF = (R1 + R2)/R2. For example, at a programmed output voltage of 5 V, the ERROR output is specified to go low when the output drops by 95 mV × 5 V/1.235 V = 384 mV. Thresholds remain constant as a percentage of VOUT (as VOUT is varied), with the low-output warning occurring at 6% below nominal (typ) and 7.7% (max). Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS QUIESCENT CURRENT vs LOAD CURRENT INPUT CURRENT vs INPUT VOLTAGE 100 10 RL = ∞ 80 1 Input Current – µA Quiescent Current – mA 90 0.1 70 60 50 40 30 20 10 0.01 0.0001 0.001 0.01 0.1 0 IL – Load Current – A 0 1 2 3 4 5 6 7 8 9 10 8 9 10 VIN – Input Voltage – V INPUT CURRENT vs INPUT VOLTAGE 200 INPUT CURRENT vs INPUT VOLTAGE 120 RL = 50 kΩ 100 160 90 140 Input Current – mA Input Current – µA RL = 50 Ω 110 180 120 100 80 60 80 70 60 50 40 30 40 20 20 10 0 0 1 2 3 4 5 6 7 8 9 10 0 0 1 VIN – Input Voltage – V 2 3 4 5 6 7 VIN – Input Voltage – V Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 7 LP2950 LP2951 SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) OUTPUT VOLTAGE vs TEMPERATURE QUIESCENT CURRENT vs INPUT VOLTAGE 5.100 120 110 IL = 0 5.075 5.050 5.025 90 Quiescent Current – µA VOUT – Output Voltage – V 100 IL = 100 µA 5.000 IL = 100 m A 4.975 4.950 80 70 60 50 40 30 20 4.925 10 4.900 -40 -25 -10 5 0 0 20 35 50 65 80 95 110 125 1 2 3 4 5 6 7 8 VIN – Input Voltage – V TA – Temperature – °C QUIESCENT CURRENT vs INPUT VOLTAGE QUIESCENT CURRENT vs INPUT VOLTAGE 8 IL = 100 mA 120 7 IL = 1 mA 110 Quiescent Current – mA Quiescent Current – µA 100 90 80 70 60 50 40 30 20 6 5 4 3 2 1 10 0 0 0 1 2 3 4 5 6 7 8 0 1 VIN – Input Voltage – V 8 2 3 4 5 6 7 8 VIN – Input Voltage – V Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs TEMPERATURE 100 10 9.5 IL = 100 m A V IN = 6 V 95 90 Quiescent Current – µA 9 Quiescent Current – mA IL = 100 µA V IN = 6 V 8.5 8 7.5 7 6.5 85 80 75 70 65 6 60 5.5 55 5 -40 -25 -10 5 20 35 50 65 80 50 -40 -25 -10 95 110 125 5 20 35 50 65 80 95 110 125 TA – Temperature – °C TA – Temperature – °C SHORT-CIRCUIT CURRENT vs TEMPERATURE DROPOUT VOLTAGE vs TEMPERATURE 250 500 225 (V IN – V OUT ) – Dropout Voltage – mV Short-Circuit Current – mA 450 200 175 150 125 100 75 50 -40 -25 -10 5 20 35 50 65 80 95 110 125 400 350 RL = 100 m A 300 250 200 150 100 RL = 100 µA 50 0 -40 -25 -10 TA – Temperature – °C 5 20 35 50 65 80 95 110 125 TA – Temperature – °C Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 9 LP2950 LP2951 SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) LP2951 MINIMUM OPERATING VOLTAGE vs TEMPERATURE 400 2 350 1.95 Minimum Operating Voltage – V (V IN – V OUT ) – Dropout Voltage – mV DROPOUT VOLTAGE vs OUTPUT CURRENT 300 250 200 150 100 50 1.9 1.85 1.8 1.75 1.7 1.65 0 0.0001 0.001 0.01 1.6 -40 -25 -10 0.1 IO – Output Current – A 25 7 20 6 ERROR Output – V FEEDBACK Bias Current – nA 8 15 10 5 0 4 3 1 -15 0 50-kW resistor to VOUT 0 45 70 95 110 125 5 -10 20 65 80 50-kW resistor to external 5-V supply 2 -5 -5 35 50 LP2951 ERROR COMPARATOR OUTPUT vs INPUT VOLTAGE 30 -30 20 TA – Temperature – °C LP2951 FEEDBACK BIAS CURRENT vs TEMPERATURE -20 -55 5 95 1 120 145 2 3 4 5 6 7 8 V IN – Input Voltage – V TA – Temperature – °C 10 Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) LP2951 ERROR COMPARATOR SINK CURRENT vs OUTPUT LOW VOLTAGE LINE TRANSIENT RESPONSE vs TIME 2 ISINK – Sink Current – mA 1.75 TA = 125 Input Voltage 2 V/div 1.5 1.25 TA = 25 1 Output Voltage 80 mV/div 0.75 TA = –40 0.5 0.25 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VOL – Output Low Voltage – V LOAD TRANSIENT RESPONSE vs TIME (VOUT = 5 V, CL = 1 μF) Output Voltage 100 mV/div LOAD TRANSIENT RESPONSE vs TIME (VOUT = 5 V, CL = 10 μF) Output Voltage 100 mV/div Output Load 100 mA/div Output Load 100 mA/div Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 11 LP2950 LP2951 SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) ENABLE TRANSIENT RESPONSE vs TIME (CL = 1 μF, IL = 1 mA) ENABLE TRANSIENT RESPONSE vs TIME (CL = 10 μF, IL = 1 mA) OUTPUT IMPEDANCE vs FREQUENCY RIPPLE REJECTION vs FREQUENCY 100 90 Power-Supply Ripple Rejection – dB Ω Output Impedance – Ohm IL = 100 µA 10 1 IL = 1 m A 0.1 IL = 100 m A 0.01 10 1.E+01 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 1M 1.E+06 80 IL = 0 70 60 50 IL = 100 µA 40 30 V IN = 6 V CL = 1 µF 20 10 1.E+01 100 1.E+02 1k 1.E+03 10k 1.E+04 100k 1.E+05 1M 1.E+06 f – Frequency – Hz f – Frequency – Hz 12 Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) RIPPLE REJECTION vs FREQUENCY RIPPLE REJECTION vs FREQUENCY 100 100 VIN = 6 V 90 Power-Supply Ripple Rejection – dB Power-Supply Ripple Rejection – dB VIN = 6 V CL = 1 µF 90 80 70 60 50 IL = 1 mA 40 30 20 80 CL = 1 µF IL = 50 mA 70 60 50 40 IL = 100 mA 30 20 IL = 10 mA 10 1.E+01 10 1.E+02 100 1.E+03 1k 1.E+04 10k 1.E+05 100k 10 10 1.E+01 1.E+06 1M 100 1.E+02 1k 1.E+03 f – Frequency – Hz 100k 1.E+05 1M 1.E+06 f – Frequency – Hz LP2951 OUTPUT NOISE vs FREQUENCY LP2951 DIVIDER RESISTANCE vs TEMPERATURE 400 RP2P4 – Pin 2 to Pin 4 Resistance – k W 6 5 Output Noise – µV 10k 1.E+04 4 CL = 200 µF 3 CL = 1 µF 2 1 350 300 250 200 150 100 50 CL = 3.3 µF 0 1.E+01 10 1.E+02 100 1.E+03 1k 1.E+04 10k 1.E+05 100k 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TA – Temperature – °C f – Frequency – Hz Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 13 LP2950 LP2951 SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 www.ti.com SHUTDOWN THRESHOLD VOLTAGE (ON TO OFF) vs TEMPERATURE 1.7 1.7 1.6 1.6 Input Logic Voltage (ON to OFF) – V Input Logic Voltage (OFF to ON) – V TYPICAL CHARACTERISTICS (continued) SHUTDOWN THRESHOLD VOLTAGE (OFF TO ON) vs TEMPERATURE 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 -40 -25 -10 5 20 35 50 65 80 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 -40 -25 -10 95 110 125 TA – Temperature – °C 5 20 35 50 65 80 95 110 125 TA – Temperature – °C LINE REGULATION vs INPUT VOLTAGE 6 Output Voltage Change – mV 5 4 3 2 1 0 -1 -2 0 5 10 15 20 25 30 VIN – Input Voltage – V 14 Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 APPLICATION INFORMATION Input Capacitor (CIN) A 1-μF (tantalum, ceramic, or aluminum) electrolytic capacitor should be placed locally at the input of the LP2950 or LP2951 if there is, or will be, significant impedance between the ac filter capacitor and the input; for example, if a battery is used as the input or if the ac filter capacitor is located more than 10 in away. There are no ESR requirements for this capacitor, and the capacitance can be increased without limit. Output Capacitor (COUT) As with most PNP LDOs, stability conditions require the output capacitor to have a minimum capacitance and an ESR that falls within a certain range. Capacitance Value For VOUT ≥ 5 V, a minimum of 1 μF is required. For lower VOUT, the regulator’s loop gain is running closer to unity gain and, thus, has lower phase margins. Consequently, a larger capacitance is needed for stability. For VOUT = 3 V or 3.3 V, a minimum of 2.2 μF is recommended. For worst case, VOUT = 1.23 V (using the ADJ version), a minimum of 3.3 μF is recommended. COUT can be increased without limit and only improves the regulator stability and transient response. Regardless of its value, the output capacitor should have a resonant frequency less than 500 kHz. The minimum capacitance values given above are for maximum load current of 100 mA. If the maximum expected load current is less than 100 mA, then lower values of COUT can be used. For instance, if IOUT < 10 mA, then only 0.33 μF is required for COUT. For IOUT < 1 mA, 0.1 μF is sufficient for stability requirements. Thus, for a worst-case condition of 100-mA load and VOUT = VREF = 1.235 V (representing the highest load current and lowest loop gain), a minimum COUT of 3.3 μF is recommended. For the LP2950, no load stability is inherent in the design — a desirable feature in CMOS circuits that are put in standby (such as RAM keep-alive applications). If the LP2951 is used with external resistors to set the output voltage, a minimum load current of 1 μA is recommended through the resistor divider. ESR Range The regulator control loop relies on the ESR of the output capacitor to provide a zero to add sufficient phase margin to ensure unconditional regulator stability; this requires the closed-loop gain to intersect the open-loop response in a region where the open-loop gain rolls off at 20 dB/decade. This ensures that the phase always is less than 180° (phase margin greater than 0°) at unity gain. Thus, a minimum-maximum range for the ESR must be observed. The upper limit of this ESR range is established by the fact that too high an ESR could result in the zero occurring too soon, causing the gain to roll off too slowly, which, in turn allows a third pole to appear before unity gain and introduce enough phase shift to cause instability. This typically limits the max ESR to approximately 5 Ω. Conversely, the lower limit of the ESR is tied to the fact that too low an ESR shifts the zero too far out (past unity gain) and, thus, allows the gain to roll off at 40 dB/decade at unity gain, with a resulting phase shift of greater than 180°. Typically, this limits the minimum ESR to approximately 20 mΩ to 30 mΩ. For specific ESR requirements, see Typical Characteristics. Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 15 LP2950 LP2951 SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 www.ti.com Capacitor Types Most tantalum or aluminum electrolytics are suitable for use at the input. Film-type capacitors also work, but at higher cost. When operating at low temperature, care should be taken with aluminum electrolytics, as their electrolytes often freeze at –30°C. For this reason, solid tantalum capacitors should be used at temperatures below –25°C. Ceramic capacitors can be used, but due to their low ESR (as low as 5 mΩ to 10 mΩ), they may not meet the minimum ESR requirement previously discussed. If a ceramic capacitor is used, a series resistor between 0.1 Ω to 2 Ω must be added to meet the minimum ESR requirement. In addition, ceramic capacitors have one glaring disadvantage that must be taken into account — a poor temperature coefficient, where the capacitance can vary significantly with temperature. For instance, a large-value ceramic capacitor (≥2.2 μF) can lose more than half of its capacitance as temperature rises from 25°C to 85°C. Thus, a 2.2-μF capacitor at 25°C drops well below the minimum COUT required for stability as ambient temperature rises. For this reason, select an output capacitor that maintains the minimum 2.2 μF required for stability for the entire operating temperature range. CBYPASS: Noise and Stability Improvement In the LP2951, an external FEEDBACK pin directly connected to the error amplifier noninverting input can allow stray capacitance to cause instability by shunting the error amplifier feedback to GND, especially at high frequencies. This is worsened if high-value external resistors are used to set the output voltage, because a high resistance allows the stray capacitance to play a more significant role; i.e., a larger RC time delay is introduced between the output of the error amplifier and its FEEDBACK input, leading to more phase shift and lower phase margin. A solution is to add a 100-pF bypass capacitor (CBYPASS) between OUTPUT and FEEDBACK; because CBYPASS is in parallel with R1, it lowers the impedance seen at FEEDBACK at high frequencies, in effect offsetting the effect of the parasitic capacitance by providing more feedback at higher frequencies. More feedback forces the error amplifier to work at a lower loop gain, so COUT should be increased to a minimum of 3.3 μF to improve the regulator’s phase margin. CBYPASS can be also used to reduce output noise in the LP2951. This bypass capacitor reduces the closed loop gain of the error amplifier at the high frequency, so noise no longer scales with the output voltage. This improvement is more noticeable with higher output voltages, because loop gain reduction is greatest. A suitable CBYPASS is calculated as shown in Equation 1: 1 f (CBYPASS) ] 200 Hz ³ CBYPASS + 2p R1 200 Hz (1) On the 3-pin LP2950, noise reduction can be achieved by increasing the output capacitor, which causes the regulator bandwidth to be reduced, therefore, eliminating high-frequency noise. However, this method is relatively inefficient, as increasing COUT from 1 μF to 220 μF only reduces the regulator’s output noise from 430 μV to 160 μV (over a 100-kHz bandwidth). ERROR Function (LP2951 Only) The LP2951 has a low-voltage detection comparator that outputs a logic low when the output voltage drops by 6% from its nominal value, and outputs a logic high when VOUT has reached 95% of its nominal value. This 95% of nominal figure is obtained by dividing the built-in offset of 60 mV by the 1.235-V bandgap reference, and remains independent of the programmed output voltage. For example, the trip-point threshold (ERROR output goes high) typically is 4.75 V for a 5-V output and 11.4 V for a 12-V output. Typically, there is a hysteresis of 15 mV between the thresholds for high and low ERROR output. A timing diagram is shown in Figure 1 for ERROR vs VOUT (5 V), as VIN is ramped up and down. ERROR becomes valid (low) when VIN 1.3 V. When VIN 5 V, VOUT = 4.75 V, causing ERROR to go high. Because the dropout voltage is load dependent, the output trip-point threshold is reached at different values of VIN, depending on the load current. For instance, at higher load current, ERROR goes high at a slightly higher value of VIN, and vice versa for lower load current. The output-voltage trip point remains at 4.75 V, regardless of the load. Note that when VIN ≤ 1.3 V, the ERROR comparator output is turned off and pulled high to its pullup voltage. If VOUT is used as the pullup voltage, rather than an external 5-V source, ERROR typically is 1.2 V. In this condition, an equal resistor divider (10 kΩ is suitable) can be tied to ERROR to divide down the voltage to a valid logic low during any fault condition, while still enabling a logic high during normal operation. 16 Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 LP2950 LP2951 www.ti.com SLVS582F – APRIL 2006 – REVISED DECEMBER 2009 Output Voltage 4.75 V ERROR 5V Input Voltage 1.3 V Figure 1. ERROR Output Timing Because the ERROR comparator has an open-collector output, an external pullup resistor is required to pull the output up to VOUT or another supply voltage (up to 30 V). The output of the comparator is rated to sink up to 400 μA. A suitable range of values for the pullup resistor is from 100 kΩ to 1 MΩ. If ERROR is not used, it can be left open. Programming Output Voltage (LP2951 Only) A unique feature of the LP2951 is its ability to output either a fixed voltage or an adjustable voltage, depending on the external pin connections. To output the internally programmed fixed voltage, tie the SENSE pin to the OUTPUT pin and the FEEDBACK pin to the VTAP pin. Alternatively, a user-programmable voltage ranging from the internal 1.235-V reference to a 30-V max can be set by using an external resistor divider pair. The resistor divider is tied to VOUT, and the divided-down voltage is tied directly to FEEDBACK for comparison against the internal 1.235-V reference. To satisfy the steady-state condition in which its two inputs are equal, the error amplifier drives the output to equal Equation 2: V OUT + V REF Ǔ*I ǒ 1 ) R1 R2 FB R1 Where: VREF = 1.235 V applied across R2 IFB = FEEDBACK bias current, typically 20 nA A minimum regulator output current of 1 μA must be maintained. Thus, in an application where a no-load condition is expected (for example, CMOS circuits in standby), this 1-μA minimum current must be provided by the resistor pair, effectively imposing a maximum value of R2 = 1.2 MΩ (1.235 V/1.2 MΩ 1 μA). IFB = 20 nA introduces an error of 0.02% in VOUT. This can be offset by trimming R1. Alternatively, increasing the divider current makes IFB less significant, thus, reducing its error contribution. For instance, using R2 = 100 kΩ reduces the error contribution of IFB to 0.17% by increasing the divider current to 12 μA. This increase in the divider current still is small compared to the 600-μA typical quiescent current of the LP2951 under no load. (2) Submit Documentation Feedback Copyright © 2006–2009, Texas Instruments Incorporated Product Folder Link(s): LP2950 LP2951 17 PACKAGE OPTION ADDENDUM www.ti.com 7-Apr-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty LP2950-30LP ACTIVE TO-92 LP 3 1000 Pb-Free (RoHS) CU SN N / A for Pkg Type LP2950-30LPE3 ACTIVE TO-92 LP 3 1000 Pb-Free (RoHS) CU SN N / A for Pkg Type LP2950-30LPR ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type LP2950-30LPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type LP2950-33LPE3 ACTIVE TO-92 LP 3 1000 Pb-Free (RoHS) CU SN N / A for Pkg Type LP2950-33LPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type LP2950-50LPRE3 ACTIVE TO-92 LP 3 2000 Pb-Free (RoHS) CU SN N / A for Pkg Type LP2951-30D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-30DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-30DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-30DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-30DRGR ACTIVE SON DRG 8 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR LP2951-33D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-33DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-33DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-33DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-33DRGR ACTIVE SON DRG 8 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR LP2951-50D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-50DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-50DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-50DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951-50DRGR ACTIVE SON DRG 8 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR LP2951D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM LP2951DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 7-Apr-2010 Orderable Device Status (1) Package Type Package Drawing LP2951DRG4 ACTIVE SOIC D Pins Package Eco Plan (2) Qty 8 2500 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 27-Oct-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP2951-30DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LP2951-33DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LP2951-50DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 LP2951DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 27-Oct-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP2951-30DR SOIC D 8 2500 340.5 338.1 20.6 LP2951-33DR SOIC D 8 2500 340.5 338.1 20.6 LP2951-50DR SOIC D 8 2500 340.5 338.1 20.6 LP2951DR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 MECHANICAL DATA MSOT002A – OCTOBER 1994 – REVISED NOVEMBER 2001 LP (O-PBCY-W3) PLASTIC CYLINDRICAL PACKAGE 0.205 (5,21) 0.175 (4,44) 0.165 (4,19) 0.125 (3,17) DIA 0.210 (5,34) 0.170 (4,32) Seating Plane 0.157 (4,00) MAX 0.050 (1,27) C 0.500 (12,70) MIN 0.104 (2,65) FORMED LEAD OPTION 0.022 (0,56) 0.016 (0,41) 0.016 (0,41) 0.014 (0,35) STRAIGHT LEAD OPTION D 0.135 (3,43) MIN 0.105 (2,67) 0.095 (2,41) 0.055 (1,40) 0.045 (1,14) 1 2 3 0.105 (2,67) 0.080 (2,03) 0.105 (2,67) 0.080 (2,03) 4040001-2 /C 10/01 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Lead dimensions are not controlled within this area D. FAlls within JEDEC TO -226 Variation AA (TO-226 replaces TO-92) E. Shipping Method: Straight lead option available in bulk pack only. Formed lead option available in tape & reel or ammo pack. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 MECHANICAL DATA MSOT002A – OCTOBER 1994 – REVISED NOVEMBER 2001 LP (O-PBCY-W3) PLASTIC CYLINDRICAL PACKAGE 0.539 (13,70) 0.460 (11,70) 1.260 (32,00) 0.905 (23,00) 0.650 (16,50) 0.610 (15,50) 0.020 (0,50) MIN 0.098 (2,50) 0.384 (9,75) 0.335 (8,50) 0.748 (19,00) 0.217 (5,50) 0.433 (11,00) 0.335 (8,50) 0.748 (19,00) 0.689 (17,50) 0.114 (2,90) 0.094 (2,40) 0.114 (2,90) 0.094 (2,40) 0.169 (4,30) 0.146 (3,70) DIA 0.266 (6,75) 0.234 (5,95) 0.512 (13,00) 0.488 (12,40) TAPE & REEL 4040001-3 /C 10/01 NOTES: A. All linear dimensions are in inches (millimeters). B. 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