TI SN74ABT623N

SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUARY 1991 – REVISED MAY 1997
D
D
D
D
SN54ABT623A . . . JT OR W PACKAGE
SN74ABT623 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
SN54ABT623A . . . FK PACKAGE
(TOP VIEW)
description
A3
A4
A5
A6
A7
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
B1
B2
B3
B4
B5
A8
GND
B8
B7
B6
The SN54ABT623A and SN74ABT623 bus
transceivers are designed for asynchronous
communication between data buses. The
control-function implementation allows for
maximum flexibility in timing. The SN54ABT623A
and SN74ABT623 provide true data at their
outputs.
VCC
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
OEBA
D
State-of-the-Art EPIC-ΙΙB  BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Package, and Plastic (N)
and Ceramic (JT) DIPs
A2
A1
OEAB
VCC
D
These devices allow data transmission from the
A bus to the B bus or from the B bus to the A bus,
depending on the logic levels at the output-enable
(OEAB and OEBA) inputs.
The output-enable inputs can be used to disable the device so that the buses are effectively isolated. The
dual-enable configuration gives the transceivers the capability of storing data by simultaneously enabling OEAB
and OEBA. Each output reinforces its input in this configuration. When both OEAB and OEBA are enabled and
all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 total) remain
at their last states.
To ensure the high-impedance state during power up or power down, OEBA should be tied to VCC through a
pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by
the current-sourcing capability of the driver.
The SN54ABT623A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT623 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Copyright  1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUARY 1991 – REVISED MAY 1997
FUNCTION TABLE
INPUTS
OPERATION
OEBA
OEAB
L
L
B data to A bus
L
H
B data to A bus,
A data to B bus
H
L
Isolation
H
H
A data to B bus
logic symbol†
19
OEBA
1
OEAB
2
A1
EN1
EN2
1
1
3
A2
A3
A4
A5
A6
A7
A8
18
1
2
17
4
16
5
15
6
14
7
13
8
12
9
11
B1
B2
B3
B4
B5
B6
B7
B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
OEBA
OEAB
A1
19
1
2
18
To Seven Other Channels
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
B1
SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUARY 1991 – REVISED MAY 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT623A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABT623 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
recommended operating conditions (see Note 3)
SN54ABT623A
MAX
MIN
MAX
4.5
5.5
4.5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
IOH
IOL
High-level output current
VCC
–24
Low-level output current
48
∆t/∆v
Input transition rise or fall rate
High-level input voltage
SN74ABT623
MIN
2
2
0.8
Input voltage
0
Outputs enabled
TA
Operating free-air temperature
NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
0
5
–55
125
–40
UNIT
V
V
0.8
V
VCC
–32
V
mA
64
mA
5
ns/V
85
°C
3
SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUARY 1991 – REVISED MAY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.5 V,
II = –18 mA
IOH = –3 mA
VCC = 5 V,
VCC = 4
4.5
5V
VOL
VCC = 4
4.5
5V
MIN
SN54ABT623A
MIN
–1.2
MAX
MIN
–1.2
2.5
IOH = –3 mA
IOH = –24 mA
3
3
3
2
2
IOH = –32 mA
IOL = 48 mA
2*
IOL = 64 mA
0.55
0.55*
0.55
mV
±1
±1
±100
±100
±100
50
µA
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.7 V
VO = 0.5 V
50**
10
–50**
–10
Ioff
VCC = 0,
VCC = 5.5 V,
VO = 5.5 V
VI or VO ≤ 4.5 V
±100
VCC = 5.5 V,
VO = 2.5 V
Outputs high
A or B ports
Data inp
inputs
ts
∆ICC¶
Control inputs
Ci
Control inputs
Cio
A or B ports
VCC = 5.5 V,
IO = 0,
VI = VCC or GND
VCC = 5.5 V, One
input at 3.4 V,,
Other inputs at VCC
or GND
Outputs high
50
–50
V
±1
IOZH‡
IOZL‡
IO§
V
2
0.55
VI = VCC or GND
A or B ports
UNIT
V
100
Control inputs
ICEX
–100
–180
50
–50
–180
–50
µA
–50
µA
±100
µA
50
µA
–180
mA
5
250
250
250
µA
22
30
30
30
mA
1
250
250
250
µA
Outputs enabled
1.5
1.5
1.5
Outputs disabled
0.05
0.05
0.05
1.5
1.5
1.5
Outputs low
Outputs disabled
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
POST OFFICE BOX 655303
mA
4
pF
7
pF
* On products compliant to MIL-PRF-38535, this parameter does not apply.
** These limits apply only to the SN74ABT623.
† All typical values are at VCC = 5 V.
‡ The parameters IOZH and IOZL include the input leakage current.
§ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
4
MAX
–1.2
2.5
VCC = 5
5.5
5V
V,
ICC
SN74ABT623
2.5
Vhys
II
TA = 25°C
TYP†
MAX
• DALLAS, TEXAS 75265
SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUARY 1991 – REVISED MAY 1997
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
tPZH
tPZL
OEBA
A
tPHZ
tPLZ
OEBA
A
tPZH
tPZL
OEAB
B
tPHZ
tPLZ
OEAB
B
PARAMETER
POST OFFICE BOX 655303
VCC = 5 V,
TA = 25°C
SN54ABT623A
SN74ABT623
MIN
TYP
MAX
MIN
MAX
MIN
MAX
1
2.6
4.1
1
4
1
4.6
1
2.6
4.2
0.8
4.1
1
4.6
1.7
3.4
6.5
1.2
5.4
1.7
7.5
1.7
3.8
6.5
1.5
6.8
1.7
7.5
1.7
4.2
6.5
1.7
7.1
1.7
7.5
1.7
4.7
6.5
1.5
7.1
1.7
7.5
1.7
4.8
6.5
1.2
6.8
1.7
7.5
1.7
4
6.5
1.7
6.5
1.7
7.5
1.7
3.9
6.5
1.5
6.8
1.7
7.5
1.7
3.2
6.5
1.3
5.8
1.7
7.5
• DALLAS, TEXAS 75265
UNIT
ns
ns
ns
ns
ns
5
SN54ABT623A, SN74ABT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS114D – FEBRUARY 1991 – REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
7V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
LOAD CIRCUIT
3V
Timing Input
1.5 V
0V
tw
tsu
3V
Input
1.5 V
1.5 V
th
3V
Data Input
1.5 V
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
VOH
1.5 V
Output
1.5 V
VOL
VOH
Output
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
0V
tPLZ
Output
Waveform 1
S1 at 7 V
(see Note B)
tPLH
tPHL
1.5 V
tPZL
tPHL
tPLH
3V
Output
Control
Output
Waveform 2
S1 at Open
(see Note B)
1.5 V
tPZH
3.5 V
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH – 0.3 V
VOH
≈0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9461801Q2A
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
5962-9461801QRA
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
1
TBD
Call TI
Level-NC-NC-NC
TBD
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
5962-9461801QSA
ACTIVE
CFP
W
20
SN74ABT623DBLE
OBSOLETE
SSOP
DB
20
SN74ABT623DBR
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623DBRE4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623DW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623DWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623DWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623DWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74ABT623NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74ABT623NSR
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623NSRE4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623PW
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623PWE4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623PWLE
OBSOLETE
TSSOP
PW
20
TBD
Call TI
SN74ABT623PWR
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT623PWRE4
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ54ABT623AFK
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54ABT623AJ
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54ABT623AW
ACTIVE
CFP
W
20
1
TBD
Call TI
Level-NC-NC-NC
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
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• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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• DALLAS, TEXAS 75265
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