TSL2571 LIGHT-TO-DIGITAL CONVERTER r r TAOS117A − FEBRUARY 2011 Features PACKAGE FN DUAL FLAT NO-LEAD (TOP VIEW) D Ambient Light Sensing (ALS) − − − − D D D D Approximates Human Eye Response Programmable Analog Gain Programmable Integration Time Programmable Interrupt Function with Upper and Lower Threshold − Resolution Up to 16 Bits − Very High Sensitivity — Operates Well Behind Darkened Glass − Up to 1,000,000:1 Dynamic Range Programmable Wait Timer − Programmable from 2.72 ms to > 8 Seconds − Wait State — 65 mA Typical Current I2C Interface Compatible − Up to 400 kHz (I2C Fast Mode) − Dedicated Interrupt Pin Small 2 mm 2 mm ODFN Package Sleep Mode — 2.5 mA Typical Current VDD 1 6 SDA SCL 2 5 INT GND 3 4 NC Applications D D D D D D Display Management Backlight Control Portable Device Power Optimization Cell Phones, PDA, GPS Notebooks and Monitors LCD TVs Description The TSL2571 family of devices provides ambient light sensing (ALS) that approximates human eye response to light intensity under a variety of lighting conditions and through a variety of attenuation materials. While useful for general purpose light sensing, the device is particularly useful for display management with the purpose of extending battery life and providing optimum viewing in diverse lighting conditions. Display panel and keyboard backlighting can account for up to 30 to 40 percent of total platform power. The ALS features are ideal for use in notebook PCs, LCD monitors, flat-panel televisions, and cell phones. Functional Block Diagram Interrupt GND INT Wait Control CH0 Data ALS Control CH0 CH1 ADC CH1 Data Lower Limit I2C Interface Upper Limit CH0 ADC VDD SCL SDA CH1 The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r Texas Advanced Optoelectronic Solutions Inc. 1001 Klein Road S Suite 300 S Plano, TX 75074 S (972) r 673-0759 www.taosinc.com 1 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Detailed Description The TSL2571 light-to-digital device includes on-chip photodiodes, integrating amplifiers, ADCs, accumulators, clocks, buffers, comparators, a state machine, and an I2C interface. The device combines one photodiode (CH0), which is responsive to both visible and infrared light, and one photodiode (CH1), which is responsive primarily to infrared light. Two integrating ADCs simultaneously convert the amplified photodiode currents into a digital value providing up to 16 bits of resolution. Upon completion of the conversion cycle, the conversion result is transferred to the data registers. This digital output can be read by a microprocessor through which the illuminance (ambient light level) in lux is derived using an empirical formula to approximate the human eye response. Communication to the device is accomplished through a fast (up to 400 kHz), two-wire I2C serial bus for easy connection to a microcontroller or embedded controller. The digital output of the device is inherently more immune to noise when compared to an analog interface. The device provides a separate pin for level-style interrupts. When interrupts are enabled and a pre-set value is exceeded, the interrupt pin is asserted and remains asserted until cleared by the controlling firmware. The interrupt feature simplifies and improves system efficiency by eliminating the need to poll a sensor for a light intensity value. An interrupt is generated when the value of an ALS conversion exceeds either an upper or lower threshold. In addition, a programmable interrupt persistence feature allows the user to determine how many consecutive exceeded thresholds are necessary to trigger an interrupt. Interrupt thresholds and persistence settings are configured independently. Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 2 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Terminal Functions TERMINAL TYPE NAME NO. GND 3 INT 5 NC 4 SCL 2 I SDA 6 I/O VDD 1 DESCRIPTION Power supply ground. All voltages are referenced to GND. O Interrupt — open drain (active low). Do not connect. I2C serial clock input terminal — clock signal for I2C serial data. I2C serial data I/O terminal — serial data I/O for I2C . Supply voltage. Available Options DEVICE PACKAGE − LEADS INTERFACE DESCRIPTION ORDERING NUMBER TSL25711 0x39 FN−6 I2C Vbus = VDD Interface TSL25711FN TSL25713 0x39 FN−6 I2C Vbus = 1.8 V Interface TSL25713FN TSL25715† 0x29 FN−6 I2C Vbus = VDD Interface TSL25715FN FN−6 I2C TSL25717FN TSL25717† † ADDRESS 0x29 Vbus = 1.8 V Interface Contact TAOS for availability. Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 V Digital output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.8 V Digital output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1 mA to 20 mA Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C ESD tolerance, human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000 V † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to GND. Recommended Operating Conditions MIN NOM MAX Supply voltage, VDD 2.6 3 3.6 V Operating free-air temperature, TA −30 70 °C The LUMENOLOGY r Company UNIT Copyright E 2011, TAOS Inc. r r www.taosinc.com 3 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Operating Characteristics, VDD = 3 V, TA = 25C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN Active IDD Supply current VOL INT SDA output low voltage INT, I LEAK Leakage current, SDA, SCL, INT pins VIH SCL SDA input high voltage SCL, VIL SCL SDA input low voltage SCL, TYP MAX 175 250 Wait mode 65 Sleep mode — no I2C activity 2.5 μA 4 3 mA sink current 0 0.4 6 mA sink current 0 0.6 −5 5 TSL25711, TSL25715 0.7 VDD TSL25713, TSL25717 1.25 UNIT V μA V TSL25711, TSL25715 0.3 VDD TSL25713, TSL25717 0.54 V ALS Characteristics, VDD = 3 V, TA = 25C, Gain = 16, AEN = 1 (unless otherwise noted) (Notes 1 ,2, 3) PARAMETER TEST CONDITIONS Dark ADC count value Ee = 0, AGAIN = 120×, ATIME = 0xDB (100 ms) ADC integration time step size ATIME = 0xFF CHANNEL MIN TYP MAX CH0 0 1 5 CH1 0 1 5 2.58 2.72 2.9 ADC Number of integration steps ADC counts per step ATIME = 0xFF ADC count value ATIME = 0xC0 ADC count value ADC count value ratio: CH1/CH0 Re Irradiance responsivity G i scaling, Gain li relative l ti to t 1× gain i setting CH0 λp = 850 nm, Ee = 219.7 μW/cm2, ATIME = 0xF6 (27 ms) See note 3. CH0 ms 256 steps 0 1024 counts 65535 counts 4000 CH1 5000 6000 790 4000 CH1 5000 6000 counts 2800 λp = 625 nm nm, ATIME = 0xF6 (27 ms) See note 2 2. 10 8 10.8 15 8 15.8 20.8 20 8 λp = 850 nm nm, ATIME = 0xF6 (27 ms) See note 3 3. 41 56 68 λp = 625 nm, ATIME = 0xF6 (27 ms) See note 2. CH0 29.1 CH1 4.6 λp = 850 nm, ATIME = 0xF6 (27 ms) See note 3. CH0 22.8 CH1 12.7 % counts/ (μW/ cm2) 8× −10 10 16× −10 10 10 −10 10 120× counts 1 0 λp = 625 nm, Ee = 171.6 μW/cm2, ATIME = 0xF6 (27 ms) See note 2. UNIT % NOTES: 1. Optical measurements are made using small-angle incident radiation from light-emitting diode optical sources. Visible 625 nm LEDs and infrared 850 nm LEDs are used for final product testing for compatibility with high-volume production. 2. The 625 nm irradiance Ee is supplied by an AlInGaP light-emitting diode with the following typical characteristics: peak wavelength λp = 625 nm and spectral halfwidth Δλ½ = 20 nm. 3. The 850 nm irradiance Ee is supplied by a GaAs light-emitting diode with the following typical characteristics: peak wavelength λp = 850 nm and spectral halfwidth Δλ½ = 42 nm. Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 4 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Wait Characteristics, VDD = 3 V, TA = 25C, WEN = 1 (unless otherwise noted) PARAMETER TEST CONDITIONS Wait step size CHANNEL WTIME = 0xFF Wait number of integration steps MIN TYP 2.58 2.72 1 MAX UNIT 2.9 ms 256 steps AC Electrical Characteristics, VDD = 3 V, TA = 25C (unless otherwise noted) PARAMETER† † (I2C TEST CONDITIONS MIN only) TYP 0 MAX UNIT 400 kHz f(SCL) Clock frequency t(BUF) Bus free time between start and stop condition 1.3 μs t(HDSTA) Hold time after (repeated) start condition. After this period, the first clock is generated. 0.6 μs t(SUSTA) Repeated start condition setup time 0.6 μs t(SUSTO) Stop condition setup time 0.6 μs t(HDDAT) Data hold time 0 μs t(SUDAT) Data setup time 100 ns t(LOW) SCL clock low period 1.3 μs t(HIGH) SCL clock high period 0.6 μs tF Clock/data fall time 300 ns tR Clock/data rise time 300 ns Ci Input pin capacitance 10 pF Specified by design and characterization; not production tested. PARAMETER MEASUREMENT INFORMATION t(LOW) t(R) t(F) VIH SCL VIL t(HDSTA) t(BUF) t(HIGH) t(HDDAT) t(SUSTA) t(SUSTO) t(SUDAT) VIH SDA VIL P Stop Condition S S Start Condition Start P Stop t(LOWSEXT) SCLACK SCLACK t(LOWMEXT) t(LOWMEXT) t(LOWMEXT) SCL SDA Figure 1. Timing Diagrams The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 5 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 TYPICAL CHARACTERISTICS SPECTRAL RESPONSIVITY NORMALIZED IDD vs. VDD and TEMPERATURE 110% 1 Ch 0 108% 75C IDD Normalized @ 3 V, 25C Normalized Responsivity 0.8 0.6 0.4 Ch 1 106% 104% 50C 25C 102% 100% 0.2 0C 98% 96% 94% 0 300 400 500 600 700 800 92% 2.7 900 1000 1100 2.8 2.9 λ − Wavelength − nm 3 3.1 3.2 3.3 VDD — V Figure 2 Figure 3 NORMALIZED RESPONSIVITY vs. ANGULAR DISPLACEMENT 1.0 Optical Axis Normalized Responsivity 0.8 0.6 0.4 0.2 0 −90 -Q +Q 90 −60 −30 0 30 60 Q − Angular Displacement − ° Figure 4 Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 6 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 PRINCIPLES OF OPERATION System State Machine The device provides control of ALS and power management functionality through an internal state machine (Figure 5). After a power-on-reset, the device is in the sleep mode. As soon as the PON bit is set, the device will move to the start state. It will then continue through the Wait and ALS states. If these states are enabled, the device will execute each function. If the PON bit is set to 0, the state machine will continue until all conversions are completed and then go into a low power sleep mode. Sleep PON = 1 (r 0:b0) PON = 0 (r 0:b0) Start ALS Wait Figure 5. Simplified State Diagram NOTE: In this document, the nomenclature uses the bit field name in italic followed by the register number and bit number to allow the user to easily identify the register and bit that controls the function. For example, the power on (PON) is in register 0, bit 0. This is represented as PON (r0:b0). Photodiodes Conventional silicon detectors respond strongly to infrared light, which the human eye does not see. This can lead to significant error when the infrared content of the ambient light is high (such as with incandescent lighting) due to the difference between the silicon detector response and the brightness perceived by the human eye. This problem is overcome through the use of two photodiodes. The channel 0 photodiode, referred to as the CH0 channel, is sensitive to both visible and infrared light, while the channel 1 photodiode, referred to as CH1, is sensitive primarily to infrared light. Two integrating ADCs convert the photodiode currents to digital outputs. The ADC digital outputs from the two channels are used in a formula to obtain a value that approximates the human eye response in units of lux. The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 7 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 ALS Operation The ALS engine contains ALS gain control (AGAIN) and two integrating analog-to-digital converters (ADC) for the Channel 0 and Channel 1 photodiodes. The ALS integration time (ATIME) impacts both the resolution and the sensitivity of the ALS reading. Integration of both channels occurs simultaneously and upon completion of the conversion cycle, the results are transferred to the data registers (C0DATA and C1DATA). This data is also referred to as channel count. The transfers are double-buffered to ensure data integrity. ATIME(r 1) 2.72 ms to 696 ms CH0 ALS CH0 Data C0DATAH(r 0x15), C0DATA(r 0x14) ALS Control CH0 CH1 ADC CH1 Data C1DATAH(r 0x17), C1DATA(r 0x16) CH1 AGAIN(r 0x0F, b1:0) 1, 8, 16, 120 Gain Figure 6. ALS Operation The registers for programming the integration and wait times are a 2’s compliment values. The actual time can be calculated as follows: ATIME = 256 − Integration Time / 2.72 ms Inversely, the time can be calculated from the register value as follows: Integration Time = 2.72 ms × (256 − ATIME) In order to reject 50/60-Hz ripple strongly present in fluorescent lighting, the integration time needs to be programmed in multiples of 10 / 8.3 ms or the half cycle time. Both frequencies can be rejected with a programmed value of 50 ms (ATIME = 0xED) or multiples of 50 ms (i.e. 100, 150, 200, 400, 600). The registers for programming the AGAIN hold a two-bit value representing a gain of 1×, 8×, 16×, or 120×. The gain, in terms of amount of gain, will be represented by the value AGAINx, i.e. AGAINx = 1, 8, 16, or 120. Lux Equation The lux calculation is a function of CH0 channel count (C0DATA), CH1 channel count (C1DATA), ALS gain (AGAINx), and ALS integration time in milliseconds (ATIME_ms). If an aperture, glass/plastic, or a light pipe attenuates the light equally across the spectrum (300 nm to 1100 nm), then a scaling factor referred to as glass attenuation (GA) can be used to compensate for attenuation. For a device in open air with no aperture or glass/plastic above the device, GA = 1. If it is not spectrally flat, then a custom lux equation with new coefficients should be generated. (See TAOS application note). Counts per Lux (CPL) needs to be calculated only when ATIME or AGAIN is changed, otherwise it remains a constant. The first segment of the equation (Lux1) covers fluorescent and incandescent light. The second segment (Lux2) covers dimmed incandescent light. The final lux is the maximum of Lux1, Lux2, or 0. CPL = (ATIME_ms × AGAINx) / (GA × 53) Lux1 = (C0DATA − 2 × C1DATA) / CPL Lux2 = (0.6 × C0DATA − C1DATA) / CPL Lux = MAX(Lux1, Lux2, 0) Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 8 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Interrupts The interrupt feature simplifies and improves system efficiency by eliminating the need to poll the sensor for light intensity values outside of a user-defined range. While the interrupt function is always enabled and it’s status is available in the status register (0x13), the output of the interrupt state can be enabled using the ALS interrupt enable (AIEN) field in the enable register (0x00). Two 16-bit interrupt threshold registers allow the user to set limits below and above a desired light level range. An interrupt can be generated when the ALS CH0 data (C0DATA) falls outside of the desired light level range, as determined by the values in the ALS interrupt low threshold registers (AILTx) and ALS interrupt high threshold registers (AIHTx). It is important to note that the low threshold value must be less than the high threshold value for proper operation. To further control when an interrupt occurs, the device provides a persistence filter. The persistence filter allows the user to specify the number of consecutive out-of-range ALS occurrences before an interrupt is generated. The persistence register (0x0C) allows the user to set the ALS persistence (APERS) value. See the persistence register for details on the persistence filter values. Once the persistence filter generates an interrupt, it will continue until a special function interrupt clear command is received (see command register). AIHTH(r 07), AIHTL(r 06) Upper Limit CH0 ADC APERS(r 0x0C, b3:0) ALS Persistence CH0 Data Lower Limit CH0 AILTH(r 05), AILTL(r 04) Figure 7. Programmable Interrupt The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 9 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 State Diagram Figure 8 shows a more detailed flow for the state machine. The device starts in the sleep mode. The PON bit is written to enable the device. A 2.72-ms delay will occur before entering the start state. If the WEN bit is set, the state machine will then cycle through the wait state. If the WLONG bit is set, the wait cycles are extended by 12× over normal operation. When the wait counter terminates, the state machine will step to the ALS state. The AEN should always be set. In this case, a minimum of 1 integration time step should be programmed. The ALS state machine will continue until it reaches the terminal count at which point the data will be latched in the ALS register and the interrupt set, if enabled. 1 to 256 steps Step: 2.72 ms Time: 2.72 ms − 696 ms 120 Hz Minimum − 8 ms 100 Hz Minimum − 10 ms Sleep PON = 1 PON = 0 Start ALS ALS Check AEN = 1 Wait Check ALS Delay 2.72 ms WEN = 1 Wait WLONG = 0 1 to 256 steps Step: 2.72 ms Time: 2.72 ms − 696 ms Minimum − 2.72 ms WLONG = 1 1 to 256 steps Step: 32.64 ms Time: 32.64 ms − 8.35 s Minimum − 32.64 ms Figure 8. Expanded State Diagram Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 10 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 I2C Protocol Interface and control are accomplished through an I2C serial compatible interface (standard or fast mode) to a set of registers that provide access to device control functions and output data. The devices support the 7-bit I2C addressing protocol. The I2C standard provides for three types of bus transaction: read, write, and a combined protocol (Figure 17). During a write operation, the first byte written is a command byte followed by data. In a combined protocol, the first byte written is the command byte followed by reading a series of bytes. If a read command is issued, the register address from the previous command will be used for data access. Likewise, if the MSB of the command is not set, the device will write a series of bytes at the address stored in the last valid command with a register address. The command byte contains either control information or a 5-bit register address. The control commands can also be used to clear interrupts. The I2C bus protocol was developed by Philips (now NXP). For a complete description of the I2C protocol, please review the NXP I2C design specification at http://www.i2c−bus.org/references/. A N P R S S W ... Acknowledge (0) Not Acknowledged (1) Stop Condition Read (1) Start Condition Repeated Start Condition Write (0) Continuation of protocol Master-to-Slave Slave-to-Master 1 S 7 Slave Address 1 W 1 A 8 1 Command Code 8 A 1 Data Byte A 8 1 1 ... P I2C Write Protocol 1 S 7 Slave Address 1 R 1 A 8 1 Data A Data A 1 ... P I2C Read Protocol 1 7 1 1 8 1 1 7 1 1 S Slave Address W A Command Code A S Slave Address R A 8 Data 1 8 A Data 1 A 1 ... P I2C Read Protocol — Combined Format Figure 9. I2C Protocols The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 11 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Register Set The device is controlled and monitored by data registers and a command register accessed through the serial interface. These registers provide for a variety of control functions and can be read to determine results of the ADC conversions. The register set is summarized in Table 1. Table 1. Register Address ADDRESS RESISTER NAME R/W −− COMMAND W 0x00 ENABLE 0x01 0x03 0x04 0x05 0x06 REGISTER FUNCTION RESET VALUE Specifies register address 0x00 R/W Enables states and interrupts 0x00 ATIME R/W ALS ADC time 0xFF WTIME R/W Wait time 0xFF AILTL R/W ALS interrupt low threshold low byte 0x00 AILTH R/W ALS interrupt low threshold high byte 0x00 AIHTL R/W ALS interrupt high threshold low byte 0x00 0x07 AIHTH R/W ALS interrupt high threshold high byte 0x00 0x0C PERS R/W Interrupt persistence filters 0x00 0x0D CONFIG R/W Configuration 0x00 0x0F CONTROL R/W Control register 0x00 0x12 ID R Device ID 0x13 STATUS R Device status 0x00 0x14 C0DATA R CH0 ADC low data register 0x00 0x15 C0DATAH R CH0 ADC high data register 0x00 0x16 C1DATA R CH1 ADC low data register 0x00 0x17 C1DATAH R CH1 ADC high data register 0x00 ID The mechanics of accessing a specific register depends on the specific protocol used. See the section on I2C protocols on the previous pages. In general, the COMMAND register is written first to specify the specific control/status register for following read/write operations. Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 12 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Command Register The command registers specifies the address of the target register for future write and read operations. Table 2. Command Register 7 6 COMMAND COMMAND FIELD BITS COMMAND 7 TYPE 6:5 5 4 3 TYPE 2 1 0 −− ADD DESCRIPTION Select Command Register. Must write as 1 when addressing COMMAND register. Selects type of transaction to follow in subsequent data transfers: FIELD VALUE DESCRIPTION 00 Repeated byte protocol transaction 01 Auto-increment protocol transaction 10 Reserved — Do not use 11 Special function — See description below Transaction type 00 will repeatedly read the same register with each data access. Transaction type 01 will provide an auto-increment function to read successive register bytes. ADD 4:0 Address register/special function field. Depending on the transaction type, see above, this field either specifies a special function command or selects the specific control-status-register for following write and read transactions. The field values listed below apply only to special function commands: FIELD VALUE DESCRIPTION 00000 Normal — no action 00110 ALS interrupt clear other Reserved — do not write ALS interrupt clear — clears any pending ALS interrupt. This special function is self clearing. The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 13 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Enable Register (0x00) The ENABLE register is used to power the device on/off, enable functions, and interrupts. Table 3. Enable Register 7 6 5 Reserved ENABLE 4 3 2 1 0 AIEN WEN Reserved AEN PON Address 0x00 FIELD BITS DESCRIPTION Reserved 7:5 AIEN 4 ALS interrupt mask. When asserted, permits ALS interrupts to be generated. WEN 3 Wait enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables the wait timer. Reserved 2 Reserved. Write as 0. AEN 1 ALS Enable. Writing a 1 activates the ALS. Writing a 0 disables the ALS. PON 1 0 Power ON. This bit activates the internal oscillator to permit the timers and ADC channels to operate. Writing a 1 activates the oscillator. Writing a 0 disables the oscillator. Reserved. Write as 0. NOTE 1: A minimum interval of 2.72 ms must pass after PON is asserted before ALS can be initiated. This required time is enforced by the hardware in cases where the firmware does not provide it. ALS Timing Register (0x01) The ALS timing register controls the internal integration time of the ALS ADCs in 2.72-ms increments. Table 4. ALS Timing Register FIELD BITS ATIME 7:0 Copyright E 2011, TAOS Inc. DESCRIPTION VALUE INTEG_CYCLES TIME 0xFF 1 2.72 ms 1024 0xF6 10 27.2 ms 10240 0xDB 37 101 ms 37888 0xC0 64 174 ms 65535 0x00 256 696 ms 65535 The LUMENOLOGY r Company r r 14 MAX COUNT www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Wait Time Register (0x03) Wait time is set 2.72 ms increments unless the WLONG bit is asserted in which case the wait times are 12× longer. WTIME is programmed as a 2’s complement number. Table 5. Wait Time Register FIELD BITS WTIME 7:0 DESCRIPTION REGISTER VALUE WAIT TIME TIME (WLONG = 0) TIME (WLONG = 1) 0xFF 1 2.72 ms 0.032 sec 0xB6 74 201 ms 2.4 sec 0x00 256 696 ms 8.3 sec NOTE: The Wait Time Register should be configured before AEN is asserted. ALS Interrupt Threshold Registers (0x04 − 0x07) The ALS interrupt threshold registers provides the values to be used as the high and low trigger points for the comparison function for interrupt generation. If C0DATA crosses below the low threshold specified, or above the higher threshold, an interrupt is asserted on the interrupt pin. Table 6. ALS Interrupt Threshold Registers REGISTER ADDRESS BITS AILTL 0x04 7:0 ALS low threshold lower byte DESCRIPTION AILTH 0x05 7:0 ALS low threshold upper byte AIHTL 0x06 7:0 ALS high threshold lower byte AIHTH 0x07 7:0 ALS high threshold upper byte The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 15 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Persistence Register (0x0C) The persistence register controls the filtering interrupt capabilities of the device. Configurable filtering is provided to allow interrupts to be generated after each ADC integration cycle or if the ADC integration has produced a result that is outside of the values specified by threshold register for some specified amount of time. ALS interrupts are generated using C0DATA. Table 7. Persistence Register 7 6 PERS 5 4 3 2 Reserved 1 0 Address 0x0C APERS FIELD BITS Reserved 7:4 Reserved DESCRIPTION APERS 3:0 Interrupt persistence. Controls rate of interrupt to the host processor. FIELD VALUE MEANING 0000 Every INTERRUPT PERSISTENCE FUNCTION 0001 1 1 value outside of threshold range 0010 2 2 consecutive values out of range Every ALS cycle generates an interrupt 0011 3 3 consecutive values out of range 0100 5 5 consecutive values out of range 0101 10 10 consecutive values out of range 0110 15 15 consecutive values out of range 0111 20 20 consecutive values out of range 1000 25 25 consecutive values out of range 1001 30 30 consecutive values out of range 1010 35 35 consecutive values out of range 1011 40 40 consecutive values out of range 1100 45 45 consecutive values out of range 1101 50 50 consecutive values out of range 1110 55 55 consecutive values out of range 1111 60 60 consecutive values out of range Configuration Register (0x0D) The configuration register sets the wait long time. Table 8. Configuration Register 7 6 5 CONFIG 4 3 2 Reserved 0 WLONG Reserved Address 0x0D FIELD BITS Reserved 7:2 WLONG 1 Wait Long. When asserted, the wait cycles are increased by a factor 12× from that programmed in the WTIME register. Reserved 0 Reserved. Write as 0. Copyright E 2011, TAOS Inc. DESCRIPTION Reserved. Write as 0. The LUMENOLOGY r Company r r 16 1 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 Control Register (0x0F) The Control register provides eight bits of miscellaneous control to the analog block. These bits typically control functions such as gain settings and/or diode selection. Table 9. Control Register 7 6 5 CONTROL 4 3 2 1 0 Reserved FIELD BITS Reserved 7:2 Reserved. Write bits as 0 AGAIN 1:0 ALS Gain Control. Address 0x0F AGAIN DESCRIPTION FIELD VALUE ALS GAIN VALUE 00 1× gain 01 8× gain 10 16× gain 11 120× gain ID Register (0x12) The ID Register provides the value for the part number. The ID register is a read-only register. Table 10. ID Register 7 6 5 4 ID 3 2 1 0 Address 0x12 ID FIELD BITS ID 7:0 DESCRIPTION 0x04 = TSL25711 & TSL25715 Part number identification 0x0D = TSL25713 & TSL25717 Status Register (0x13) The Status Register provides the internal status of the device. This register is read only. Table 11. Status Register 7 STATUS 6 5 Reserved FIELD BIT Reserved 7:5 AINT 4 Reserved 3:1 AVALID 0 4 3 AINT 2 1 Reserved 0 AVALID Address 0x13 DESCRIPTION Reserved. Write as 0. ALS Interrupt. Indicates that the device is asserting an ALS interrupt. Reserved. ALS Valid. Indicates that the ALS CH0 / CH1 channels have completed an integration cycle. The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 17 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 ADC Channel Data Registers (0x14 − 0x17) ALS data is stored as two 16−bit values. To ensure the data is read correctly, a two−byte read I2C transaction should be used with auto increment protocol bits set in the command register. With this operation, when the lower byte register is read, the upper eight bits are stored in a shadow register, which is read by a subsequent read to the upper byte. The upper register will read the correct value even if additional ADC integration cycles end between the reading of the lower and upper registers. Table 12. ADC Channel Data Registers Copyright E 2011, TAOS Inc. REGISTER ADDRESS BITS C0DATA 0x14 7:0 ALS CH0 data low byte DESCRIPTION C0DATAH 0x15 7:0 ALS CH0 data high byte C1DATA 0x16 7:0 ALS CH1 data low byte C1DATAH 0x17 7:0 ALS CH1 data high byte The LUMENOLOGY r Company r r 18 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 APPLICATION INFORMATION: HARDWARE Typical Hardware Application A typical hardware application circuit is shown in Figure 10. A 1-μF low-ESR decoupling capacitor should be placed as close as possible to the VDD pin. VDD VBUS VDD RP 1 mF TSL2571 RP RPI INT SCL GND SDA Figure 10. Typical Application Hardware Circuit VBUS in Figure 10 refers to the I2C bus voltage, which is either VDD or 1.8 V. Be sure to apply the specified I2C bus voltage shown in the Available Options table for the specific device being used. The I2C signals and the Interrupt are open-drain outputs and require pull-up resistors. The pull-up resistor (RP) value is a function of the I2C bus speed, the I2C bus voltage, and the capacitive load. The TAOS EVM running at 400 kbps, uses 1.5-kΩ resistors. A 10-kΩ pull-up resistor (RPI) can be used for the interrupt line. PCB Pad Layout Suggested PCB pad layout guidelines for the Dual Flat No-Lead (FN) surface mount package are shown in Figure 11. 2500 Note: Pads can be extended further if hand soldering is needed. 1000 1000 400 650 1700 650 400 NOTES: A. All linear dimensions are in micrometers. B. This drawing is subject to change without notice. Figure 11. Suggested FN Package PCB Layout The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 19 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 MECHANICAL DATA PACKAGE FN Dual Flat No-Lead TOP VIEW 466 10 PIN OUT TOP VIEW PIN 1 466 10 2000 100 2000 100 VDD 1 6 SDA SCL 2 5 INT GND 3 4 NC Photodiode Array Area END VIEW SIDE VIEW 295 Nominal 650 50 203 8 650 300 50 BOTTOM VIEW CL of Photodiode Array Area (Note B) CL of Solder Contacts 20 Nominal 140 Nominal CL of Solder Contacts CL of Photodiode Array Area (Note B) PIN 1 Pb 750 150 NOTES: A. B. C. D. E. F. Lead Free All linear dimensions are in micrometers. Dimension tolerance is ± 20 μm unless otherwise noted. The die is centered within the package within a tolerance of ± 3 mils. Package top surface is molded with an electrically nonconductive clear plastic compound having an index of refraction of 1.55. Contact finish is copper alloy A194 with pre-plated NiPdAu lead finish. This package contains no lead (Pb). This drawing is subject to change without notice. Figure 12. Package FN — Dual Flat No-Lead Packaging Configuration Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 20 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 MECHANICAL DATA TOP VIEW 2.00 0.05 1.75 4.00 1.50 4.00 B + 0.30 8.00 − 0.10 3.50 0.05 1.00 0.25 A B A DETAIL B DETAIL A 5 Max 5 Max 0.254 0.02 2.18 0.05 NOTES: A. B. C. D. E. F. G. 2.18 0.05 0.83 0.05 Ao Bo Ko All linear dimensions are in millimeters. Dimension tolerance is ± 0.10 mm unless otherwise noted. The dimensions on this drawing are for illustrative purposes only. Dimensions of an actual carrier may vary slightly. Symbols on drawing Ao, Bo, and Ko are defined in ANSI EIA Standard 481−B 2001. Each reel is 178 millimeters in diameter and contains 3500 parts. TAOS packaging tape and reel conform to the requirements of EIA Standard 481−B. In accordance with EIA standard, device pin 1 is located next to the sprocket holes in the tape. This drawing is subject to change without notice. Figure 13. Package FN Carrier Tape The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 21 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 MANUFACTURING INFORMATION The FN package has been tested and has demonstrated an ability to be reflow soldered to a PCB substrate. The solder reflow profile describes the expected maximum heat exposure of components during the solder reflow process of product on a PCB. Temperature is measured on top of component. The components should be limited to a maximum of three passes through this solder reflow profile. Table 13. Solder Reflow Profile PARAMETER REFERENCE DEVICE Average temperature gradient in preheating Soak time 2.5°C/sec tsoak 2 to 3 minutes Time above 217°C (T1) t1 Max 60 sec Time above 230°C (T2) t2 Max 50 sec Time above Tpeak −10°C (T3) t3 Max 10 sec Peak temperature in reflow Tpeak 260°C Temperature gradient in cooling Tpeak Max −5°C/sec Not to scale — for reference only T3 T2 Temperature (C) T1 Time (sec) t3 t2 tsoak t1 Figure 14. Solder Reflow Profile Graph Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 22 www.taosinc.com TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 MANUFACTURING INFORMATION Moisture Sensitivity Optical characteristics of the device can be adversely affected during the soldering process by the release and vaporization of moisture that has been previously absorbed into the package. To ensure the package contains the smallest amount of absorbed moisture possible, each device is dry-baked prior to being packed for shipping. Devices are packed in a sealed aluminized envelope called a moisture barrier bag with silica gel to protect them from ambient moisture during shipping, handling, and storage before use. The FN package has been assigned a moisture sensitivity level of MSL 3 and the devices should be stored under the following conditions: Temperature Range Relative Humidity Total Time Opened Time 5°C to 50°C 60% maximum 12 months from the date code on the aluminized envelope — if unopened 168 hours or fewer Rebaking will be required if the devices have been stored unopened for more than 12 months or if the aluminized envelope has been open for more than 168 hours. If rebaking is required, it should be done at 50°C for 12 hours. The LUMENOLOGY r Company Copyright E 2011, TAOS Inc. r r www.taosinc.com 23 TSL2571 LIGHT-TO-DIGITAL CONVERTER TAOS117A − FEBRUARY 2011 PRODUCTION DATA — information in this document is current at publication date. Products conform to specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard warranty. Production processing does not necessarily include testing of all parameters. LEAD-FREE (Pb-FREE) and GREEN STATEMENT Pb-Free (RoHS) TAOS’ terms Lead-Free or Pb-Free mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TAOS Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br) TAOS defines Green to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information and Disclaimer The information provided in this statement represents TAOS’ knowledge and belief as of the date that it is provided. TAOS bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TAOS has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TAOS and TAOS suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. NOTICE Texas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems. TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY RESULT IN PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER’S RISK. LUMENOLOGY, TAOS, the TAOS logo, and Texas Advanced Optoelectronic Solutions are registered trademarks of Texas Advanced Optoelectronic Solutions Incorporated. Copyright E 2011, TAOS Inc. The LUMENOLOGY r Company r r 24 www.taosinc.com