SGLS121B − JULY 2002 − REVISED 2004 D Qualification in Accordance With D D D D D D D D D AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval ESD Protection Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) 100-µA Typical Starting Supply Current 500-µA Typical Operating Supply Current D D D D † Contact factory for details. Q100 qualification data available on request. Operation to 1 MHz Internal Soft Start Internal Fault Soft Start Internal Leading-Edge Blanking of the Current Sense Signal 1-Amp Totem-Pole Output 70-ns Typical Response from Current-Sense to Gate Drive Output 1.5% Tolerance Voltage Reference Same Pinout as UC3842 and UC3842A description The UCC2800/1/2/3/4/5 family of high-speed, low-power integrated circuits contain all of the control and drive components required for off-line and dc-to-dc fixed frequency current-mode switching power supplies with minimal parts count. These devices have the same pin configuration as the UC2842/3/4/5 family and also offer the added features of internal full-cycle soft start and internal leading-edge blanking of the current-sense input. The UCC2800/1/2/3/4/5 family offers choice of maximum duty cycle and critical voltage levels. Lower reference parts such as the UCC2803 and UCC2805 fit best into battery operated systems, while the higher reference and the higher UVLO hysteresis of the UCC2802 and UCC2804 make these ideal choices for use in off-line power supplies. The UCC280xQDRQ1 series is specified for the automotive temperature range of −40_C to 125_C, and qualified in accordance with AEC-Q100 stress test qualification for integrated circuits. PART NUMBER MAXIMUM DUTY CYCLE REFERENCE VOLTAGE TURN-ON THRESHOLD TURN-OFF THRESHOLD UCC2800 100% 5V 7.2 V 6.9 V UCC2801 50% 5V 9.4 V 7.4 V UCC2802 100% 5V 12.5 V 8.3 V UCC2803 100% 4V 4.1 V 3.6 V UCC2804 50% 5V 12.5 V 8.3 V UCC2805 50% 4V 4.1 V 3.6 V Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated !"#$ % &'!!($ #% )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($% %$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',( $(%$2 #++ )#!#"($(!%- POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SGLS121B − JULY 2002 − REVISED 2004 block diagram VCC OK FB COMP CS 2 1 3 Leading Edge Blanking 1.5 V Overcurrent 7 VCC UCCx801 UCCx804 UCCx805 Only REF/2 TQ S Q R 4V Oscillator 6 OUT S Q S Q R REF OK PWM Latch R 0.5 V 13.5 V Full Cycle Soft Start Logic Power = 4 ms 1V 5 GND 8 4 REF RC D PACKAGE (TOP VIEW) AVAILABLE OPTIONS TA SOIC-8 SMALL OUTLINE (D) UCC2800QDRQ1 UCC2801QDRQ1 COMP FB CS RC UCC2802QDRQ1 −40_C to 125_C UCC2803QDRQ1 UCC2804QDRQ1 UCC2805QDRQ1 † The UCC280x−Q1 is only available taped and reeled in quantities of 2500 devices per reel. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 8 2 7 3 6 4 5 REF VCC OUT GND SGLS121B − JULY 2002 − REVISED 2004 Ordering Information UCC2 80 0 Q D R Q1 Q100 INDICATOR TAPE and REEL INDICATOR PACKAGE D = Plastic SOIC AUTOMOTIVE TEMPERATURE RANGE INDICATOR PRODUCT OPTION 0 through 5 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†‡ VCC voltage w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V VCC current w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 A Output energy, (Capacitive Load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 µJ Analog Inputs (FB, CS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6.3 V Power Dissipation at TA < +25_C (D package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.65 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65_C to 150_C Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 300_C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ Unless otherwise indicated, voltages are reference to ground and currents are positive into and negative out of the specified terminals. w In normal operation VCC is powered through a current limiting resistor. Absolute maximum of 12 V applies when VCC is driven from a low impedance source such that ICC does not exceed 30 mA (which includes gate drive current requirement). electrical characteristics TA = −40_C to 125_C, VCC = 10 V (see Note 1), RT = 100 kΩ from REF to RC, CT = 330 pF from RC to GND, 0.1-F capacitor from VCC to GND, 0.1-F capacitor from VREF to GND and TA = TJ (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Reference Section Output voltage TJ = 25_C, I = 0.2 mA Load regulation voltage I = 0.2 mA to 5 mA UCC2800/01/02/04 UCC2803/05 4.925 5 5.075 3.94 4 4.06 10 1.9 TJ = −40_C to 125_C 2.5 Line regulation voltage VCC = 10 V to 12 V Total variation voltage See Note 5 Output noise voltage f = 10 Hz to 10 kHz, See Note 7 TJ = 25_C Long term stability 1000 hours, See Note 7 TA = 125_C UCC2800/01/02/04 UCC2803/05 Output short-circuit current 4.88 5 5.1 3.9 4 4.08 −5 POST OFFICE BOX 655303 30 TJ = 25_C • DALLAS, TEXAS 75265 V mV mV/V V 130 µV 5 mV −35 mA 3 SGLS121B − JULY 2002 − REVISED 2004 electrical characteristics TA = −40_C to 125_C, VCC = 10 V (see Note 1), RT = 100 kΩ from REF to RC, CT = 330 pF from RC to GND, 0.1-F capacitor from VCC to GND, 0.1-F capacitor from VREF to GND and TA = TJ (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Oscillator Section Oscillator frequency See Note 2 Temperature stability See Note 7 UCC2800/01/02/04 40 46 52 UCC2803/05 26 31 36 2.5 Amplitude peak-to-peak 2.25 Oscillator peak voltage 2.4 kHz % 2.55 2.45 V V Error Amplifier Section Input voltage COMP = 2.5 V UCC2800/01/02/04 2.44 2.5 2.56 COMP = 2.0 V UCC2803/05 1.95 2 2.05 Input bias current −1 Open loop voltage gain 60 COMP sink current FB = 2.7 V, COMP = 1.1 V COMP source current FB = 1.8 V, COMP = REF − 1.2 V Gain bandwidth product See Note 7 −0.2 1 µA 3.5 mA −0.8 mA 80 0.3 −0.5 V db 2 MHz PWM Section Maximum duty cycle Minimum duty cycle UCC2800/02/03 97 99 100 UCC2801/04/05 48 49 50 COMP = 0 V 0 % % Current Sense Section Gain See Note 3 Maximum input signal COMP = 5 V, See Note 4 Input bias current 1.65 1.8 V/V 0.9 1 1.1 V −200 CS blank time Over-current threshold voltage COMP to CS offset voltage 1.1 CS = 0 V 200 nA 50 100 150 ns 1.42 1.55 1.68 V 0.45 0.9 1.35 V Output Section (OUT) Low-level output voltage High-level output voltage VSAT (VCC - OUT) IOUT = 20 mA All parts 0.1 0.4 IOUT = 200 mA All parts 0.35 0.9 IOUT = 50 mA, VCC = 5 V UCC2803/05 0.15 0.4 IOUT = 20 mA, VCC = 0 V All parts 0.7 1.2 IOUT = −20 mA All parts 0.15 0.4 IOUT = −200 mA All parts 1 1.9 IOUT = −50 mA, VCC = 5 V UCC2803/05 V V 0.4 0.9 Rise time CL = 1 nF 41 70 ns Fall time CL = 1 nF 44 75 ns 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SGLS121B − JULY 2002 − REVISED 2004 electrical characteristics TA = −40_C to 125_C, VCC = 10 V (see Note 1), RT = 100 kΩ from REF to RC, CT = 330 pF from RC to GND, 0.1-F capacitor from VCC to GND, 0.1-F capacitor from VREF to GND and TA = TJ (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Undervoltage Lockout Section UCC2800 UCC2801 Start threshold Stop threshold See Note 6 See Note 6 Start to stop hysteresis 6.6 7.2 7.8 8.6 9.4 10.2 UCC2802/04 11.5 12.5 13.5 UCC2803/05 3.7 4.1 4.5 UCC2800 6.3 6.9 7.5 UCC2801 6.8 7.4 8 UCC2802/04 7.6 8.3 9 UCC2803/05 3.2 3.6 4 UCC2800 0.12 0.3 0.48 UCC2801 1.6 2 2.4 UCC2802/04 3.5 4.2 5.1 UCC2803/05 0.2 0.5 0.8 4 10 ms V V V Soft Start Section COMP rise time FB = 1.8 V, Rise from 0.5 V to REF − 1 V Overall Section Start-up current VCC < Start Threshold 0.1 0.2 mA Operating supply current FB = 0 V, CS = 0 V 0.5 1 mA VCC internal zener voltage ICC = 10 mA, See Notes 6 and 8 12 13.5 15 V VCC internal zener voltage minus start threshold voltage See Note 6 0.5 1.0 UCC2802/04 V NOTES: 1. Adjust VCC above the start threshold before setting at 10 V. 2. Oscillator frequency for the UCC2800, UCC2802 and UCC2803 is the output frequency. Oscillator frequency for the UCC2801, UCC2804 and UCC2805 is twice the output frequency. 3. Gain is defined by: DVCOMP 0 v VCS v 0.8 V. A= DVCS 4. Parameter measured at trip point of latch with pin 2 at 0 V. 5. Total variation includes temperature stability and load regulation. 6. Start threshold, stop threshold, and zener shunt thresholds track one another. 7. Not production tested. 8. The device is fully operating in clamp mode as the forcing current is higher than the normal operating supply current. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SGLS121B − JULY 2002 − REVISED 2004 detailed terminal descriptions COMP COMP is the output of the error amplifier and the input of the PWM comparator. Unlike other devices, the error amplifier in the UCC2800 family is a true, low output-impedance, 2-MHz operational amplifier. As such, the COMP terminal can both source and sink current. However, the error amplifier is internally current limited, so that one can command zero duty cycle by externally forcing COMP to GND. The UCC2800 family features built-in full cycle soft start. Soft start is implemented as a clamp on the maximum COMP voltage. CS CS is the input to the current sense comparators. The UCC2800 family has two different current sense comparators: the PWM comparator and an over-current comparator. The UCC2800 family contains digital current sense filtering, which disconnects the CS terminal from the current sense comparator during the 100 ns interval immediately following the rising edge of the OUT pin. This digital filtering, also called leading-edge blanking, means that in most applications, no analog filtering (RC filter) is required on CS. Compared to an external RC filter technique, the leading-edge blanking provides a smaller effective CS to OUT propagation delay. Note, however, that the minimum non-zero on-time of the OUT signal is directly affected by the leading-edge-blanking and the CS to OUT propagation delay. The over-current comparator is only intended for fault sensing, and exceeding the over-current threshold causes a soft start cycle. FB FB is the inverting input of the error amplifier. For best stability, keep the FB lead length as short as possible and the FB stray capacitance as small as possible. ground (GND) GND is reference ground and power ground for all functions on this part. OUT OUT is the output of a high-current power driver capable of driving the gate of a power MOSFET with peak currents exceeding "750 mA. OUT is actively held low when VCC is below the UVLO threshold. The high-current power driver consists of FET output devices, which can switch all of the way to GND and all of the way to VCC. The output stage also provides a low impedance to overshoot and undershoot. This means that in many cases, external Schottky clamp diodes are not required. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SGLS121B − JULY 2002 − REVISED 2004 detailed descriptions (continued) RC RC is the oscillator timing pin. For fixed frequency operation, set timing capacitor charging current by connecting a resistor from REF to RC. Set frequency by connecting timing capacitor from RC to GND. For the best perfomance, keep the timing capacitor lead to GND as short and direct as possible. If possible, use separate ground traces for the timing capacitor and all other functions. The frequency of oscillation can be estimated with the following equations: 1.5 R C UCC2803ńUCC2805 : F + 1.0 R C UCC2800ń01ń02ń04 : F + (1) Where frequency is in Hz, resistance is in ohms, and capacitance is in farads. The recommended range of timing resistors is between 10 kΩ and 200 kΩ and the timing capacitor is 100 pF to 1000 pF. Never use a timing resistor less than 10 kΩ. To prevent noise problems, bypass VCC to GND with a ceramic capacitor as close to the VCC pin as possible. An electrolytic capacitor may also be used in addition to the ceramic capacitor. voltage reference (REF) REF is the voltage reference for the error amplifier and also for many other functions on the IC. REF is also used as the logic power supply for high speed switching logic on the IC. When VCC is greater than 1 V and less than the UVLO threshold, REF is pulled to ground through a 5-kΩ resistor. This means that REF can be used as a logic output indicating power system status. It is important for reference stability that REF is bypassed to GND with a ceramic capacitor as close to the pin as possible. An electrolytic capacitor may also be used in addition to the ceramic capacitor. A minimum of 0.1-µF ceramic is required. Additional REF bypassing is required for external loads greater than 2.5 mA on the reference. To prevent noise problems with high speed switching transients, bypass REF to ground with a ceramic capacitor close to the IC package. power (VCC) VCC is the power input connection for this device. In normal operation VCC is powered through a current limiting resistor. Although quiescent VCC current is low, total supply current will be higher, depending on OUT current. Total VCC current is the sum of quiescent VCC current and the average OUT current. Knowing the operating frequency and the MOSFET gate charge (Qg), average OUT current can be calculated from: I OUT + Q g F. (2) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SGLS121B − JULY 2002 − REVISED 2004 PARAMETER MEASUREMENT INFORMATION Error Amplifier Gain/Phase Response Oscillator REF 8 0.2 V R Q RT S RC 2.5 V 4 CT The UCC3800/1/2/3/4/5 oscillator generates a sawtooth waveform on RC. The rise time is set by the time constant of RT and CT . The fall time is set by CT and an internal transistor on-resistance of approximately 125. During the fall time, the output is off and the maximum duty cycle is reduced below 50% or 100% depending on the part number. Larger timing capacitors increase the discharge time and reduce the maximum duty cycle and frequency. Figure 1 Figure 2 UCC1803/05 VREF vs VCC UCC1800/01/02/04 Oscillator Frequency vs RT and CT IL = 0.5 mA Figure 4 Figure 3 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SGLS121B − JULY 2002 − REVISED 2004 UCC1803/05 Oscillator Frequency vs RT and CT UCC1800/02/03 Maximum Duty Cycle vs Oscillator Frequency Figure 5 Figure 6 UCC1801/04/05 Maximum Duty Cycle vs Oscillator Frequency UCC1800 ICC vs Oscillator Frequency Figure 7 Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SGLS121B − JULY 2002 − REVISED 2004 Dead Time vs CT UCC1805 ICC vs Oscillator Frequency RT = 100 kW Figure 10 Figure 9 COMP to CS Offset vs Temperature CS = 0 V Figure 11 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SGLS121B − JULY 2002 − REVISED 2004 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 8 PINS SHOWN 0.020 (0,51) 0.014 (0,35) 0.050 (1,27) 8 0.010 (0,25) 5 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 1 4 0.010 (0,25) 0°− 8° A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.010 (0,25) 0.004 (0,10) 0.069 (1,75) MAX PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 4040047/E 09/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty UCC2800QDRQ1 ACTIVE SOIC D 8 2500 None CU NIPDAU Level-1-260C-UNLIM UCC2801QDRQ1 ACTIVE SOIC D 8 2500 None Call TI Level-1-220C-UNLIM UCC2802QDRQ1 ACTIVE SOIC D 8 2500 None Call TI Level-1-220C-UNLIM UCC2803QDRQ1 ACTIVE SOIC D 8 2500 None Call TI Level-1-220C-UNLIM UCC2804QDRQ1 ACTIVE SOIC D 8 2500 None Call TI Level-1-220C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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