SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 FEATURES D Single Oscillator Synchronizes Two PWMs D 150-µA Startup Supply Current D 2-mA Operating Supply Current D Operation to 1 MHz D Internal Soft-Start D Full-Cycle Fault Restart D Internal Leading-Edge Blanking of the D D D DESCRIPTION The UCC3810 is a high-speed BiCMOS controller integrating two synchronized pulse width modulators for use in off-line and dc-to-dc power supplies. The UCC3810 family provides perfect synchronization between two PWMs by usin g the same oscillator. The oscillator’s sawtooth waveform can be used for slope compensation if required. Current Sense Signal 1-A Totem Pole Outputs 75-ns Typical Response from Current Sense to Output 1.5% Tolerance Voltage Reference N PACKAGE (TOP VIEW) SYNC CT RT FB1 COMP1 CS1 OUT1 GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC REF ENABLE2 FB2 COMP2 CS2 OUT2 PWRGND Using a toggle flip-flop to alternate between modulators, the UCC3810 ensures that one PWM does not slave, interfere, or otherwise affect the other PWM. This toggle flip- flop also ensures that each PWM is limited to 50% maximum duty cycle, insuring adequate off-time to reset magnetic elements. This device contains many of the same elements of the UC3842 current mode controller family, combined with the enhancements of the UCC3802. This minimizes power supply parts count. Enhancements include leading edge blanking of the current sense signals, full cycle fault restart, CMOS output drivers, and outputs which remain low even when the supply voltage is removed. ERROR AMPLIFIER GAIN AND PHASE vs FREQUENCY DW PACKAGE (TOP VIEW) SYNC CT RT FB1 COMP1 CS1 OUT1 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC REF ENABLE2 FB2 COMP2 CS2 OUT2 PWRGND !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ Copyright 2004, Texas Instruments Incorporated www.ti.com 1 SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 ORDERING INFORMATION PACKAGED DEVICES(1) TJ SOP (DW) PDIP (N) −40_C to 85_C UCC2810DW (16) UCC2810N (16) 0_C to 70_C UCC3810DW (16) UCC3810N (16) (1) All packages are available taped and reeled (indicated by the R suffix on the device type e.g., UCC2810JR) ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1)(3) UNIT Supply voltage(2), VCC 11 V Supply current, ICC 20 mA Output peak current, OUT1, OUT2, 5% duty cycle ±1 A Output energy, OUT1, OUT2, capacitive load 20 µJ Analog inputs, FB1, FB2, CS1, CS2, SYNC Operating junction temperature, TJ Storage temperature range, Tstg Lead temperature (soldering, 10 sec) (1) (2) (3) −0.3 to 6.3 V 150 _C −65 to 150 _C 300 _C Currents are positive into, negative out of the specified terminal. All voltages are with respect to GND. In normal operation, VCC is powered through a current-limiting resistor. Absolute maximum of 11 V applies when driven from a low impedance such that the VCC current does not exceed 20 mA. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. BLOCK DIAGRAM UDG−92062−2 2 www.ti.com SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 ELECTRICAL CHARACTERISTICS All parameters are the same for both channels, −40_C ≤ TA ≤ 85_C for the UCC2810, 0_C ≤ TA ≤ 70_C for the UCC3810, VCC = 10 V(1) ; RT = 150 kΩ, CT = 120 pF; no load; TA = TJ; (unless otherwise specified) PARAMETER TEST CONDITIONS MIN TYP MAX 4.925 5.000 5.075 4.85 5.00 5.10 5 30 UNIT REFERENCE VCC Output voltage TJ = 25_C TJ = full range, 0 mA ≤ IREF ≤ 5 mA Load regulation 0 mA ≤ IREF ≤ 5 mA Line regulation UVLO stop threshold voltage, 0.5 V ≤ VCC ≤ VSHUNT Output noise voltage(7) 10 Hz < f < 10 kHz, TJ = 25_C Long term stability(7) TA = 125_C, 1000 hours mV 12 IO(SC)Output short circuit current V 235 µV 5 mV −8 −25 mA OSCILLATOR fOSC Oscillator frequency(2) RT = 30 kΩ CT = 120 pF 760 880 1000 RT = 150 kΩ CT = 120 pF 190 220 250 Temperature stability(7) 2.5% Peak voltage 2.5 Valley voltage 0.05 Peak-to-peak amplitude 2.25 2.45 2.65 SYNC threshold voltage 0.80 1.65 2.20 SYNC input current kHz SYNC = 5 V V µA 30 ERROR AMPLIFIER VFB FB input voltage IFB FB input bias current COMP = 2.5 V 2.44 Open loop voltage gain 60 fGAIN Unity gain bandwidth(7) 2.50 2.56 V ±1 µA 73 dB 2 MHz ISINK Sink current, COMP FB = 2.7 V, COMP = 1 V 0.3 1.4 3.5 ISRCESource current, COMP FB = 1.8 V, COMP = 4 V −0.2 −0.5 −0.8 Minimum duty cycle Soft-start rise time, COMP COMP = 0 V FB = 1.8 V, rise from 0.5 V to (REF − 1.5 V) mA 0% 5 ms (1) For UCC3810, adjust VCC above the start threshold before setting at 10 V. 4 (2) Oscillator frequency is twice the output frequency. f OSC + RT CT DV COMP (3) Current sense gain A is defined by: A + , 0 V ≤ VCS ≤ 0.8 V. DV CS (4) Parameter measured at trip point of latch with FB = 0 V. (5) CS blank time is measured as the difference between the minimum non-zero on-time and the CS-to-OUT delay. (6) Start threshold voltage and VCC internal zener voltage track each other. (7) Ensured by design. Not production tested. www.ti.com 3 SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 ELECTRICAL CHARACTERISTICS All parameters are the same for both channels,−40_C ≤ TA ≤ 85_C for the UCC2810, 0_C ≤ TA ≤ 70_C for the UCC3810, VCC = 10 V(1) ; RT = 150 kΩ, CT = 120 pF; no load; TA = TJ; (unless otherwise specified) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 1.20 1.55 1.80 V/V 0.9 1.0 CURRENT SENSE Gain(3) Maximum input signal(4) ICS COMP = 5 V Input bias current, CS CS steps from 0 V to 1.2 V, COMP = 2.5 V Propagation delay time (CS to OUT) 1.1 V ±200 nA 75 ns Blank time, CS(5) 55 Overcurrent threshold voltage, CS COMP-to-CS offset voltage CS = 0 V 1.35 1.55 1.85 0.45 0.90 1.35 V PWM Maximum duty cycle(7) Minimum on-time RT = 150 kΩ, CT = 120 pF 45% 49% 50% RT = 30 kΩ, CT = 120 pF 40% 45% 48% CS = 1.2 V, COMP = 5 V 130 ns OUTPUT IOUT = 20 mA 0.12 0.42 0.48 1.10 0.7 1.2 IOUT = −20 mA 0.15 0.42 IOUT = 200 mA VOL Low-level output voltage IOUT = 20 mA, VOH High-level output voltage (VCC − OUT) VCC = 0 V IOUT = −200 mA 1.2 2.3 tR Rise time, OUT COUT = 1 nF 20 50 tF Fall time, OUT COUT = 1 nF 30 60 V ns UNDERVOLTAGE LOCKOUT (UVLO) Start threshold voltage 9.6 11.3 13.2 Stop threshold voltage 7.1 8.3 9.5 Start-to-stop hysteresis 1.7 3.0 4.7 −20 −35 −55 µA 0.80 1.53 2.00 V ENABLE2 input bias current ENABLE2 = 0 V ENABLE2 input threshold voltage (1) For UCC3810, adjust VCC above the start threshold before setting at 10 V. 4 (2) Oscillator frequency is twice the output frequency. f OSC + RT CT DV COMP (3) Current sense gain A, is defined by: A + , 0 V ≤ VCS ≤ 0.8 V. DV CS (4) (5) (6) (7) 4 Parameter measured at trip point of latch with FB = 0 V. CS blank time is measured as the difference between the minimum non-zero on-time and the CS-to-OUT delay. Start threshold voltage and VCC internal zener voltage track each other. Ensured by design. Not production tested. www.ti.com V SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 ELECTRICAL CHARACTERISTICS All parameters are the same for both channels, −40_C ≤ TA ≤ 85_C for the UCC2810, 0_C ≤ TA ≤ 70_C for the UCC3810, VCC = 10 V(1) ; RT = 150 kΩ, CT = 120 pF; no load; TA = TJ; (unless otherwise specified) PARAMETER TEST CONDITIONS MIN TYP MAX 0.15 0.25 UNIT OVERALL Startup current VCC < Start threshold voltage Operating supply current, outputs off VCC = 10 V, FB = 2.75 V 2 3 VCC = 10 V, CS = 0 V, FB = 0 V, RT = 150 kΩ 3.2 5.1 VCC = 10 V, CS = 0 V, FB = 0 V, RT = 30 kΩ 8.5 14.5 11.0 12.9 14.0 0.4 1.2 Operating supply current, outputs on VCC internal zener voltage(6) ICC = 10 mA VCC internal zener voltage minus start threshold voltage mA V (6) Start threshold voltage and VCC internal zener voltage track each other. Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION COMP1 5 O COMP2 12 O CS1 6 I CS2 11 I CT 2 O The timing capacitor of the oscillator. Recommended values of CT are between 100 pF and 1 nF. Connect the timing capacitor directly across CT and GND. ENABLE2 14 I A logic input which disables PWM 2 when low. This input has no effect on PWM 1. This input is internally pulled high. In most applications it can be left floating. In unusually noisy applications, the input should be bypassed with a 1-nF ceramic capacitor. This input has TTL compatible thresholds. FB1 4 I FB2 13 I GND 8 − OUT1 7 O OUT2 10 O PWRGND 9 − To separate noise from the critical control circuits, this part has two different ground connections: GND and PWRGND. GND and PWRGND must be electrically connected together. REF 15 O The output of the 5-V reference. Bypass REF to GND with a ceramic capacitor ≥ 0.01-µF for best performance. RT 3 O The oscillator charging current is set by the value of the resistor connected from RT to GND. This pin is regulated to 1 V, but the actual charging current is 10 V/RT. Recommended values of RT are between 10 kΩ and 470 kΩ. For a given frequency, higher timing resistors give higher maximum duty cycle and slightly lower overall power consumption. SYNC 1 I This logic input can be used to synchronize the oscillator to a free running oscillator in another part. This pin is edge triggered with TTL thresholds, and requires at least a 10-ns-wide pulse. If unused, this pin can be grounded, open circuited, or connected to REF. VCC 16 I The power input to the device. This pin supplies current to all functions including the high current output stages and the precision reference. Therefore, it is critical that VCC be directly bypassed to PWRGND with an 0.1-µF ceramic capacitor. Low impedance output of the error amplifiers. Current sense inputs to the PWM comparators. These inputs have leading edge blanking. For most applications, no input filtering is required. Leading edge blanking disconnects the CS inputs from all internal circuits for the first 55 ns of each PWM cycle. When used with very slow diodes or in other applications where the current sense signal is unusually noisy, a small current-sense R-C filter may be required. The high impedance inverting inputs of the error amplifiers. To separate noise from the critical control circuits, this part has two different ground connections: GND and PWRGND. GND and PWRGND must be electrically connected together. However, use care to avoid coupling noise into GND. The high-current push-pull outputs of the PWM are intended to drive power MOSFET gates through a small resistor. This resistor acts as both a current limiting resistor and as a damping impedance to minimize ringing and overshoot. www.ti.com 5 SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 APPLICATION INFORMATION timing resistor Supply current decreases with increased RT by the relationship: DI CC + 11 V RT (1) For more information, see the detailed oscillator block diagram. leading edge blanking and current sense Figure 1 shows how an external power stage is connected to the UCC3810. The gate of an external power N-channel MOSFET is connected to OUT through a small current-limiting resistor. For most applications, a 10-Ω resistor is adequate to limit peak current and also practical at damping resonances between the gate driver and the MOSFET input reactance. Long gate lead length increases gate capacitance and mandates a higher series gate resistor to damp the R-L-C tank formed by the lead, the MOSFET input reactance, and the device’s driver output resistance. The UCC3810 features internal leading edge blanking of the current-sense signal on both current sense inputs. The blank time starts when OUT rises and continues for 55 ns. During that 55 ns period, the signal on CS is ignored. For most PWM applications, this means that the CS input can be connected to the current-sense resistor as shown in Figure 1. However, high speed grounding practices and short lead lengths are still required for good performance. Figure 1. Detailed Block Diagram oscillator The UCC3810 oscillator generates a sawtooth wave at CT. The sawtooth rise time is set by the resistor from RT to GND. Since RT is biased at 1 V, the current through RT is 1 V/RT. The actual charging current is 10 times higher. The fall time is set by an internal transistor on-resistance of approximately 100 Ω. During the fall time, all outputs are off and the maximum duty cycle is reduced to below 50%. Larger timing capacitors increase the discharge time and reduce frequency. However, the percentage maximum duty cycle is only a function of the timing resistor RT, and the internal 100-Ω discharge resistance. 6 www.ti.com SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 APPLICATION INFORMATION error amplifier output stage The UCC3810 error amplifiers are operational amplifiers with low-output resistance and high-input resistance. The output stage of one error amplifier is shown in Figure 3. This output stage allows the error amplifier output to swing close to GND and as high as one diode drop below 5 V with little loss in amplifier performance. Figure 2. Oscillator Figure 3. Error Amplifier Output Stage www.ti.com 7 SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 TYPICAL CHARACTERISTICS OSCILLATOR FREQUENCY vs TIMING RESISTANCE ERROR AMPLIFIER GAIN AND PHASE vs FREQUENCY Figure 5 Figure 4 MAXIMUM DUTY CYCLE vs TIMING RESISTANCE OSCILLATOR FREQUENCY vs TEMPERATURE Figure 6 8 Figure 7 www.ti.com SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 TYPICAL CHARACTERISTICS INPUT CURRENT vs OSCILLATOR FREQUENCY MAXIMUM DUTY CYCLE vs FREQUENCY Figure 8 Figure 9 www.ti.com 9 SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 UDG−94022 Figure 10. Typical Application 10 www.ti.com SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 16 PINS SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 16 0.010 (0,25) M 9 0.419 (10,65) 0.400 (10,15) 0.010 (0,25) NOM 0.299 (7,59) 0.291 (7,39) Gage Plane 0.010 (0,25) 1 8 0.050 (1,27) 0.016 (0,40) 0°−ā 8° A Seating Plane 0.104 (2,65) MAX 0.012 (0,30) 0.004 (0,10) PINS ** 0.004 (0,10) 16 18 20 24 28 A MAX 0.410 (10,41) 0.462 (11,73) 0.510 (12,95) 0.610 (15,49) 0.710 (18,03) A MIN 0.400 (10,16) 0.453 (11,51) 0.500 (12,70) 0.600 (15,24) 0.700 (17,78) DIM 4040000 / E 08/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MS-013 www.ti.com 11 SLUS162C − FEBRUARY 1999 − REVISED NOVEMBER 2004 N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 16 PINS SHOWN PINS ** 14 16 18 20 A MAX 0.775 (19,69) 0.775 (19,69) 0.920 (23,37) 0.975 (24,77) A MIN 0.745 (18,92) 0.745 (18,92) 0.850 (21,59) 0.940 (23,88) DIM A 16 9 0.260 (6,60) 0.240 (6,10) 1 8 0.070 (1,78) MAX 0.035 (0,89) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gauge Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 14/18 PIN ONLY 4040049/D 02/00 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001). 12 www.ti.com PACKAGE OPTION ADDENDUM www.ti.com 8-Mar-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) UCC2810DW ACTIVE SOIC DW 16 40 None CU NIPDAU Level-2-220C-1 YEAR UCC2810DWTR ACTIVE SOIC DW 16 2000 None CU NIPDAU Level-2-220C-1 YEAR UCC2810N ACTIVE PDIP N 16 25 None CU NIPDAU Level-NA-NA-NA UCC3810DW ACTIVE SOIC DW 16 40 None CU NIPDAU Level-2-220C-1 YEAR UCC3810DWTR ACTIVE SOIC DW 16 2000 None CU NIPDAU Level-2-220C-1 YEAR UCC3810DWTRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UCC3810N ACTIVE PDIP N 16 CU NIPDAU Level-NA-NA-NA 25 None (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated