UNISONIC TECHNOLOGIES CO., LTD CD40106 Preliminary CMOS IC HEX SCHMITT TRIGGERS DESCRIPTION The CD40106 is a high speed Si-gate CMOS device which contains six independent Schmitt-trigger inverters and they perform the function Y=A. The device have different input threshold levels for positivegoing (VT+) and negative-going(VT-) signals because of the Schmitt-trigger action in the input. FEATURES * High voltage type (20V rating) * All inputs have Schmitt-trigger action * Hysteresis Voltage(TYP): 0.9V at VCC=5V 2.3V at VCC=10V 3.5V at VCC=15V * Wide supply voltage range from 3V to 18V * Inputs are TTL-Voltage compatible * Noise immunity greater than 50% ORDERING INFORMATION Ordering Number Lead Free CD40106L-S14-R Halogen Free CD40106G-S14-R www.unisonic.com.tw Copyright © 2012 Unisonic Technologies Co., Ltd Package Packing SOP-14 Tape Reel 1 of 6 QW-R502-815.a CD40106 PIN CONFIGURATION FUNCTION TABLE (each gate) Preliminary CMOS IC INPUT OUTPUT A Y L H H L Note: H: HIGH voltage level; L: LOW voltage level LOGIC DIAGRAM (positive logic) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 6 QW-R502-815.a CD40106 Preliminary CMOS IC ABSOLUTE MAXIMUM RATING (TA =25°C, unless otherwise specified)(Note 1) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VCC -0.5 ~ 20 V Input Voltage VIN -0.5~ VCC+0.5 V DC Input Current, Any One Input IIN ±10 mA Power Dissipation PD 500 mW Storage Temperature TSTG -65 ~ +150 °C Note 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. RECOMMENDED OPERATING CONDITIONS PARAMETER Supply Voltage Input Voltage Operating Temperature SYMBOL VCC Operating VIN TOPR CONDITIONS MIN 3 0 -40 TYP MAX 18 VCC +85 UNIT V V °C TYP MAX 2.9 3.6 5.9 7.1 8.8 10.8 1.9 2.8 3.9 5.2 5.8 7.4 0.9 1.6 2.3 3.6 3.5 5.0 5 10 15 0 0.05 0 0.05 0 0.05 -0.51 -1 -1.6 -3.2 -1.3 -2.6 -3.4 -6.8 0.51 1.0 1.3 2.6 3.4 6.8 ±0.01 ±100 0.02 1 0.02 2 0.02 4 0.04 20 UNIT STATIC CHARACTERISTICS (TA =25°C , unless otherwise specified) PARAMETER SYMBOL Positive-Going Input Threshold Voltage VT+ Negative-Going Input Threshold Voltage VT- Hysteresis Voltage (VT+-VT-) (see figure 3) ΔVT High-Level Output Voltage VOH Low-Level Output Voltage VOL High-level Output Current IOH Low-level Output Current IOL Input Leakage Current Quiescent Supply Current II(LEAK) IDD TEST CONDITIONS VCC=5V VCC=10V VCC=15V VCC=5V VCC=10V VCC=15V VCC=5V VCC=10V VCC=15V VCC=5V, |IO| <1uA VCC=10V, |IO| <1uA VCC=15V, |IO| <1uA VCC=5V, |IO| <1uA VCC=10V, |IO| <1uA VCC=15V, |IO| <1uA VCC=5V, VO=4.6V VCC=5V, VO=2.5V VCC=10V, VO=9.5V VCC=15V, VO=13.5V VCC=5V, VO=0.4V VCC=10V, VO=0.5V VCC=15V, VO=1.5V VCC=18V, VIN=VCC or GND VCC=5V, VIN= VCC or GND, IOUT=0 VCC=10V, VIN= VCC or GND, IOUT=0 VCC=15V, VIN= VCC or GND, IOUT=0 VCC=20V, VIN= VCC or GND, IOUT=0 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN 2.2 4.6 6.6 0.9 2.5 4.0. 0.3 1.2 1.6 4.95 9.95 15.95 V V V V V mA mA nA uA 3 of 6 QW-R502-815.a CD40106 Preliminary DYNAMIC CHARACTERISTICS (TA =25°C, unless otherwise specified; Input: tR, tF=20ns) See Fig. 1 and Fig. 2 for test circuit and waveforms. PARAMETER SYMBOL TEST CONDITIONS VCC=5V, CL=50Pf, RL=200KΩ Propagation delay from input tPLH/tPHL VCC=10V, CL=50Pf, RL=200KΩ (A) to output(Y) VCC=15V, CL=50Pf, RL=200KΩ VCC=5V, CL=50Pf, RL=200KΩ Output Transition Time tTLH/tTHL VCC=10V, CL=50Pf, RL=200KΩ VCC=15V, CL=50Pf, RL=200KΩ CMOS IC MIN TYP 140 70 60 100 50 40 MAX 280 140 120 200 100 80 UNIT TYP 5 14 MAX 7.5 UNIT pF pF ns ns OPERATING CHARACTERISTICS PARAMETER Average Input Capacitance Power Dissipation Capacitance SYMBOL TEST CONDITIONS CIN Any Input Cpd Any Gate UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN 4 of 6 QW-R502-815.a CD40106 Preliminary CMOS IC TEST CIRCUIT AND WAVEFORMS From Output CL RL TEST CIRCUIT Note: CL includes probe and jig capacitance. Fig. 1 Load circuitry for switching times. Fig. 2 Propagation delay from input(A) to output(Y) and Output transition time. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 6 QW-R502-815.a CD40106 Preliminary CMOS IC TEST CIRCUIT AND WAVEFORMS(Cont.) Fig. 3 Hysteresis definition, characteristics, and test setup UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 6 QW-R502-815.a