UNISONIC TECHNOLOGIES CO., LTD PA3312 CMOS IC DUAL 2.6W AUDIO POWER AMPLIFIER WITH FOUR SELECTABLE GAIN SETTINGS AND INPUT-MUX CONTROL DESCRIPTION The UTC PA3312 is a monolithic integrated circuit that stereo bridged audio power amplifiers capable of producing 2.6W into 3Ω with less than 10% THD+N or 1W into 8Ω with less than 0.65% THD+N. This device minimizes the number of external components needed, simplifying the design, and freeing up board space for other features. Both of the depop circuitry and the thermal shutdown protection circuitry are integrated in UTC PA3312, that reduce pops and clicks noise during power up or shutdown mode operation . Amplifier gain is internally configured and controlled by way of two terminals (GAIN0 and GAIN1). BTL gain setting of 6 dB, 10 dB, 15.6dB, 21.6dB (inverting) are provided, whereas SE gain is always configured as 4.1dB for headphone drive. A MUX control terminal (HP/LINE) allows selection between the two sets of stereo input signals. To simplify the audio system design, UTC PA3312 combines a stereo bridge-tied loads (BTL) mode for speaker drive and a stereo single-end (SE) mode for headphone drive into a single chip, where both modes are easily switched by the SE/BTL input control pin signal. *Pb-free plating product number: PA3312L FEATURES * Low operating current with 10mA * Compatible with pc 99 desktop line-out into 10KΩ load * Internal gain control ,which eliminates external gain-setting resistors * 2.6w per channel output power into 3Ω at 5V , BTL mode * Input MUX select terminal * Pc-beep input * Improves depop circuitry to eliminate turn-on and turn-off transients in output * Fully differential input ORDERING INFORMATION Order Number Normal Lead Free Plating PA3312-N24-R PA3312L-N24-R PA3312-N24-T PA3312L-N24-T Package Packing HTSSOP-24 HTSSOP-24 Tape Reel Tube www.unisonic.com.tw Copyright © 2007 Unisonic Technologies Co., Ltd 1 of 10 QW-R107-055.A PA3312 CMOS IC PIN CONFIGURATION PIN DESCRIPTION PIN NO 1, 12, 13, 24 11 2 3 5 6 7, 18 PIN NAME GND BYPASS GAIN0 GANIN1 LLINEIN LHPIN PVDD I/O 8 RIN I 10 LIN I 14 PC-BEEP I I I I I I HP/LINE 17 I 15 SE/BTL I 19 VDD I 20 23 RHPIN RLINEIN SHUTDOWN I I 4 LOUT+ O 9 LOUT- O 21 ROUT+ O 16 ROUT- O 22 I DESCRIPTION Ground connection for circuitry. Connected to the thermal pad. Tap to voltage divider for internal mid-supply bias generator Bit 0 of gain control Bit 1 of gain control Left-channel line input, selected when SE/BTL is held low Left-channel headphone input, selected when SE/BTL is held high Power supply for output stage Common right input for fully differential input. AC ground for single-ended inputs. Common left input for fully differential input. AC ground for single-ended inputs. For PC Beep mode. PC-BEEP is enabled when a > 1.5-V (peak-to-peak) square wave is input HP/LINE is the input MUX control input. When the HP/LINE terminal is held high, the headphone inputs (LHPIN or RHPIN [6, 20]) are active. When the HP/LINE terminal is held low, the line inputs (LLINEIN or RLINEIN [5, 23]) are active. Hold SE/BTL low for BTL mode and hold high for SE mode. Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest performance. Right-channel headphone input, selected when SE/BTL is held high Right-channel line input, selected when SE/BTL is held low Places entire IC in shutdown mode when held low, except PC-BEEP remains active Left-channel positive output in BTL mode and positive output in SE mode Left-channel negative output in BTL mode and high-impedance in SE mode Right-channel positive output in BTL mode and positive output in SE mode Right-channel negative output in BTL mode and high-impedance in SE mode UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 10 QW-R107-055.A PA3312 CMOS IC BLOCK DIAGRAM UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 10 QW-R107-055.A PA3312 CMOS IC ABSOLUTE MAXIMUM RATING over operating free-air temperature range (unless otherwise specified) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD 6 V Input Voltage VIN -0.3~VDD ~+0.3 V Power Dissipation PD Internally limited Operating Junction Temperature TOPR -40 ~ +85 ℃ Storage Temperature TSTG -65 ~ +85 ℃ Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. RECOMMENDED OPERATING CONDITIONS PARAMETER Supply Voltage SYMBOL VDD High-Level Input Voltage VIH Low-Level Input Voltage VIL Operating Free-Air Temperature TA SE/BTL, HP/LINE, GAIN0, GAIN1 SHUTDOWN SE/BTL, HP/LINE GAIN0, GAIN1 SHUTDOWN MIN 4.5 0.8×VDD 2 UNIT V V 0.6×VDD 0.4×VDD 0.8 85 -40 V ℃ OPERATING CHARACTERISTICS VDD = 5 V, TA = 25℃, RL = 8Ω , Gain = 6 dB, BTL mode PARAMETER Output Power SYMBOL POUT TEST CONDITIONS THD+N=10% RL = 3Ω THD+N=1% MIN Total Harmonic Distortion Plus TDH+N POUT = 1 W, f = 20 Hz ~ 15 kHz Noise Maximum Output Power Bandwidth BOM THD = 5% Supply Ripple Rejection Ratio RR f = 1 kHz, CB = 0.47 µF BTLmode Signal-to-Noise Ratio SNR CB=0.47µF, BTLmode Noise Output Voltage eN f=20Hz ~ 20KHz SE mode MAX 5.5 TYP 2.6 2.05 MAX UNIT W 0.65% >15 72 105 20 18 KHz dB dB µVRMS ELECTRICAL CHARACTERISTICS TA = 25℃, VDD = 5 V, unless otherwise specified PARAMETER SYMBOL Output Offset Voltage (Measured |VO(OFF)| Differentially) Power Supply Rejection Ratio PSRR High-Level Input Current |IIH| Low-Level Input Current |IIL| Supply Current Supply Current, Shutdown Mode IDD TEST CONDITIONS TYP VIN = 0, AV = 6 dB VDD = 4.5 V ~ 5.5 V VDD = 5.5 V, VIN = VDD VDD = 5.5 V, VIN = 0 V BTL mode SE mode IDD(SD) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN MAX UNIT 25 mV 77 6 3 150 1 1 10 5 300 dB µA µA mA µA 4 of 10 QW-R107-055.A PA3312 CMOS IC TYPICAL APPLICATION CIRCUIT Right Head− phone Input Signal Right Line Input Signal CIRHP 0.47µF 20 RHPIN R CIRLINE 23 RLINEIN MUX 0.47µF 8 RIN CRIN 0.47µF PCBEEP Input Signal Volume Control Volume Control 14 PC-BEEP CPCB 0.47µF PCBeep GAIN0 2, 3 GAIN1 Gain/ 17 HP/LINE MUX 15 SE/BEL Control Left Head− phone Input Signal Left Line Input Signal CILHP 0.47µF 6 10 COUTR 330µF ROUT- 16 VDD 1KΩ 100KΩ Depop Circuitry PVDD 18See Note A VDD CSR 0.1µF VDD 19 Power VDD CSR Manag BYPASS 11 0.1µF ement SHUT DOWN 22 LHPIN L CILLINE 5 LLINEIN MUX 0.47µF CLIN 0.47µF ROUT+ 21 GND Volume Control CBYP 0.47µF To System Control LOUT+ 4 1, 12, 13, 24 1KΩ CLUTL 330µF LIN Volume Control LOUT- 9 100KΩ A. A 0.1-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower frequency noise signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier. Typical PA3312 Application Circuit Using Single-Ended Inputs and Input MUX UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 10 QW-R107-055.A PA3312 CMOS IC TYPICAL APPLICATION CIRCUIT(Cont.) CIRHP 0.47µF CIRIN- 20 RHPIN Right R 0.47µF Negative 23 RLINEIN MUX Differential Input Signal Volume Control ROUT+ 21 Right CRIN+ 0.47µF Positive Volume 8 RIN Differential Control Input Signal PC-BEEP 14 PC-BEEP Input PCCPCB Signal Beep COUTR 330µF ROUT- 16 VDD 0.47µF GAIN0 2, 3 GAIN1 Gain/ 17 HP/LINE MUX 15 SE/BEL Control CILHP 0.47µF Left Negative Differential Input Signal Left Positive Differential Input Signal 6 100KΩ Depop Circuitry 5 LLINEIN GND Volume Control 10 CBYP 0.47µF To System Control LOUT+ 4 CILIN0.47µF CLIN 0.47µF PVDD 18See Note A VDD CSR 0.1µF VDD 19 Power VDD CSR Manag BYPASS 11 0.1µF ement SHUT DOWN 22 LHPIN L MUX 1KΩ 1, 12, 13, 24 1KΩ CLUTL 330µF LIN Volume Control LOUT- 9 100KΩ A. A 0.1-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower frequency noise signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier. Typical PA3312 Application Circuit Using Differential Inputs UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 10 QW-R107-055.A PA3312 Total Harmonic Distortion Plus Noise vs. Frequency 10% RL=3Ω GV=6dB BTL 1% POUT=1.0W 0.1% POUT=0.5W POUT=1.75W 100 1K Frequency, f (Hz) 10K 20K f=15KHz 1% f=1KHz 0.1% f=20Hz 0.01% 0.01 RL=3Ω GV=6dB BTL 0.1 1 Output Power, POUT (W) 10 THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise 0.01% 20 Total Harmonic Distortion Plus Noise vs. Output Power 10% THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise TYPICAL CHARACTERISTICS 100 VDD=5V 90 RL=4Ω 80 70 60 50 40 30 20 10 0 10 GV=21.6dB GV=15.6dB GV=6dB 100 1K 10K Bandwidth, BW (Hz) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw Supply Ripple Rejection Ratio (dB) Output Noise Voltage vs. Bandwidth Output Noise Voltage, Vn (µv) CMOS IC 0 Supply Ripple Rejection Ratio vs. Frequency RL=8Ω -20 CB=0.47µF GV=6dB BTL -40 -60 -80 -100 -120 20 100 1K Frequency, f (Hz) 10K 20K 7 of 10 QW-R107-055.A PA3312 TYPICAL CHARACTERISTICS(Cont.) Supply Ripple Rejection Ratio vs. Frequency Crosstalk vs. Frequency 0 RL=32Ω CB=0.47µF GV=4.1dB SE -20 -40 POUT=1W RL=8Ω GV=6dB BTL -20 -40 -60 -60 -80 -80 -100 -100 -120 20 RIGHT TO LEFT -120 20 100 1K Frequency, f (Hz) 100 1K Frequency, f (Hz) 10K 20K 0 VOUT=1 VRMS RL=10KΩ -20 G =4.1dB V SE -40 Shutdown Attenuation (dB) Crosstalk (dB) 0 -60 LEFT TO RIGHT -100 VIN=1 VRMS RL=10KΩ, SE -20 -40 -60 RL=32Ω, SE -80 RL=8Ω, BTL -100 -120 20 RIGHT TO LEFT 100 1K Frequency, f (Hz) 10K 20K -120 20 7.5 10K 20K 180 Gain GV=15.6dB 90 Gain (dB) 5 GV=21.6dB 100 1K Frequency, f (Hz) 10 140 110 100 Closed-Loop Response Signal-to-Noise Ratio vs. Frequency POUT=1W 130 RL=8Ω BTL 120 GV=6dB 10K 20K Shutdown Attenuation vs. Frequency Crosstalk vs. Frequency -80 LEFT TO RIGHT 90 2.5 0 Phase 0 -2.5 -5 80 70 60 20 100 1K Frequency, f (Hz) 10K 20K UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw Phase 0 Signal-to-Noise Ratio, SNR (dB) CMOS IC RL=8Ω -7.5 GV=6dB -10 BTL 10 100 -90 1K 10K 100K Frequency, f (Hz) -180 1M 8 of 10 QW-R107-055.A PA3312 TYPICAL CHARACTERISTICS(Cont.) Closed-Loop Response 30 Closed-Loop Response 30 180 25 20 Gain 20 90 15 Gain 90 15 10 5 180 25 Phase 0 5 Phase 0 -90 RL=8Ω -5 GV=21.6dB -10 BTL 10 100 1K 10K 100K Frequency, f (Hz) -180 1M 0 -90 -180 1M Power Dissipation, PD (W) Output Power, POUT (W) Output Power, POUT (mW) RL=8Ω -5 GV=15.6dB -10 BTL 10 100 1K 10K 100K Frequency, f (Hz) 10 0 Power Dissipation, PD (W) CMOS IC UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 9 of 10 QW-R107-055.A PA3312 CMOS IC UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 10 of 10 QW-R107-055.A