UNISONIC TECHNOLOGIES CO., LTD PA3427 Preliminary CMOS IC 2W STEREO AUDIO AMPLIFIER DESCRIPTION The UTC PA3427 is a stereo audio speaker operated on a single 5V supply. It is capable of delivering 2W of output power per channel in Bridge-Tied Load mode into 4Ω load with less than 1% THD+N. Two terminals (GAIN0 and GAIN1) can configure and control the amplifier gain. In order to simplify the design of audio system in the notebook application, the two modes of Bridge-Tied Load (BTL) and Single-End (SE) mode drive the speakers and headphone respectively. The UTC PA3427 supports two input paths to choose two different amplitude AC signals through setting HP/ LINE pin. The UTC PA3427 is suitable for applications, such as stereo power amplifiers of notebooks or desktop computers, and multimedia monitors. HTSSOP-24 FEATURES * Depop circuitry integrated * BTL gain: 6dB, 10dB, 15.6dB, 21.6dB SE gain: 4.1dB * Output power (THD+N:1%, supply voltage:5V) − 2.0W into a 4Ω load − 1.2W into a 8Ω load * With two mode :BTL and SE * Stereo input multiplexer * Fully differential input * Build-in gain control * PC-Beep input function * Thermal shutdown protection * Halogen Free ORDERING INFORMATION Ordering Number PA3427G -N24-R PA3427G -N24-T Package HTSSOP-24 HTSSOP-24 www.unisonic.com.tw Copyright © 2009 Unisonic Technologies Co., Ltd Packing Tape Reel Tube 1 of 7 QW-R502-357.a PA3427 Preliminary PIN CONFIGURATION GND/HS GAIN0 GAIN1 LOUT+ 1 2 3 4 24 GND/HS 23 RLINEIN 22 SHUTDOWN 21 ROUT+ LLINEIN LPHIN PVDD 5 6 7 RIN LOUT- 8 9 20 RHPIN 19 VDD 18 PVDD 17 HP/LINE 16 ROUT- PA3427 LIN 10 BYPASS 11 GND/HS 12 CMOS IC 15 SE/BTL 14 PC-BEEP 13 GND/HS PIN DESCRIPTION PIN NO 1,12,13,24 2 3 4 PIN NAME GND/HS GAIN0 GAIN1 LOUT+ 5 6 7,18 8 9 10 11 I/O I I O DESCRIPTION Ground, directly connected to thermal pad. Bit 0 of gain control Bit 1 of gain control Positive output for Left channel in BTL mode, + output in SE mode. LLINEIN I Line input for left channel, selected when HP/ LINE pin is held low. LHPIN PVDD RIN LOUTLIN BYPASS I I I O I 14 PC-BEEP I 15 16 SE/ BTL ROUT- I O 17 HP/ LINE I Left channel headphone input, selected when HP/ LINE pin is held high. Supply voltage Differential input for Right channel. AC ground for single-ended inputs. Negative output for Left channel, and high impedance in SE mode. Differential input for Left channel. AC ground for single-ended inputs. Tap to voltage divider for internal mid-supply bias generator The input for PC-BEEP mode. PC-BEEP is enabled when at least eight continuous > 1-VPP (peak to peak) square waves is input to PC-BEEP pin. Hold low for BTL mode, hold high for SE mode. negative output for Right channel MUX control input, hold high to select headphone inputs (6, 20), hold low to select line inputs (5, 23). 19 VDD 20 21 RHPIN ROUT+ I O Right channel headphone input, selected when HP/ LINE pin is held high. Positive output for right channel in BTL mode, positive output in SE mode. Analog VDD supply voltage 22 SHUTDOWN I In shutdown mode when held low, expect PC-BEEP remains active. 23 RLINEIN I Line input for Right channel, selected when HP/ LINE pin is held low. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 7 QW-R502-357.a PA3427 Preliminary CMOS IC BLOCK DIAGRAM UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 7 QW-R502-357.a PA3427 Preliminary CMOS IC ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD 6 V Power Dissipation (Ta=25°C) PD 2.7 W Junction Temperature TJ 150 °C Operating Temperature TOPR -40 ~ +85 °C Storage Temperature TSTG -65 ~ +150 °C Note: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. ELECTRICAL CHARACTERISTICS (unless otherwise specified) PARAMETER SYMBOL DC ELECTRICAL CHARACTERISTICS (Ta=25°C) Supply voltage VDD High-Level Input Voltage VIH TEST CONDITIONS SE/ BTL , HP/ LINE , SHUTDOWN GAIN0, GAIN1 SE/ BTL , HP/ LINE , SHUTDOWN GAIN0, GAIN1 DC Differential Output Voltage VO(DIFF) VDD= 5V,Gain = 2V/V VDD= 5V, Stereo BTL Supply Current in Mute Mode IDD VDD= 5V, Stereo SE IDD in Shutdown Mode ISD VDD= 5V AC ELECTRICAL CHARACTERISTICS (Ta=25°C, VDD = 5.0V, RL = 4Ω) THD =1%, BTL, RL= 4Ω, G=-2V/V THD =1%, BTL, RL= 8Ω, G=-2V/V Output Power (Note) POUT THD =10%, BTL, RL= 4Ω, G=-2V/V THD =10%, BTL,RL= 8Ω, G=-2V/V THD = 0.1%, SE,RL= 32Ω POUT= 1.6W, BTL,RL= 4Ω,G=-2V/V Total Harmonic Distortion Plus POUT= 1W, BTL, RL= 8Ω,G=-2V/V THD+N Noise POUT= 75mW, SE, RL= 32Ω VIN = 1V, RL= 10kΩ,SE Max Output Power Bandwidth BW THD = 5% Power Supply Rejection PSRR F=1kHz,BTL,G=-2V/V, CBYP=1µF Channel-to-Channel f = 1kHz Output Separation Line/HP Input Separation BTL Attenuation (SE mode) Signal-to-Noise Ratio SNR POUT= 500mW, BTL, G=2V/V Output Noise Voltage EN BTL,G=2V/V, A Weighted filter Note: Output power is measured at the output terminals of the IC at 1kHz. Low-Level Input Voltage TYP MAX UNIT 4.5 5 5.5 V 2 V VIL UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN 5 7.5 4 160 0.8 V 50 13 7 300 mV mA mA µA 2 1.25 2.5 1.6 85 100 60 80 30 >15 68 W W W W mW m% m% m% m% kHz dB 80 dB 80 85 90 45 dB dB dB µVrms 4 of 7 QW-R502-357.a PA3427 Preliminary CMOS IC TYPICAL APPLICATION CIRCUIT Right Linein Negative Differential Input 1µF 23 RLINEIN 20 RHPIN Right Hpin Negative Differential Input Right MUX 1µF + ROUT+ 21 + ROUT- 16 1µF 8 RIN Right Hpin/Linein Positive Differential Input VDD 220µF 1K PVDD 7.18 PC-BEEP Input Signal 14 PC-Beep PC-Beep 11 BYPASS Depop Circuitry 2.2µF 2 GAIN0 3 GAIN1 15 SE/BTL 17 HP/LINE 100K VDD 19 1µF Power Management SHUTDOWN 22 GND 1, 12, 13, 24 Gain/ MUX Control 1µF + LOUT+ 100K 10µF 1K 4 220µF 10 LIN Left Hpin/Linein Positive Differential Input 1µF Left Linein Negative Differential Input 1µF 5 LLINEIN 6 LHPIN Left Hpin Negative Differential Input LOUT- 3 + Left MUX 1µF 0.1µF Application Circuit Using Differential Inputs Note: 1µF ceramic capacitor must be placed much closely to the IC. For filtering lower frequency noise signals, a larger electrolytic capacitor of 10µF or greater should be placed as close as possible to the audio power amplifier. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 7 QW-R502-357.a PA3427 Preliminary CMOS IC TYPICAL APPLICATION CIRCUIT(Cont.) Application Circuit Using Single-Ended Inputs Note: 1µF ceramic capacitor should be placed as close as possible to the IC to filter the higher-frequency noise. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 7 QW-R502-357.a PA3427 Preliminary CMOS IC APPLICATION INFORMATION 1. Shutdown Mode Operating INPUT HP/ LINE X L L H H X: Don’t care L: Low H: High SE/ BTL X L H L H AMPLIFIER SHUTDOWN INPUT OUTPUT L H H H H X LINE LINE HEADPHONE HEADPHONE MUTE BTL SE BTL SE 2. Gain setting (VS Gain0, Gain1 and RI, SE/BTL) Gain setting is determined by GAIN0 and GAIN1. The gains listed in the next table are realized by changing the taps on the input resistors inside the amplifier which will cause the internal input impedance(R I) to be dependent on the gain setting as we can see listed in the next table. AV(dB) 6 10 15.6 21.6 4.1 X: Don’t care GAIN0 0 0 1 1 X GAIN1 0 1 0 1 X SE/ BTL 0 0 0 0 1 R I (kΩ) 90 70 45 30 - UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 7 QW-R502-357.a