ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 155-Mbps to 4.25-Gbps LASER DRIVER FEATURES APPLICATIONS • • • • • • • • • • • • • • • • Multirate Operation From 155 Mbps up to 4.25 Gbps Bias Current Programmable From 1 mA to 100 mA Modulation Current Programmable From 5 mA to 85 mA APC and Fault Detection Fault Mode Selection Bias and Photodiode Current Monitors CML Data Inputs Temperature Compensation of Modulation Current Single 3.3-V Supply Active Back-Termination at the Output Surface-Mount, Small-Footprint, 4-mm × 4-mm, 24-Lead QFN Package SONET/SDH Transmission Systems Fibre Channel Optical Modules Fiber Optic Data Links Digital Cross-Connects Optical Transmitters DESCRIPTION The ONET4201LD is a laser driver for multiple fiber optic applications up to 4.25 Gbps. The device accepts CML input data and provides bias and modulation currents for driving a laser diode. Also provided are automatic power control (APC), temperature compensation of modulation current, fault detection, and current monitor features. The device is available in a small-footprint, 4-mm × 4-mm, 24-pin, QFN package. The circuit requires a single 3.3-V supply. This power-efficient laser driver is characterized for operation from –40°C to 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005, Texas Instruments Incorporated ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DETAILED DESCRIPTION BLOCK DIAGRAM A simplified block diagram of the ONET4201LD is shown in Figure 1. This compact, low-power, 4.25-Gbps laser driver circuit consists of a high-speed data path and a bias and control block. The function of the data path is to buffer the input data and then modulate the laser diode current according to the input data stream. The bias and control block generates the laser diode bias current, contains automatic power control (APC) to maintain constant optical output power, generates a modulation current that can be temperature compensated and controls power-on during start-up and shutdown after failure detection. The circuit design is optimized for high-speed and low-voltage operation (3.3 V). The main circuit blocks are described in detail below. OUTPOL Current Modulator MOD+ Input Buffer Stage DIN+ DIN– MOD– Modulation Current Generator MODSET MODSET MODTC MODTC MODCTRL OUT+ IMODEN IMODMON OUT– Active Termination Bias Current Generator IBMAX IBMAX IBEN 4 VCC IBMON IBSET BIAS MONB MONB VCC 3 GND BIAS Reference Voltage and Bias GND Generation Automatic Power Control (APC) IMODEN IMODMON Control IBEN IBMON IBSET CAPC CAPC MONP MONP APCCTRL APCCTRL PD APCMON APCSET DISABLE DISABLE APCMON FLTMODE FLTMODE SDOWN PD APCSET SDOWN B0092-02 Figure 1. Simplified Block Diagram of the ONET4201LD 2 Submit Documentation Feedback ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 DETAILED DESCRIPTION (continued) HIGH-SPEED DATA PATH The high-speed data path consists of an input buffer stage and a current modulator. The input buffer stage takes CML compatible differential signals. It provides on-chip 50-Ω termination to VCC. AC-coupling may be used at the DIN+ and DIN– inputs. The laser diode current modulator mainly consists of two common-emitter output transistors and the required driver circuitry. Depending on the input data stream, the modulation current is sunk at the MOD+ or the MOD– pin. Modulation current setting is performed by means of the modulation current generator block, which is supervised by the control circuit block. The laser diode can be either ac- or dc-coupled. In both cases, the maximum modulation current is 85 mA. The modulation output is optimized for driving a 20-Ω load. For optimum performance when driving a laser diode over a 20-Ω transmission line, the ONET4201LD provides active 20-Ω back-termination, which minimizes jitter caused by reflections. BIAS AND CONTROL The bias and control circuitry consists of the bandgap voltage and bias generation block, the bias current generator, the automatic power control block and the supervising control circuitry. BANDGAP VOLTAGE AND BIAS GENERATION The bandgap voltage reference provides process and temperature-independent reference voltages needed to set bias current, modulation current, and photodiode reference current. Additionally, this block provides the biasing for all internal circuits. AUTOMATIC POWER CONTROL The ONET4201LD laser driver incorporates an APC loop to compensate for the changes in laser threshold current over temperature and lifetime. The internal APC is enabled when resistors are connected to the IBMAX and APCSET pins. A back-facet photodiode mounted in the laser package is used to detect the average laser output power. The photodiode current IPD, which is proportional to the average laser power, can be calculated by using the laser-to-monitor transfer ratio, ρMON, and the average power, PAVG: I PD [A] PAVG [W] MON[AW] (1) In closed-loop operation, the APC modifies the laser diode bias current by comparing IPD with a reference current IAPCSET and generates a bias compensation current. IPD can be programmed by selecting the external resistor RAPCSET according to: 4.69 V R [] 4.69 V APCSET I [A] P [W] [AW] PD AVG MON (2) The bias compensation current subtracts from the maximum bias current to maintain the monitor photodiode current. The maximum bias current is programmed by the resistor connected to IBMAX: 343 V I [A] BIASMAX R [] BIASMAX (3) This current limit establishes the maximum bias current available in closed loop mode, as well as in transient fault conditions such as shorts at the PD pin to ground or delayed laser power up. An external pin MONB is provided as a bias current monitor output. A fraction of the bias current (1/68) is mirrored and develops a voltage drop across an external resistor to ground, RMONB. The voltage at MONB is given as: R [] I [A] BIAS V [V] MONB MONB 68 (4) If the voltage at MONB is greater than the programmed threshold, a fault mode occurs. Submit Documentation Feedback 3 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 DETAILED DESCRIPTION (continued) The MONP is also provided as a photocurrent monitor output. The photodiode current, IPD, is mirrored and develops a voltage across an external resistor to ground, RMONP. The voltage at MONP is given as: V [V] R [] I [A] MONP MONP PD (5) If the voltage at MONP is greater than the programmed threshold, a fault mode occurs. As with any negative-feedback system design, care must be taken to assure stability of the loop. The loop bandwidth must not be too high in order to minimize pattern-dependent jitter. The dominant pole is determined by the capacitor CAPC. The recommended value for CAPC is 200 nF. The capacitance of the monitor photodiode CPD adds another pole to the system, and thus it must be small enough to maintain stability. The recommended value for this capacitance is CPD ≤ 50 pF. The internal APC loop can be disabled by connecting a 100-kΩ resistor from APCSET to VCC and leaving PD open. In open-loop operation, the laser diode current is set by IBIASMAX and IMODSET. MODULATION-CURRENT GENERATOR The modulation-current generator defines the tail current of the modulator, which is sunk from either MOD+ or MOD–, depending on the data pattern. The modulation current consists of a modulation current IMOD0 at a reference temperature T0 = 60°C (set by the resistor RMODSET) and a temperature-dependent modulation current defined by the resistor RMODTC. The modulation current can be estimated as follows: I [A] MOD R 265 V MODSET [] 1 R 24 [] MODTC 630 ppm T[ oC] T [ oC] 0 (6) Note that the reference temperature, T0, and the temperature compensation set by RMODTC vary from part to part. To reduce the variation, IMOD can be calibrated over temperature and set with a microcontroller DAC or digital potentiometer. CONTROL The functions of this block are to control the start-up sequence, detect faults, detect tracking failure of the APC loop, and provide disable control. The laser driver has a controlled start-up sequence, which helps prevent transient glitches from being applied to the laser during power on. At start-up, the laser diode is off, SDOWN is low, and the APC loop is open. Once VCC reaches ~2.8 V, the laser diode bias generator and modulation current generator circuitry are activated (if DISABLE is low). The slow-start circuitry gradually brings up the current delivered to the laser diode. From the time that VCC reaches ~2.8 V until the modulation current and bias current reach 95% of their steady state value, is considered the initialization time. If DISABLE is asserted during power on, the slow-start circuitry does not activate until DISABLE is negated. FAULT DETECTION The fault-detection circuitry monitors the operation of the ONET4201LD. If FLTMODE is set to a low level, (hard-fault mode) this circuitry disables the bias and modulation circuits and latches the SDOWN output on detection of a fault. The fault mode is reset by toggling DISABLE (for a minimum time of TRES) or by toggling VCC. Once DISABLE is toggled, SDOWN is set low and the circuit is re-initialized. If FLTMODE is set to a high level (soft-fault mode), a fault is indicated at the SDOWN output; however, the bias and modulation circuits are not disabled. The SDOWN output is reset once the fault causing condition disappears. Toggling DISABLE or VCC is not required. A functional representation of the fault detection circuitry is shown in Figure 2. 4 Submit Documentation Feedback ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 DETAILED DESCRIPTION (continued) TRES Counter DISABLE IMODEN RES START IBEN Inverter Comparator Inverter Flipflop + VCC Q R + - IPD S 2.8 V Q MUX I0 Q I1 CMOS Buffer SDOWN MUX IBIAS/68 I1 Q Comparator I0 + MONB Q - Comparator + MONP Q + - MODTC SHORT MODTC MODSET MODSET APCSET APCSET IBMAX 1.25 V Short Circuit to VCC or GND Detect IBMAX FLTMODE B0093-01 Figure 2. Functional Representation of the Fault Detection Circuitry A fault mode is produced if the laser cathode is grounded and the photocurrent causes MONP to exceed its programmed threshold. Another fault mode can be produced if the laser diode end-of-life condition causes excessive bias current and photodiode current that results in monitor voltages (MONP, MONB) being greater than their programmed threshold. Other fault modes can occur if there are any I/O pin single-point failures (short to VCC or GND) and the monitor voltages exceed their programmed threshold (see Table 1). Submit Documentation Feedback 5 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 DETAILED DESCRIPTION (continued) Table 1. Response to I/O-Pin Shorts to VCC or GND PIN FLTMODE = LOW Response to Short to GND Response to Short to VCC FLTMODE = HIGH Response to Short to GND Response to Short to VCC APCSET SDOWN latched high, IBIAS and IMOD disabled No fault, IMOD unaffected SDOWN high, IBIAS and IMOD No fault unaffected BIAS SDOWN latched high, IMOD disabled No fault, IBIAS goes to zero SDOWN high, IMOD unaffected No fault, IMOD unaffected CAPC No fault No fault, IBIAS goes to zero No fault, IMOD unaffected No fault, IBIAS goes to zero DIN+ No fault, IMOD disabled No fault No fault, IMOD disabled No fault DIN– No fault, IMOD disabled No fault No fault, IMOD disabled No fault DISABLE Normal circuit operation Normal circuit operation Normal circuit operation Normal circuit operation IBMAX SDOWN latched high, IBIAS and IMOD disabled SDOWN latched high, IBIAS and IMOD disabled SDOWN high, IMOD unaffected SDOWN high, IMOD unaffected MOD+ SDOWN latched high, IBIAS and IMOD disabled No fault SDOWN high, IBIAS unaffected No fault MOD– SDOWN latched high, IBIAS and IMOD disabled No fault SDOWN high, IBIAS unaffected No fault MODSET SDOWN latched high, IBIAS and IMOD disabled No fault, disables IMOD SDOWN high, IBIAS unaffected No fault, disables IMOD MODTC SDOWN latched high, IBIAS and IMODdisabled No fault SDOWN high, IBIAS and IMOD No fault unaffected MONB No fault SDOWN latched high, IBIAS and IMOD disabled No fault SDOWN high, IBIAS and IMOD unaffected MONP No fault SDOWN latched high, IBIAS and IMOD disabled No fault SDOWN high, IBIAS and IMOD unaffected OUTPOL No fault, polarity reverses No fault No fault, polarity reverses No fault PD No fault, IMOD unaffected No fault, IBIAS goes to zero No fault, IMOD unaffected No fault, IBIAS goes to zero SDOWN No fault No fault No fault No fault PACKAGE For the ONET4201LD, a small-footprint, 4-mm × 4-mm, 24-lead QFN package is used, with a lead pitch of 0,5 mm. The pinout is shown in Figure 3. In order to achieve the required low thermal resistance of about 38 K/W, which keeps the maximum junction temperature below 115°C, a good thermal connection of the exposed die pad is mandatory. 6 Submit Documentation Feedback ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 PD CAPC IBMAX OUTPOL APCSET DISABLE RGE PACKAGE (TOP VIEW) 17 VCC 3 16 MOD– DIN– 4 15 MOD+ VCC 5 14 VCC GND 6 13 12 BIAS 8 9 10 11 MODSET 7 MODTC VCC DIN+ SDOWN GND 2 FLTMODE 24 23 22 21 20 19 18 MONB 1 MONP GND P0024-03 Figure 3. Pinout of the ONET4201LD in a 4-mm × 4-mm, 24-Lead QFN Package (Top View) TERMINAL FUNCTIONS TERMINAL NAME NO. I/O DESCRIPTION APCSET 23 Analog-in BIAS 13 Analog-out CAPC 20 Analog APC loop capacitor DIN+ 3 CML-in Noninverted data input. On-chip, 50-Ω terminated to VCC. DIN– 4 CML-in Inverted data input. On-chip, 50-Ω terminated to VCC. DISABLE 24 LVTTL-in Disable modulation and bias current outputs. FLTMODE 10 CMOS-in Fault mode selection input. If a low level is applied to this pin, any fault event is latched and the bias and modulation currents are disabled in a fault condition. Toggling of DISABLE or VCC resets the fault condition. If pin is set to a high level, fault events are flagged at the SDOWN output but not latched. The bias and modulation currents are not disabled. SDOWN is reset once the fault condition disappears. GND Set photodiode reference current with resistor to GND. Laser diode bias current sink. Connect to laser cathode. 1, 6, 18, EP Supply IBMAX 21 Analog-in MOD+ 15 Analog-out Laser modulation current output. Connect to laser cathode. Avoid usage of vias on board. MOD– 16 Analog-out Complementary laser modulation current output. Connect to VCC adjacent to anode of laser diode. Avoid usage of vias on board. MODSET 11 Analog-in Set temperature-independent modulation current with resistor to GND. MODTC 12 Analog-in Set modulation-current temperature compensation with resistor to GND. MONB 8 Analog-out Bias current monitor sources 1/68 of the bias current MONP 7 Analog-out Photodiode current monitor sources a current identical to the photodiode current OUTPOL 22 LVTTL-in Alters modulation current output polarity. Open or high: normal polarity, low: inverted polarity. OUTPOL is pulled up internally. Normal polarity: when DIN+ is high, current is sunk into MOD+. PD 19 Analog-in Monitor photodiode input. Connect to photodiode anode for APC. Sinks the photodiode current to GND. 9 LVTTL-out Fault detection flag 2, 5, 14, 17 Supply SDOWN VCC Circuit ground. The exposed die pad (EP) must be grounded. Set maximum laser diode current with resistor to GND. 3.3 V ±10% supply voltage Submit Documentation Feedback 7 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT VCC Supply voltage (2) –0.3 to 4 V IIBIAS Current into BIAS –20 to 120 mA IIMOD+, IIMOD– Current into MOD+, MOD– –20 to 120 mA IPD Current into PD –5 to 5 mA VDIN+, VDIN–, VDISABLE, VMONB, VMONP, VFLTMODE, VSDOWN Voltage at DIN+, DIN–, DISABLE, MONB, MONP, FLTMODE, SDOWN (2) –0.3 to 4 V VCAPC, VIBMAX, VMODSET, VAPCSET, VMODTC Voltage at CAPC, IBMAX, MODSET, APCSET, MODTC (2) –0.3 to 3 V VMOD+, VMOD- Voltage at MOD+, MOD– (2) 0.6 to VCC+1.5 V VBIAS Voltage at BIAS (2) 1 to 3.5 V ESD ESD rating at all pins except MOD+, MOD– 2 ESD rating at MOD+, MOD- 1 kV (HBM) TJ,max Maximum junction temperature 150 °C Tstg Storage temperature range –65 to 150 °C TA Characterized free-air operating temperature range –40 to 85 °C TLEAD Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) VCC Supply voltage TA Operating free-air temperature 8 MIN NOM MAX 3 3.3 3.6 V 85 °C –40 Submit Documentation Feedback UNIT ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 DC ELECTRICAL CHARACTERISTICS over recommended operating conditions (unless otherwise noted) PARAMETER VCC TEST CONDITIONS Supply voltage Supply current IBIAS Bias current range IBIAS-OFF Bias off-current DISABLE = high or hard-fault mode; VBIAS ≤ 3.5 V Bias overshoot During module hot plugging. VCC turn on time must be ≤ 0.8 s Bias current temperature stability APC open loop Bias current absolute accuracy (1) IBIAS ≥ 1 mA Bias current monitor gain IBIAS/IMONB MONB and MONP threshold range A fault is never detected for VMONB/P ≤ 1 V and a fault always occurs for VMONB/P ≥ 1.35 V PD current monitor gain IPD/IMONP 3.6 32 Differential input signal –480 IOH = 100 µA sourcing SDOWN output low voltage IOL = 1 mA sinking V mA 55 mA 100 mA 25 µA 480 –15% ppm/°C 15% ±15% 68 1 1.25 mA/ mA 1.35 1 200 SDOWN output high voltage UNIT 10% IBIAS = 1 mA, TA = 25°C V mA/mA 1600 2.4 4.7 DISABLE input high voltage mVp-p V 7.4 0.4 V 10 kΩ 2 V DISABLE input low voltage 0.8 V Monitor diode voltage 1.6 V 1500 µA Monitor diode dc current range (1) MAX 3.3 IMOD = 60 mA, IBIAS = 100 mA (excluding IMOD, IBIAS) DISABLE input impedance VPD TYP 3 IMOD = 30 mA, IBIAS = 20 mA (excluding IMOD, IBIAS) IVCC VID MIN 18 Absolute accuracy refers to part-to-part variation. Submit Documentation Feedback 9 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 AC ELECTRICAL CHARACTERISTICS Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C, over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS Data Rate IMOD Modulation current range Current into MOD+/MOD– pin; VMOD+, VMOD– ≥ 0.6 V IMOD-OFF Modulation off-current DISABLE = high or hard-fault occurred Modulation current stability Modulation current absolute accuracy (1) MIN TYP MAX 4.25 UNIT Gbps 5 85 25 µA –600 600 ppm/°C IMOD = 10 mA ±40% IMOD = 50 mA ±25% IMOD = 80 mA ±20% Modulation current temperature compensation (2) RMODTC = 3.125 kΩ tr Output rise time (20% to 80%) VMOD+ ≥ 1 V, VMOD– ≥ 1 V, IMOD = 30 mA 55 75 tf Output fall time (20% to 80%) VMOD+ ≥ 1 V, VMOD– ≥ 1 V, IMOD = 30 mA 55 75 ps tOFF Disable assert time (see Figure 4) Time from rising edge of DISABLE to when output currents fall below the maximum limits of IMOD-OFF and IBIAS-OFF 0.06 5 µs tON Disable negate time (see Figure 5) Time from falling edge of DISABLE to when output is 90% of nominal 200 µs tINIT Time to initialize From power on or negation of SDOWN using DISABLE 200 µs tFAULT Fault assert time Time from fault to SDOWN rising edge 3.3 tRESET DISABLE reset (see Figure 6) Maximum spike pulse length at DISABLE being ignored RMODTC = Open Time DISABLE must be high to reset SDOWN Output overshoot/undershoot Random jitter DJ Deterministic jitter (3) 10 ps 50 µs 10 µs µs 20 13.5 % IMOD = 60 mA 0.6 0.9 psRMS 10 mA ≤ IMOD ≤ 60 mA, with K28.5 pattern at 4.25 Gbps 15 30 psp-p 10 mA ≤ IMOD ≤ 60 mA, with 223 – 1 PRBS or equivalent pattern at 2.67 Gbps 13 32 psp-p 223 (3) ppm/°C 630 –13.5% K28.5 pattern at 1.06 Gbps (1) (2) 8300 mA – 1 PRBS or equivalent pattern at 155 Mbps 5 psp-p 10 psp-p Absolute accuracy refers to part-to-part variation. For a given external resistor connected to the MODTC pin, the modulation current temperature compensation will vary due to part-to-part variations. Jitter measured at positive edge and negative edge crossing of eye diagram. Submit Documentation Feedback ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 VHIGH SDOWN VLOW t VHIGH DISABLE VLOW t IMOD IMOD IMOD-OFF t IBIAS IBIAS IBIAS-OFF t tOFF T0102-01 Figure 4. DISABLE Assert Time tOFF Submit Documentation Feedback 11 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 VHIGH SDOWN VLOW t VHIGH DISABLE VLOW t IMOD IMOD IMOD-OFF t IBIAS IBIAS IBIAS-OFF t tON T0103-01 Figure 5. DISABLE Negate Time tON 12 Submit Documentation Feedback ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 VHIGH SDOWN VLOW t VHIGH DISABLE VLOW t IMOD IMOD IMOD-OFF t IBIAS IBIAS IBIAS-OFF t tRESET tRESET tON T0104-01 Figure 6. SDOWN Reset Time tRESET Submit Documentation Feedback 13 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 TYPICAL CHARACTERISTICS Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C (unless otherwise noted) Single-Ended Output Voltage [50mV/Div] ELECTRICAL EYE-DIAGRAM AT 2.125 Gbps WITH K28.5 PATTERN, IMOD = 30 mA Single-Ended Output Voltage [50mV/Div] ELECTRICAL EYE-DIAGRAM AT 4.25 Gbps WITH K28.5 PATTERN, IMOD = 30 mA Time [50ps/Div] Time [100ps/Div] G001 G002 Figure 8. ELECTRICAL EYE-DIAGRAM AT 1.0625 Gbps WITH K28.5 PATTERN, IMOD = 30 mA DETERMINISTIC JITTER vs MODULATION CURRENT Single-Ended Output Voltage [50mV/Div] Deterministic Jitter Including PWD − psp−p Figure 7. 60 50 40 30 20 10 0 10 15 Time [200ps/Div] G003 Figure 9. 14 20 25 30 35 40 Figure 10. Submit Documentation Feedback 45 Modulation Current − mA 50 55 60 G004 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 TYPICAL CHARACTERISTICS (continued) Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C (unless otherwise noted) RANDOM JITTER vs TEMPERATURE 3.0 3.0 2.5 2.5 Random Jitter − psRMS Random Jitter − psRMS RANDOM JITTER vs MODULATION CURRENT 2.0 1.5 1.0 0.5 1.5 1.0 0.5 0.0 10 15 20 25 30 35 40 45 50 55 Modulation Current − mA 0.0 −40 −30 −20 −10 0 60 10 20 30 40 50 60 70 80 90 TA − Free-Air Temperature − °C G005 G006 Figure 11. Figure 12. RISE TIME AND FALL TIME vs MODULATION CURRENT BIAS-MONITOR CURRENT GAIN IMONB/IBIAS vs BIAS CURRENT IBIAS 20 Bias Monitor Current Gain − mA/A 80 Rise Time and Fall Time − ps 2.0 Rise Time 70 60 50 Fall Time 40 30 20 19 18 17 16 15 14 13 12 11 10 10 15 20 25 30 35 40 45 Modulation Current − mA 50 55 60 10 15 G007 Figure 13. 20 25 30 35 40 Bias Current − mA 45 50 55 60 G008 Figure 14. Submit Documentation Feedback 15 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 TYPICAL CHARACTERISTICS (continued) Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C (unless otherwise noted) BIAS CURRENT IBIAS IN OPEN LOOP MODE vs EXTERNAL RESISTOR RBIASMAX MODULATION CURRENT IMOD vs EXTERNAL RESISTOR RMODSET 100 IMOD − Modulation Current − mA IBIAS − Bias Current − mA 120 100 80 60 40 20 0 80 70 60 50 40 30 20 10 0 0 10 20 30 40 50 60 70 80 90 RBIASMAX − External Resistor − kΩ 100 0 10 30 40 50 60 70 80 90 G009 Figure 15. Figure 16. MONITOR DIODE CURRENT IPD vs EXTERNAL RESISTOR RAPCSET PHOTODIODE MONITOR GAIN IMONP/IPD vs TEMPERATURE 100 G010 Photodiode Monitor Gain − mA/mA 3.0 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 10 20 30 40 50 60 70 80 RAPCSET − External Resistor − kΩ 90 100 2.5 2.0 1.5 1.0 0.5 0.0 −40 −30 −20 −10 0 G011 Figure 17. 16 20 RMODSET − External Resistor − kΩ 1.8 IPD − Monitor Diode Current − mA 90 10 20 30 40 50 60 70 80 90 TA − Free-Air Temperature − °C Figure 18. Submit Documentation Feedback G012 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 TYPICAL CHARACTERISTICS (continued) Typical operating condition is at VCC = 3.3 V, IMOD = 30 mA, IBIAS = 20 mA and TA = 25°C (unless otherwise noted) BIAS CURRENT MONITOR GAIN IMONB/IBIAS vs TEMPERATURE SUPPLY CURRENT (excl. IMOD and IBIAS) vs TEMPERATURE 80 70 18 Supply Current − mA Bias Current Monitor Gain − mA/A 20 16 14 60 50 40 30 12 20 10 −40 −30 −20 −10 0 10 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90 TA − Free-Air Temperature − °C 10 20 30 40 50 60 70 80 90 TA − Free-Air Temperature − °C G013 Figure 19. Figure 20. DISABLE ASSERT TIME tOFF DISABLE NEGATE TIME tON ∆t = 2.21 µs G014 ∆t = 240 µs VSDOWN VSDOWN VDISABLE VDISABLE IMOD+ IMOD+ IBIAS IBIAS Time [100 µs/Div] Time [500 ns/Div] G016 G017 Figure 21. Figure 22. SHUTDOWN RESET TIME tRESET ∆t = 12.8 µs VSDOWN VDISABLE IMOD+ IBIAS Time [5 µs/Div] G018 Figure 23. Submit Documentation Feedback 17 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 APPLICATION INFORMATION CAPC RAPCSET RBIASMAX Figure 24 shows the ONET4201LD connected with a dc-coupled interface to the laser diode, alternatively the ONET4201LD laser driver can be ac-coupled. OUTPOL DISABLE PD CAPC IBMAX OUTPOL DISABLE GND APCSET VCC GND VCC VCC DIN+ DIN+ MOD– DIN– DIN– MOD+ VCC VCC Monitor Photodiode 20 W RD MODTC MODSET FLTMODE SDOWN MONB MONP GND ONET4201LD 24-Lead QFN LaserDiode BIAS RMODTC SDOWN RMODSET MONB RMONB FLTMODE RMONP MONP S0154-02 Figure 24. Basic Application Circuit With DC-Coupled Interface Between the ONET4201LD and the Laser Diode APC loop instability may occur with large inductive loading on the BIAS pin. To ensure loop stability in this case, it is recommended to connect a 1-nF capacitor to ground at the BIAS pin. 18 Submit Documentation Feedback ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 APPLICATION INFORMATION (continued) SELECT A LASER In the design example according to Figure 24, the ONET4201LD is dc coupled to a typical communication-grade laser diode capable of operating at 4.25 Gbps with the specifications shown in Table 2. Table 2. Laser Diode Specifications PARAMETER VALUE UNITS λ Wavelength PAVG Average optical output power ITH Threshold current 10 mA ρMON Laser-to-monitor transfer 0.05 mA/mW η Laser slope efficiency 0.2 mW/mA 1310 nm 5 mW SELECT APCSET RESISTOR When the APC loop is activated, the desired average optical output power PAVG is defined by characteristics of the monitor diode and by the APCSET resistor RAPCSET. The relation between the monitor photodiode current IPD and the average optical output power PAVG is given by Equation 7: I [A] P [W] [AW] PD AVG MON (7) The RAPCSET resistor is calculated by Equation 8: 4.69 V R [] 4.69 V APCSET I [A] P [W] [AW] PD AVG MON (8) For the laser diode specified in Table 2 and the desired average optical output power of 5 mW, RAPCSET is calculated as seen in Equation 9: 4.69 V 4.69 V R [] 18.75 k APCSET P [W] [AW] 5 mW 0.05 mAmW AVG MON (9) Note that the monitor photodiode current IPD must not exceed 1.5 mA corresponding to a minimum APCSET resistor RAPCSET,MIN = 3.1 kΩ. SELECT MODSET RESISTOR Modulation current IMOD is dependent on the required optical output peak-to-peak power Pp-p or the average optical power PAVG. IMOD can be calculated using the laser slope efficiency η and the desired extinction ratio re: I 2P Ppp[W] [A] MOD [WA] r 1 [W] re1 AVG e [WA] (10) Using the laser diode parameters from Table 2 and assuming an extinction ratio re = 8 dB (≈6.3) for an average optical power PAVG = 5 mW the required modulation current results as: I MOD 2 5 mW 6.31 6.31 0.2 mWmA 36.3 mA (11) The modulation current is adjustable with a selectable temperature coefficient TC according to the relation: I [A] I [A] 1 TC T[ oC] T [ oC] 0 MOD MOD0 (12) where T is the ambient temperature in °C and T0 is the reference temperature (T0 = 60°C). The temperature coefficient of the modulation current TC is typically adjustable between 630 ppm/°C and 8300 ppm/°C. For calculation of the required external resistor RMODSET for a given modulation current and a given temperature, the formula can be modified as follows: Submit Documentation Feedback 19 ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 R MODSET [] 265 V 1 TC T[ oC] T [ oC] 0 I [A] MOD (13) If 4000 ppm/°C is the desired temperature coefficient and the modulation current from the example above, 36.3 mA, is required at a temperature of 25°C, the MODSET resistor RMODSET is given by Equation 14. 4000 ppm R [] 265 V 1 (25 oC 60 oC) 6.3 k oC MODSET 36.3 mA (14) Note that the modulation current IMOD must not exceed 85 mA over the complete temperature range, corresponding to a minimum MODSET resistor RMODSET,MIN = 3.1 kΩ. SELECT MODTC RESISTOR The RMODTC resistor is used to program a modulation temperature coefficient that can be used to compensate for the decreased slope efficiency of the laser at a higher temperature. The temperature coefficient TCLD of the laser can be calculated using the slope efficiency η1 at temperature T1 and η2 at temperature T2 as shown in Equation 15: [WA] [WA] 1 2 1 TC 106 LD oC 1[WA] T 2[ oC] T 1[ oC] (15) As an example, for the laser in Table 2, the slope efficiency at temperature T1 = 25°C is η1 = 0.2 mW/mA. At temperature T2 = 85°C the slope efficiency is η2 = 0.15 mW/mA. The corresponding temperature coefficient TCLD laser can be calculated: 0.15 mWmA 0.2 mWmA TC 10 6 4167 o1 LD C 0.2 mWmA (85 oC 25 oC) (16) The MODTC resistor RMODTC can be used to compensate the laser temperature coefficient TCLD in order to maintain the same optical output swing within a range of 630 ppm up to 8300 ppm. For this, RMODTC may be programmed as follows: 24 R MODTC (TC 630 ppm) o1 o C C (17) To compensate for the decreased slope efficiency of the laser in Table 2, TC must be 4167 ppm/°C. This leads to the following MODTC resistor RMODTC: 24 R 6.8 k MODTC 4167 ppm 630 ppm o C oC (18) SELECT BIASMAX RESISTOR The BIASMAX resistor RBIASMAX is used to limit the bias current applied to the laser diode. To calculate RBIASMAX, the maximum threshold current at 85°C and end of life must be determined. The maximum bias current for the dc-coupled interface can be approximated by Equation 19. I [A] I [A] BIASMAX THMAX (19) RBIASMAX can be set by Equation 20. 343 V 343 V R [] BIASMAX I [A] I [A] BIASMAX THMAX (20) For the example laser diode, the maximum threshold current is 40 mA at 85°C. Therefore, RBIASMAX can be approximated by Equation 21. 20 Submit Documentation Feedback ONET4201LD www.ti.com SLLS677 – NOVEMBER 2005 R BIASMAX 343 V 8.6 k 40 mA (21) SELECT VMONB AND VMONP RANGE Monitoring the bias current is achieved by taking the fractional (1/68) bias current and developing a voltage across an external resistor to ground. Equation 22 provides the value for VMONB for a resistor value equal to 768 Ω. R [] I [A] 768 I [A] BIAS BIAS V [V] MONB 11.29 I [A] MONB BIAS 68 68 (22) Monitoring of the photodiode current is achieved by taking a mirror of IPD and developing a voltage across an external resistor to ground. Equation 23 provides the value for VMONP for a resistor equal to 200 Ω. V [V] R [] I [A] 200 I [A] MONP MONP PD PD (23) LASER DIODE INTERFACE The output stage of the ONET4201LD is optimized for driving a 20-Ω load. The combination of a damping resistor, RD, along with the resistance of the laser diode must be 20 Ω for impedance matching. The suggested typical value for RD is 6 Ω to 15 Ω. A bypass capacitor of 10 nF placed close to the laser anode also helps to optimize performance. Submit Documentation Feedback 21 PACKAGE OPTION ADDENDUM www.ti.com 16-Dec-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty ONET4201LDRGER ACTIVE QFN RGE 24 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR ONET4201LDRGERG4 ACTIVE QFN RGE 24 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR ONET4201LDRGET ACTIVE QFN RGE 24 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR ONET4201LDRGETG4 ACTIVE QFN RGE 24 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. 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