3.3 V, 50 Mbps to 4.25 Gbps Single-Loop Laser Diode Driver ADN2871 FEATURES GENERAL DESCRIPTION SFP/SFF and SFF-8472 MSA-compliant SFP reference design available 50 Mbps to 4.25 Gbps operation Automatic average power control Typical rise/fall time 60ps Supports VCSEL, DFB, and FP lasers Bias current range 2 mA to 100 mA Modulation current range 5 mA to 90 mA Laser fail alarm and automatic laser shutdown (ALS) Bias and modulation current monitoring 3.3 V operation 4 mm × 4 mm LFCSP Voltage setpoint control Resistor setpoint control Pin-compatible with ADN2870 The ADN2871 laser diode driver is designed for advanced SFP and SFF modules, using SFF-8472 digital diagnostics. The ADN2871 supports operation from 50 Mbps to 4.25 Gbps. Average power and extinction ratio can be set with a voltage provided by a microcontroller DAC or by a trimmable resistor or digital potentiometer. The average power control loop is implemented using feedback from a monitor photodiode. The part provides bias and modulation current monitoring as well as fail alarms and automatic laser shutdown. The device interfaces easily with the ADI ADuC70xx family of microconverters and with the ADN289x family of limiting amplifiers to make a complete SFP/SFF transceiver solution. An SFP reference design is available. The product is pin-compatible with the ADN2870 dual-loop LDD, allowing one PC board layout to work with either device. For dual-loop applications, refer to the ADN2870 data sheet. APPLICATIONS The product is available in a space-saving 4 mm × 4 mm LFCSP specified over the −40°C to +85°C temperature range. 1×/2×/4× Fibre Channel SFP/SFF modules Multirate OC3 to OC48-FEC SFP/SFF modules LX-4 modules DWDM/CWDM SFP modules 1GE SFP/SFF transceiver modules VCSEL, DFB, and FP transmitters Figure 1 shows an application diagram of the voltage setpoint control with single-ended laser interface. Figure 36 shows a differential laser interface. VCC VCC VCC Tx_DISABLE VCC L Tx_FAULT VCC FAIL ALS IMODN R MPD LASER IMODP DATAP PAVSET ADI MICROCONTROLLER DAC IBIAS RPAV ADC ×100 1kΩ DAC DATAN 100Ω CONTROL PAVREF CCBIAS IMOD GND ERREF ERSET ADN2871 1kΩ GND IBMON IMMON VCC GND PAVCAP NC 1kΩ GND 470Ω GND 05228-001 GND Figure 1. Application Diagram of Voltage Setpoint Control with Single-Ended Laser Interface Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. ADN2871 TABLE OF CONTENTS Specifications..................................................................................... 3 Laser Control .............................................................................. 13 SFP Timing Specifications............................................................... 5 Control Methods ........................................................................ 13 Absolute Maximum Ratings............................................................ 6 Voltage Setpoint Calibration..................................................... 13 Temperature Specifications ......................................................... 6 Resistor Setpoint Calibration.................................................... 15 ESD Caution.................................................................................. 6 IMPD Monitoring ...................................................................... 15 Pin Configuration and Function Descriptions............................. 7 Loop Bandwidth Selection........................................................ 16 Optical Waveforms ........................................................................... 8 Power Consumption .................................................................. 16 Multirate Performance Using Low Cost Fabry Perot Tosa NEC NX7315UA .......................................................................... 8 Automatic Laser Shutdown (TX_Disable) .............................. 16 Bias and Modulation Monitor Currents.................................. 16 Performance Over Temperature Using DFB Tosa SUMITOMO SLT2486................................................................. 8 Data Inputs.................................................................................. 17 Typical Performance Characteristics ............................................. 9 Laser Diode Interfacing............................................................. 17 Single-Ended Output ................................................................... 9 Alarms.......................................................................................... 18 Differential Output..................................................................... 10 Outline Dimensions ....................................................................... 19 Performance Characteristics..................................................... 11 Ordering Guide .......................................................................... 19 Theory of Operation ...................................................................... 13 REVISION HISTORY 6/05—Revision 0: Initial Version Rev. 0 | Page 2 of 20 ADN2871 SPECIFICATIONS VCC = 3.0 V to 3.6 V. All specifications TMIN to TMAX1, unless otherwise noted. Typical values as specified at 25°C. Table 1. Parameter LASER BIAS CURRENT (IBIAS) Output Current IBIAS Compliance Voltage IBIAS when ALS is High MODULATION CURRENT (IMODP, IMODN)2 Output Current IMOD Compliance Voltage IMOD when ALS is High Min Typ Max Unit Conditions/Comments 2 1.2 100 VCC 0.1 mA V mA 5 1.5 90 VCC 0.1 mA V mA 5 mA < IMOD < 90 mA 104 96 1.1 35 30 ps ps ps (rms) ps ps 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 20 mA < IMOD < 90 mA 20 mA < IMOD < 90 mA Rise Time Single-Ended Output2, 3 Fall Time Single-Ended Output2, 3 Random Jitter Single-Ended Output2, 3 Deterministic Jitter Single-Ended Output3, 4 Pulse-Width Distortion2, 3 Single-Ended Output 60 60 0.8 19 21 Rise Time Differential Output3, 5 Fall Time Differential Output3, 5 Random Jitter Differential Output3, 5 Deterministic Jitter Differential Output3, 6 Pulse-Width Distortion Differential Output3, 5 47.1 46 0.64 12 2.1 ps ps ps (rms) ps ps 5 mA < IMOD < 30 mA 5 mA < IMOD < 30 mA 5 mA < IMOD < 30 mA 5 mA < IMOD < 30 mA 5 mA < IMOD < 30 mA 56 55 0.61 17 1.6 ps ps ps (rms) ps ps 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 5 mA < IMOD < 90 mA 80 1.3 1200 pF V µA Resistor setpoint mode 25 1.01 kΩ kΩ Resistor setpoint mode Voltage setpoint mode 0.07 1 V 70 1000 µA Voltage setpoint mode (RPAV fixed at 1 kΩ) Voltage setpoint mode (RPAV fixed at 1 kΩ) 0.05 0.9 V Rise Time Differential Output3, 5 Fall Time Differential Output3, 5 Random Jitter Differential Output3, 5 Deterministic Jitter Differential Output3, 7 Pulse Width Distortion Differential Output3, 5 AVERAGE POWER SET (PAVSET) Pin Capacitance Voltage Photodiode Monitor Current (Average Current) EXTINCTION RATIO SET INPUT (ERSET) Resistance Range Resistance Range AVERAGE POWER REFERENCE VOLTAGE INPUT (PAVREF) Voltage Range Photodiode Monitor Current (Average Current) EXTINCTION RATIO REFERENCE VOLTAGE INPUT (ERREF) Voltage Range ERREF Voltage to IMOD Gain DATA INPUTS (DATAP, DATAN)8 V p-p (Differential) Input Impedance (Single-Ended) LOGIC INPUTS (ALS) VIH VIL 1.1 50 1.5 0.99 1.2 1 100 0.4 mA/V 2.4 50 2 0.8 Rev. 0 | Page 3 of 20 Voltage setpoint mode (RERSET fixed at 1 kΩ) V Ω V V AC-coupled ADN2871 Parameter ALARM OUTPUT (FAIL)9 VOFF Min Typ VON IBMON, IMMON DIVISION RATIO IBIAS/IBMON3 IBIAS/IBMON3 IBIAS/IBMON3 IBIAS/IBMON STABILITY3, 10 IMOD/IMMON IBMON Compliance Voltage SUPPLY ICC11 VCC (with respect to GND)12 76 85 92 Unit Conditions/Comments >1.8 V <1.3 V Voltage required at FAIL for IBIAS and IMOD to turn off when FAIL asserted Voltage required at FAIL for IBIAS and IMOD to stay on when FAIL asserted 94 100 100 Max 112 115 108 ±5 42 0 1.3 32 3.3 3.0 3.6 A/A A/A A/A % A/A V 2 mA < IBIAS < 11 mA 11 mA < IBIAS < 50 mA 50 mA < IBIAS < 100 mA 10 mA < IBIAS < 100 mA mA V When IBIAS = IMOD = 0 1 Temperature range: –40°C to +85°C. Measured into a single-ended 15 Ω load (22 Ω resistor in parallel with digital scope 50 Ω input) using a 1111111100000000 pattern at 2.5 Gbps, shown in Figure 2. 3 Guaranteed by design and characterization. Not production tested. 4 Measured into a single-ended 15 Ω load using a K28.5 pattern at 2.5 Gbps, shown in Figure 2. 5 Measured into a differential 30 Ω (43 Ω differential resistor in parallel with a digital scope of 50 Ω input) load using a 1111111100000000 pattern at 4.25 Gbps, as shown in Figure 3. 6 Measured into a differential 30 Ω load using a K28.5 pattern at 4.25 Gbps, as shown in Figure 3. 7 Measured into a differential 30 Ω load using a K28.5 pattern at 2.7Gbps, as shown in Figure 3. 8 When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows in the IMODP pin. 9 Guaranteed by design. Not production tested. 10 IBIAS/IBMON ratio stability is defined in SFF-8472 Revision 9 over temperature and supply variation. 11 See the ICC minimum for power calculation in the Power Consumption section. 12 All VCC pins should be shorted together. 2 ADN2871 R 22Ω VCC L C IMODP BIAS TEE 80kHz → 27GHz TO HIGH SPEED DIGITAL OSCILLOSCOPE 50Ω INPUT 05228-002 VCC Figure 2. High Speed Electrical Test Single-Ended Output Circuit BIAS TEE 80kHz → 27GHz VCC L C IMODN TO HIGH SPEED DIGITAL OSCILLOSCOPE 50Ω DIFFERENTIAL INPUT R 43Ω ADN2871 IMODP L C BIAS TEE 80kHz → 27GHz Figure 3. High Speed Electrical Test Differential Output Circuit Rev. 0 | Page 4 of 20 05228-040 VCC ADN2871 SFP TIMING SPECIFICATIONS Table 2. Parameter ALS Assert Time Symbol t_off ALS Negate Time1 Time to Initialize, Including Reset of FAIL1 FAIL Assert Time ALS to Reset Time Typ 1 Max 5 Unit µs t_on 0.15 0.4 ms t_init 25 275 ms Conditions/Comments Time for the rising edge of ALS (TX_DISABLE) to when the bias current falls below 10% of nominal. Time for the falling edge of ALS to when the modulation current rises above 90% of nominal. From power-on or negation of FAIL using ALS. 100 5 µs µs Time to fault to FAIL on. Time Tx_DISABLE must be held high to reset Tx_FAULT. t_fault t_reset Guaranteed by design and characterization. Not production tested. VSE DATAP DATAN DATAP–DATAN 05228-003 V p-p DIFF = 2 × VSE 0V Figure 4. Signal Level Definition SFP MODULE 1µH VCC_Tx 3.3V 0.1µF 0.1µF 10µF SFP HOST BOARD Figure 5. Recommended SFP Supply Rev. 0 | Page 5 of 20 05228-004 1 Min ADN2871 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter VCC to GND IMODN, IMODP All Other Pins Junction Temperature Rating 4. 2 V −0.3 V to +4.8 V −0.3 to 3.9 V 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TEMPERATURE SPECIFICATIONS Table 4. Parameter Operating Temperature Range Industrial Storage Temperature Range Junction Temperature (TJ max) LFCSP Power Dissipation1 θJA Thermal Impedance2 θJCThermal Impedance Lead Temperature (Soldering 10 sec) 1 2 Rating −40°C to +85°C –65°C to +150°C 125°C (TJ max − TA)/θJA W 30°C/W 29.5°C/W 300°C Power consumption equations are provided in the Power Consumption section. θJA is defined when part is soldered on a 4-layer board. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 6 of 20 ADN2871 ERSET IMMON ERREF VCC IBMON 18 FAIL PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 13 19 12 GND ALS VCC DATAN IMODP DATAP ADN2871 IMODN GND PAVCAP GND NC IBIAS 7 6 NC = NO CONNECT 05228-005 RPAV VCC PAVREF GND PAVSET 1 CCBIAS 24 Figure 6. Pin Configuration—Top View Note: The LFCSP has an exposed paddle that must be connected to ground. Table 5. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Mnemonic CCBIAS PAVSET GND VCC PAVREF RPAV NC PAVCAP GND DATAP DATAN ALS ERSET IMMON ERREF VCC IBMON FAIL GND VCC IMODP IMODN GND IBIAS Description Connect to IBIAS, Pin 24 Average Optical Power Set Pin Supply Ground Supply Voltage Reference Voltage Input for Average Optical Power Control Average Power Resistor when Using PAVREF No Connect Average Power Loop Capacitor Supply Ground Data, Positive Differential Input Data, Negative Differential Input Automatic Laser Shutdown Extinction Ratio Set Pin Modulation Current Monitor Current Source Reference Voltage Input for Extinction Ratio Control Supply Voltage Bias Current Monitor Current Source FAIL Alarm Output Supply Ground Supply Voltage Modulation Current Positive Output; connect to laser diode Modulation Current Negative Output Supply Ground Laser Diode Bias (Current Sink to Ground) Rev. 0 | Page 7 of 20 ADN2871 OPTICAL WAVEFORMS VCC = 3.3 V and TA = 25°C, unless otherwise noted. MULTIRATE PERFORMANCE USING LOW COST FABRY PEROT TOSA NEC NX7315UA PERFORMANCE OVER TEMPERATURE USING DFB TOSA SUMITOMO SLT2486 Note: No change to PAVCAP and ERCAP values. (ACQ LIMIT TEST) WAVEFORMS 1001 05228-006 05228-038 (ACQ LIMIT TEST) WAVEFORMS 1000 Figure 7. Optical Eye 2.488 Gbps,65 ps/div, PRBS 231-1 PAV = −4.5 dBm, ER = 9 dB, Mask Margin 25% Figure 10. Optical Eye 2.488 Gbps, 65 ps/div, PRBS 231-1 PAV = 0 dBm, ER = 9 dB, Mask Margin 22%, TA = 25°C (ACQ LIMIT TEST) WAVEFORMS 1000 05228-039 05228-007 (ACQ LIMIT TEST) WAVEFORMS 1001 Figure 8. Optical Eye 622 Mbps, 264 ps/div, PRBS 231-1 PAV = −4.5 dBm, ER = 9 dB, Mask Margin 50% Figure 11. Optical Eye 2.488 Gbps, 65 ps/div, PRBS 231-1 PAV = −0.2 dBm, ER = 8.96 dB, Mask Margin 21%, TA = 85°C 05228-008 (ACQ LIMIT TEST) WAVEFORMS 1000 Figure 9. Optical Eye 155 Mbps,1.078 ns/div, PRBS 231-1 PAV = −4.5 dBm, ER = 9 dB, Mask Margin 50% Rev. 0 | Page 8 of 20 ADN2871 TYPICAL PERFORMANCE CHARACTERISTICS SINGLE-ENDED OUTPUT These performance characteristics were measured using the high speed electrical single-ended output circuit shown in Figure 2. 1.2 90 1.0 0.8 JITTER (rms) RISE TIME (ps) 60 0.6 0.4 30 0 0 20 40 60 MODULATION CURRENT (mA) 80 05228-014 05228-011 0.2 0 100 0 Figure 12. Rise Time vs. Modulation Current, IBIAS = 20 mA 20 40 60 MODULATION CURRENT (mA) 80 100 Figure 14. Random Jitter vs. Modulation Current, IBIAS = 20 mA 80 45 40 20 05228-012 FALL TIME (ps) 60 0 0 20 40 60 MODULATION CURRENT (mA) 80 35 30 25 20 15 10 05228-013 DETERMINISTIC JITTER (ps) 40 5 0 20 100 40 60 80 MODULATION CURRENT (mA) 100 Figure 15. Deterministic Jitter at 2.488 Gbps vs. Modulation Current, IBIAS = 20 mA Figure 13. Fall Time vs. Modulation Current, IBIAS = 20 mA Rev. 0 | Page 9 of 20 ADN2871 DIFFERENTIAL OUTPUT These performance characteristics were measured using the high speed electrical differential output circuit shown in Figure 3. 90 1.2 0.8 60 JITTER (rms) RISE TIME (ps) 1.0 0.6 0.4 30 0 0 20 40 60 80 05228-034 05228-032 0.2 0 100 0 20 MODULATION CURRENT (mA) 40 60 80 100 MODULATION CURRENT (mA) Figure 18. Random Jitter vs. Modulation Current, IBIAS = 20 mA Figure 16. Rise Time vs. Modulation Current, IBIAS = 20 mA 80 40 DETERMINISTIC JITTER (ps) 35 20 0 0 20 40 60 80 30 25 20 15 10 5 05228-035 40 05228-033 FALL TIME (ps) 60 0 100 0 MODULATION CURRENT (mA) 20 40 60 80 100 MODULATION CURRENT (mA) Figure 17. Fall Time vs. Modulation Current, IBIAS = 20 mA Figure 19. Deterministic Jitter at 4.25 Gbps vs. Modulation Current, IBIAS = 20 mA Rev. 0 | Page 10 of 20 ADN2871 PERFORMANCE CHARACTERISTICS 60 250 55 IBIAS = 80mA SUPPLY CURRENT (mA) 190 IBIAS = 40mA 160 130 IBIAS = 20mA IBIAS = 10mA 100 40 0 20 40 60 MODULATION CURRENT (mA) 80 45 40 35 30 25 05228-015 70 50 20 –50 100 05228-016 TOTAL SUPPLY CURRENT (mA) 220 –30 –10 10 30 50 TEMPERATURE (°C) 70 90 110 Figure 23. Supply Current (ICC) vs. Temperature with ALS Asserted, IBIAS = 20 mA Figure 20. Total Supply Current vs. Modulation Current Total Supply Current = ICC + IBIAS + IMOD 120 55 115 105 100 95 90 80 –50 05228-017 85 –30 –10 10 30 50 TEMPERATURE (°C) 70 90 110 45 40 35 30 –50 05228-036 MOD/IMMON RATIO 50 –30 –10 10 30 50 70 90 110 TEMPERATURE (°C) Figure 21. IBIAS/IBMON Gain vs. Temperature, IBIAS = 20 mA Figure 24. IMOD/IMMON Gain vs. Temperature, IMOD = 30 mA OC48 PRBS31 DATA TRANSMISSION t_OFF LESS THAN 1µs TRANSMISSION ALS t_ON 05228-037 ALS 05228-018 IBIAS/IBMON RATIO 110 Figure 25. ALS Negate Time, 50 µs/div Figure 22. ALS Assert Time, 5 µs/div Rev. 0 | Page 11 of 20 ADN2871 TRANSMISSION ON FAIL ASSERTED FAULT FORCED ON PAVSET 05228-022 05228-021 POWER SUPPLY TURN ON Figure 26. FAIL Assert Time,1 µs/div Figure 27. Time to Initialize, Including Reset, 40 ms/div Rev. 0 | Page 12 of 20 ADN2871 THEORY OF OPERATION Laser diodes have a current-in to light-out transfer function, as shown in Figure 28. Two key characteristics of this transfer function are the threshold current, Ith, and the slope in the linear region beyond the threshold current, referred to as the slope efficiency, LI. P1 PO P1 + PO PAV = 2 P1 ∆I ∆P LI = ∆I PO Ith The ADN2871 has two methods for setting the average power (PAV) and extinction ratio (ER). The average power and extinction ratio can be voltage-set using the output of a microcontroller’s voltage DACs to provide controlled reference voltages, PAVREF and ERREF. Alternatively, the average power and extinction ratio can be resistor-set using potentiometers at the PAVSET and ERSET pins, respectively. VOLTAGE SETPOINT CALIBRATION ∆P PAV The ADN2871 allows interface to a microcontroller for both control and monitoring (see Figure 29). The average power and extinction ratio can be set using the microcontroller DACs to provide controlled reference voltages PAVREF and ERREF. 05228-023 OPTICAL POWER ER = CONTROL METHODS CURRENT PAVREF = PAV × RSP × RPAV (Volts) Figure 28. Laser Transfer Function ERREF = LASER CONTROL I MOD × R ERSET (Volts) 100 Typically laser threshold current and slope efficiency are both functions of temperature. For FP- and DFB-type lasers, the threshold current increases and the slope efficiency decreases with increasing temperature. In addition, these parameters vary as the laser ages. To maintain a constant optical average power and a constant optical extinction ratio over temperature and laser lifetime, it is necessary to vary the applied electrical bias current and modulation current to compensate for the changing LI characteristics of the laser. In voltage setpoint mode, RPAV and RERSET must be 1 kΩ resistors with a 1% tolerance and a temperature coefficient of 50 ppm/°C. Average Power Control Loop (APCL) Power-On Sequence in Voltage Setpoint Mode The APCL compensates for changes in Ith and LI by varying IBIAS. Average power control is performed by measuring MPD current, Impd. This current is bandwidth-limited by the MPD. This is not a problem because the APCL is required to respond to the average current from the MPD. Note that during power up, there is an internal sequence that allows 25 ms before enabling the alarms; therefore, the customer must ensure that the voltage for PAVREF and ERREF are active within 20 ms after ramp-up of the power supply. If the PARREF and ERREF voltages are supplied after 25 ms then the part alarms and FAIL is activated. Extinction Ratio (ER) Control where: RSP = is the optical responsivity (in amperes per watt). PAV is the average power required. RPAV = RERSET = 1 kΩ. IMOD = Modulation current ER control is implemented by adjusting the modulation current. Temperature calibration is required in order to adjust the modulation current to compensate for variations of the laser characteristics with temperature. Rev. 0 | Page 13 of 20 ADN2871 VCC VCC VCC Tx_DISABLE VCC L Tx_FAULT VCC FAIL ALS IMODN LASER R MPD IMODP DATAP PAVSET ADI MICROCONTROLLER DAC IBIAS RPAV ADC ×100 1kΩ CCBIAS IMOD GND ERREF DAC DATAN 100Ω CONTROL PAVREF ERSET ADN2871 1kΩ GND IBMON IMMON VCC GND PAVCAP NC GND 470Ω GND 05228-001 1kΩ GND Figure 29. ADN2871 Using Microconverter Voltage Setpoint Calibration and Monitoring VCC VCC VCC VCC L FAIL VCC ALS IMODN R LASER VCC IMODP PAVREF DATAP MPD RPAV PAVSET DATAN 100Ω CONTROL IBIAS GND VCC ×100 ERREF CCBIAS IMOD VREF ERSET ADN2871 IBMON VCC GND 1kΩ GND IMMON 470Ω PAVCAP NC GND GND Figure 30. ADN2871 Using Resistor Setpoint Calibration of Average Power and Extinction Ratio Rev. 0 | Page 14 of 20 05228-025 GND ADN2871 RESISTOR SETPOINT CALIBRATION In resistor setpoint calibration. PAVREF, ERREF, and RPAV must all be tied to VCC. The average power and extinction ratio can be set using the PAVSET and ERSET pins, respectively. A resistor is placed between the pin and GND to set the current flowing in each pin as shown in Figure 30. The ADN2871 ensures that both PAVSET and ERSET are kept 1.23 V above GND. The PAVSET and ERSET resistors are given by RPAVSET = RERSET = 1. 2 V PAV × RSP 1.2 V × 100 IMOD (Ω) (Ω) where: RSP = is the optical responsivity (in amperes per watt). IMOD is the modulation current required. PAV is the average power required. Method 2: Measuring IMPD Across a Sense Resistor The second method has the advantage of providing a valid IMPD reading at all times, but has the disadvantage of requiring a differential measurement across a sense resistor directly in series with the IMPD. As shown in Figure 32, a small resistor, Rx, is placed in series with the IMPD. If the laser used in the design has a pinout where the monitor photodiode cathode and the lasers anode are not connected, a sense resistor can be placed in series with the photodiode cathode and VCC, as shown in Figure 33. When choosing the value of the resistor, the user must take into account the expected IMPD value in normal operation. The resistor must be large enough to make a significant signal for the buffered ADC to read, but small enough not to cause a significant voltage reduction across the IMPD. The voltage across the sense resistor should not exceed 250 mV when the laser is in normal operation. It is recommended that a 10 pF capacitor be placed in parallel with the sense resistor. VCC IMPD MONITORING IMPD monitoring can be implemented for voltage setpoint and resistor setpoint as described next. PHOTODIODE LD Voltage Setpoint µC ADC DIFFERENTIAL INPUT In voltage setpoint calibration, two methods may be used for IMPD monitoring. 200Ω RESISTOR 10pF Method 1: Measuring Voltage at RPAV The IMPD current is equal to the voltage at RPAV divided by the value of RPAV (see Figure 31) as long as the laser is on and is being controlled by the control loop. This method does not provide a valid IMPD reading when the laser is in shutdown or fail mode. A microconverter buffered ADC input may be connected to RPAV to make this measurement. No decoupling or filter capacitors should be placed on the RPAV node because this can disturb the control loop. 05228-027 PAVSET ADN2871 Figure 32. Differential Measurement of IMPD Across a Sense Resistor VCC VCC 200Ω RESISTOR VCC LD µC ADC INPUT PHOTODIODE PHOTODIODE ADN2871 PAVSET ADN2871 Figure 33. Single Measurement of IMPD Across a Sense Resistor RPAV µC ADC 05228-026 INPUT R 1kΩ 05228-028 PAVSET Figure 31. Single Measurement of IMPD RPAV in Voltage Setpoint Mode Rev. 0 | Page 15 of 20 ADN2871 Resistor Setpoint In resistor setpoint calibration, the current through the resistor from PAVSET to ground is the IMPD current. The recommended method for measuring the IMPD current is to place a small resistor in series with the PAVSET resistor (or potentiometer) and measure the voltage across this resistor as shown in Figure 34. The IMPD current is then equal to this voltage divided by the value of resistor used. In resistor setpoint calibration, PAVSET is held to 1.2 V nominal; it is recommended that the sense resistor should be selected so that the voltage across the sense resistor does not exceed 250 mV. VCC PHOTODIODE This capacitor is placed between the PAVCAP pin and ground. It is important that the capacitor is a low leakage, multilayer ceramic type with an insulation resistance greater than 100 GΩ or a time constant of 1000 seconds, whichever is less. Pick a standard off-the-shelf capacitor value such that the actual capacitance is within ±30% of the calculated value after the capacitor’s own tolerance is taken into account. POWER CONSUMPTION The ADN2871 die temperature must be kept below 125°C. The LFCSP has an exposed paddle, which should be connected so that it is at the same potential as the ADN2871 ground pins. Power consumption can be calculated as PAVSET ICC = ICC min + 0.3 IMOD ADN2871 P = VCC × ICC + (IBIAS × VBIAS_PIN) + IMOD (VMODP_PIN + VMODN_PIN)/2 µC ADC R 05228-029 INPUT TDIE = TAMBIENT + θJA × P Thus, the maximum combination of IBIAS + IMOD must be calculated Figure 34. Single Measurement of IMPD Across a Sense Resistor in Resistor Setpoint IMPD Monitoring LOOP BANDWIDTH SELECTION To ensure that the ADN2871 control loop has sufficient bandwidth, the average power loop capacitor (PAVCAP) is calculated using the laser’s slope efficiency (watts/amps) and the average power required. For resistor setpoint control: PAVCAP = 3.2 E − 6 × LI (Farad) PAV where: ICC min = 30 mA, the typical value of ICC provided in Table 1 with IBIAS = IMOD = 0. TDIE is the die temperature. TAMBIENT is the ambient temperature. VBIAS_PIN is the voltage at the IBIAS pin. VMODP_PIN is the voltage at the IMODP pin. VMODN_PIN is the voltage at the IMODN pin. AUTOMATIC LASER SHUTDOWN (TX_DISABLE) For voltage setpoint control: LI PAVCAP = 1.28 E − 6 × (Farad) PAV where PAV is the average power required and LI (mW/mA) is the typical slope efficiency at 25°C of a batch of lasers that are used in a design. LI can be calculated as ALS (TX_DISABLE) is an input that is used to shut down the transmitter’s optical output. The ALS pin is pulled up internally with a 6 kΩ resistor, and conforms to SFP MSA specifications. When ALS is logic high or when open, both the bias and modulation currents are turned off. If an alarm has triggered and the bias and modulation currents are turned off, ALS can be brought high and then low to clear the alarm. BIAS AND MODULATION MONITOR CURRENTS P1 − P0 (mW/mA) LI = I MOD where P1 is the optical power (mW) at the one level, and P0 is the optical power (mW) at the zero level. The capacitor value equation is used to get a centered value for the particular type of laser that is used in a design and an average power setting. The laser LI can vary by a factor of 7 between different physical lasers of the same type and across temperatures without the need to recalculate the PAVCAP value. IBMON and IMMON are current-controlled current sources that mirror a ratio of the bias and modulation current. The monitor bias current, IBMON, and the monitor modulation current, IMMON, both should be connected to ground through a resistor to provide a voltage proportional to the bias current and modulation current, respectively. When using a microcontroller, the voltage developed across these resistors can be connected to two of the ADC channels, making available a digital representation of the bias and modulation current. Rev. 0 | Page 16 of 20 ADN2871 DATA INPUTS Data inputs should be ac-coupled (10 nF capacitors are recommended) and are terminated via a 100 Ω internal resistor between the DATAP and DATAN pins. A high impedance circuit sets the common-mode voltage and is designed to allow maximum input voltage headroom over temperature. It is necessary to use ac-coupling to eliminate the need for matching between common-mode voltages. LASER DIODE INTERFACING Figure 35 shows the recommended circuit for interfacing the ADN2871 to most TO-Can or coax lasers. DFB and FP lasers typically have impedances of 5 Ω to 7 Ω, and have axial leads. The circuit shown works over the full range of data rates from 155 Mbps to 3.3Gbps , including multirate operation (with no change to PAVCAP and ERCAP values); see the Multirate Performance Using Low Cost Fabry Perot Tosa NEC NX7315UA section for multirate performance examples. Coax lasers have special characteristics that make them difficult to interface to. They tend to have higher inductance, and their impedance is not well controlled. The circuit in Figure 35 operates by deliberately misterminating the transmission line on the laser side, while providing a very high quality matching network on the driver side. The impedance of the driver side matching network is very flat in comparison to frequency and enables multirate operation. A series damping resistor should not be used. VCC L (0.5nH) VCC C 100nF IMODP IBIAS Tx LINE 30Ω Tx LINE 30Ω R 24Ω C 2.2pF L 05228-030 ADN2871 BLMI8HG60ISN1D Figure 35. Recommended Interface for ADN2871 AC Coupling Care should be taken to mount the laser as close as possible to the PC board, minimizing the exposed lead length between the laser can and the edge of the board. The axial lead of a coax laser is very inductive (approximately 1 nH per mm). Long exposed leads result in slower edge rates and reduced eye margin. Recommended component layouts and gerber files are available by contacting the factory. Note that the circuit in Figure 35 can supply up to 56 mA of modulation current to the laser, sufficient for most lasers available today. Higher currents can be accommodated by changing transmission lines and backmatch values; contact the factory for recommendations. This interface circuit is not recommended for butterfly-style lasers or other lasers with 25 Ω characteristic impedance. Instead, a 25 Ω transmission line and inductive (instead of resistive) pull-up is recommended. The ADN2871 single-ended application shown in Figure 35 is recommended for use up to 2.7 Gbps. From 2.7 Gbps to 4.25 Gbps, a differential drive is recommended when driving VCSELs or lasers that have slow fall times. Differential drive can be implemented by adding a few extra components. A possible implementation is shown in Figure 36. The bias and modulation currents that are programmed into the ADN2871 need to be larger that the bias and modulation current required at the laser, due to the laser ac coupling interface and because some modulation current flows in pull-up resistors R1 and R2. VCC L4 = BLM18HG601SN1 L1 = 0.5nH R1 = 15Ω L3 = 4.7nH C1 = C2 = 100nF TOCAN/VCSEL IMODN 20Ω TRANMISSION LINES ADN2871 R3 C3 SNUBBER LIGHT IMODP IBIAS R2 = 15Ω L2 = 0.5nH L6 = BLM18HG601SN1 VCC SNUBBER SETTINGS: 40Ω AND 1.5pF, NOT OPTIMIZED, OPTIMIZATION SHOULD CONSIDER PARASITIC. Figure 36. Recommended Differential Drive Circuit Rev. 0 | Page 17 of 20 05228-031 RP 24Ω The 30 Ω transmission line used is a compromise between drive current required and the total power consumed. Other transmission line values can be used, with some modification of the component values. In Figure 35, the R and C snubber values 24 Ω and 2.2 pF, respectively, represent a starting point and must be tuned for the particular model of laser being used. RP, the pull-up resistor, is in series with a very small (0.5 nH) inductor. In some cases, an inductor is not required or can be accommodated with deliberate parasitic inductance, such as a thin trace or a via, placed on the PC board. ADN2871 ALARMS The ADN2871 has a latched, active high monitoring alarm (FAIL). The FAIL alarm output is an open drain in conformance to SFP MSA specification requirements. The ADN2871 has a three-fold alarm system that covers • • • Use of a bias current higher than expected, probably as a result of laser aging. circuit in Figure 37 can be used to indicate that FAIL has been activated while allowing the bias and modulation currents to remain on. The transistor’s VBE clamps the FAIL voltage to below 1.3 V disabling the automatic shutdown of bias and modulation currents. If an alarm has triggered and FAIL is activated ALS can be brought high and then low to clear the alarm. VCC Out-of-bounds average voltage at the monitor photodiode (MPD) input, indicating an excessive amount of laser power or a broken loop. LED D1 R1 10kΩ Undervoltage in the IBIAS node (laser diode cathode) that would increase the laser power. FAIL R2 330Ω Q1 NPN 05228-041 ADN2871 The bias current alarm trip point is set by selecting the value of resistor on the IBMON pin to GND. The alarm is triggered when the voltage on the IBMON pin goes above 1.2 V. FAIL is activated when the single-point faults in Table 6 occur. The Figure 37. FAIL Indication Circuit Table 6. ADN2871 Single-Point Alarms Alarm Type Bias Current MPD Current Crucial Nodes Pin Name IBMON PAVSET ERREF IBIAS Over Voltage or Short to VCC Condition Alarm if >1.2 V typical (+/-10% tolerance) Alarm if >threshold (typical threshold 1.5 V to 2.1 V) Alarm if shorted to VCC Ignore Under Voltage or Short to GND Condition Ignore Alarm if < threshold (typical threshold (0.6 V to 1.1 V) Ignore Alarm if shorted to GND Table 7. ADN2871 Response to Various Single-Point Faults in AC-Coupled Configuration (as shown in Figure 35) Pin CCBIAS PAVSET PAVREF Short to VCC Fault state occurs Fault state occurs Voltage mode: Fault state occurs Resistor mode: Tied to VCC Voltage mode: Fault state occurs Resistor mode: Tied to VCC Short to GND Fault state occurs Fault state occurs Fault state occurs Open Does not increase laser average power Fault state occurs Fault state occurs Fault state occurs PAVCAP DATAP DATAN ALS ERSET IMMON ERREF Fault state occurs Does not increase laser average power Does not increase laser average power Output currents shut off Does not increase laser average power Does not affect laser power Voltage mode: Fault state occurs Resistor mode: Tied to VCC IBMON FAIL IMODP IMODN IBIAS Fault state occurs Fault state occurs Does not increase laser average power Does not increase laser average power Fault state occurs Fault state occurs Does not increase laser average power Does not increase laser average power Normal currents Does not increase laser average power Does not increase laser average power Voltage mode: Does not increase average power Resistor mode: Fault state occurs Does not increase laser average power Does not increase laser average power Does not increase laser average power Does not increase laser average power Fault state occurs Voltage mode: Fault state occurs Resistor mode: Does not increase average power Fault state occurs Does not increase laser average power Does not increase laser average power Output currents shut off Does not increase laser average power Does not increase laser average power Does not increase laser average power RPAV Rev. 0 | Page 18 of 20 Does not increase laser average power Does not increase laser average power Does not increase laser average power Does not increase laser power Fault state occurs ADN2871 OUTLINE DIMENSIONS 0.60 MAX 4.00 BSC SQ PIN 1 INDICATOR 0.60 MAX TOP VIEW 3.75 BSC SQ 0.50 BSC 0.50 0.40 0.30 1.00 0.85 0.80 PIN 1 INDICATOR 19 18 2.25 2.10 SQ 1.95 BOTTOM VIEW 13 12 7 6 0.25 MIN 2.50 REF 0.80 MAX 0.65 TYP 12° MAX 24 1 0.05 MAX 0.02 NOM 0.30 0.23 0.18 SEATING PLANE 0.20 REF COPLANARITY 0.08 COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2 Figure 38. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm × 4 mm Body, Very Thin Quad (CP-24-3) Dimensions shown in millimeters Note: The LFCSP has an exposed paddle that must be connected to ground. ORDERING GUIDE Model ADN2871ACPZ1 ADN2871ACPZ-RL1 ADN2871ACPZ-RL71 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 24-Lead Lead Frame Chip Scale Package (LFCSP_VQ) 24-Lead Lead Frame Chip Scale Package (LFCSP_VQ) 24-Lead Lead Frame Chip Scale Package (LFCSP_VQ) Z = Pb-free part. Rev. 0 | Page 19 of 20 Package Option CP-24-3 CP-24-3 CP-24-3 ADN2871 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trade marks and registered trade marks are the property of their respective owners. D05228-0-6/05(0) Rev. 0 | Page 20 of 20