MICROCHIP TC1321

TC1321
10-Bit Digital-to-Analog Converter with Two-Wire Interface
Features
General Description
•
•
•
•
•
The TC1321 is a serially accessible 10-bit voltage output digital-to-analog converter (DAC). The DAC produces an output voltage that ranges from ground to an
externally supplied reference voltage. It operates from
a single power supply that can range from 2.7V to 5.5V,
making it ideal for a wide range of applications. Built
into the part is a Power-on Reset function that ensures
that the device starts at a known condition.
10-Bit Digital-to-Analog Converter
2.7-5.5V Single Supply Operation
Simple SMBus/I2CTM Serial Interface
Low Power: 350µA Operation, 0.5µA Shutdown
8-Pin SOIC and 8-Pin MSOP Packages
Applications
• Programmable Voltage Sources
• Digital Controlled Amplifiers/Attenuators
• Process Monitoring and Control
Communication with the TC1321 is accomplished via a
simple 2-wire SMBus/I2C compatible serial port, with
the TC1321 acting as a slave only device. The host can
enable the SHDN bit in the CONFIG register to activate
the Low Power Standby mode.
Device Selection Table
Part
Number
Package
Temperature Range
TC1321EOA 8-Pin SOIC (Narrow)
-40°C to +85°C
TC1321EUA
-40°C to +85°C
8-Pin MSOP
Package Type
8-Pin MSOP and
8-Pin SOIC (Narrow)
VREF 1
8
VDD
SDA 2
7
DAC-OUT
6
NC
5
VOUT
SCL 3
TC1321
GND 4
Typical Application
VIN
VDD
(8)
TC1321
–
VREF
(1)
DAC
VOUT
(5)
+
VADJUST
Serial Port
(3)
(2)
SCLK
SDAT
Microcontroller
 2002 Microchip Technology Inc.
DS21387B-page 1
TC1321
Functional Block Diagram
VDD
TC1321
Configuration Register
SDA
SCL
Serial Port
Interface
Data Register
Control
DAC-OUT
VREF
DS21387B-page 2
VOUT
DAC
GND
 2002 Microchip Technology Inc.
TC1321
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage (V DD) ............................................. +6V
Voltage on any Pin ... (GND – 0.3V) to (VDD + 0.3V)
Current on any Pin ............................................ ±50mA
Package Thermal Resistance (θJA)............ 330°C C/W
Operating Temperature (TA)........................ See Below
Storage Temperature (TSTG) .............. -65°C to +150°C
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
TC1321 ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VDD = 2.7V to 5.5V, -40°C ≤ TA ≤ +85°C, VREF = 1.2 unless otherwise noted.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
Power Supply
VDD
Supply Voltage
2.7
—
5.5
V
IDD
Operating Current
—
350
500
mA
VDD = 5.5V, VREF = 1.2V
Serial Port Inactive (Note 1)
IDD-STANDBY
Standby Supply Current
—
0.1
1
µA
VDD = 3.3V
Serial Port Inactive (Note 1)
Static Performance - Analog Section
Resolution
—
—
10
Bits
INL
Integral Non-Linearity at FS, TA = +25°C
—
—
±4.0
LSB
FSE
Full Scale Error
—
—
±3
%FS
(Note 2)
DNL
Differential Non-Linearity, TA = +25°C
-1
—
+2
LSB
All Codes (Note 2)
VOS
Offset Error at VOUT
—
±0.3
±8
mV
(Note 2)
TCV OS
Offset Error Tempco at VOUT
—
10
—
µv/°C
PSRR
Power Supply Rejection Ratio
—
80
—
dB
VREF
Voltage Reference Range
0
—
VDD – 1.2
V
IREF
Reference Input Leakage Current
—
—
±1.0
µA
VDD at DC
VSW
Voltage Swing
0
—
VREF
V
VREF ≤ (VDD – 1.2V)
ROUT
Output Resistance @ VOUT
—
5.0
—
Ω
ROUT (Ω)
IOUT
Output Current (Source or Sink)
—
2
—
mA
ISC
Output Short-Circuit Current
VDD = 5.5V
—
—
30
20
50
50
mA
mA
Source
Sink
Dynamic Performance
SR
Voltage Output Slew Rate
—
0.8
—
V/µs
tSETTLE
Output Voltage Full Scale Settling Time
—
10
—
µsec
tWU
Wake-up Time
—
20
—
µs
Digital Feed Through and Crosstalk
—
5
—
nV-s
SDA = VDD , SCL = 100kHz
Serial Port Interface
VIH
Logic Input High
2.4
—
VDD
V
VIL
Logic Input Low
—
—
0.6
—
VOL
SDA Output Low
—
—
—
—
0.4
0.6
V
V
CIN
Input Capacitance SDA, SCL
—
5
0.4
pF
ILEAK
I/O Leakage
—
—
±1.0
µA
IOL = 3mA (Sinking Current)
IOL = 6mA
Note 1: SDA and SCL must be connected to VDD or GND.
2: Measured at VOUT ≥ 50mV referred to GND to avoid output buffer clipping.
 2002 Microchip Technology Inc.
DS21387B-page 3
TC1321
TC1321 ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: VDD = 2.7V to 5.5V, -40°C ≤ TA ≤ +85°C, VREF = 1.2 unless otherwise noted.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
Serial Port AC Timing
fSMB
SMBus Clock Frequency
10
—
100
kHz
tIDLE
Bus Free Time Prior to New Transition
4.7
—
—
µsec
tH(START)
START Condition Hold Time
4.0
—
—
µsec
tSU(START)
START Condition Setup Time
4.7
—
—
µsec
tSU(STOP)
STOP Condition Setup Time
4.0
—
—
µsec
tH-DATA
Data In Hold Time
100
—
—
nsec
tSU-DATA
Data In Setup Time
100
—
—
nsec
tLOW
Low Clock Period
4.7
—
—
µsec
tHIGH
High Clock Period
4
—
—
µsec
90% to 90%
tF
SMBus Fall Time
—
—
300
nsec
90% to 10%
tR
SMBus Rise Time
—
—
1000
nsec
10% to 90%
tPOR
Power-on Reset Delay
—
500
—
µsec
VDD ≥ VPOR (Rising Edge)
90% SCL to 10% SDA
(for Repeated START
Condition)
10% to 10%
Note 1: SDA and SCL must be connected to VDD or GND.
2: Measured at VOUT ≥ 50mV referred to GND to avoid output buffer clipping.
DS21387B-page 4
 2002 Microchip Technology Inc.
TC1321
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
Symbol
Type
1
VREF
Input
2
SDA
Bi-Directional
Description
Input. Voltage Reference Input can range from 0V to 1.2V below VDD.
Bi-directional. Serial data is transferred on the SMBus in both directions
using this pin.
3
SCL
Input
4
GND
Power
Ground.
Input. SMBus serial clock. Clocks data into and out of the TC1321.
5
VOUT
Output
Output. Buffered DAC output voltage. This voltage is a function of the
reference voltage and the contents of the DATA register.
6
NC
None
7
DAC-OUT
Output
Output. Unbuffered DAC output voltage. This voltage is a function of the
reference voltage and the contents of the DATA register. This output is
unbuffered and care must be taken that the pin is connected only to a
high-impedance node.
8
VDD
Power
Positive power supply input. See electrical specifications.
 2002 Microchip Technology Inc.
No connection.
DS21387B-page 5
TC1321
3.0
DETAILED DESCRIPTION
3.3
Standby Mode
The TC1321 is a monolithic 10-bit digital-to-analog
converter that is designed to operate from a single supply that can range from 2.7V to 5.5V. The DAC consists
of a data register (DATA), a configuration register
(CONF), and a current output amplifier. The TC1321
uses an external reference which also determines the
maximum output voltage.
The TC1321 allows the host to put it into a Low Power
(IDD = 0.5µA, typical) Standby mode. In this mode, the
D/A conversion is halted. The SMBus port operates
normally. Standby mode is enabled by setting the
SHDN bit in the CONFIG register. The table below
summarizes this operation.
The TC1321 uses a current steering DAC based on an
array of matched current sources. This current, along
with a precision resistor, converts the contents of the
Data Register and VREF into an output voltage, VOUT
given by:
TABLE 3-1:
VOUT = VREF (DATA/1024)
3.1
Reference Input
The reference pin, V REF, is a buffered high-impedance
input and because of this, the load regulation of the reference source needs only to be able to tolerate leakage
levels of current (less than 1µA). VREF accepts a voltage range from 0 to (VDD – 1.2V). Input capacitance is
typically 10pF.
3.2
STANDBY MODE OPERATION
SHDN Bit
3.4
Operating Mode
0
Normal
1
Standby
SMBus Slave Address
The TC1321 is internally programmed to have a default
SMBus address value of 1001 000b. Seven other
addresses are available by custom order (contact factory). See Figure 3-1 for location of address bits in
SMBus protocol.
Output Amplifier
The TC1321 DAC output is buffered with an internal
unity gain rail-to-rail input/output amplifier with a typical
slew rate of 0.8V/µsec. Maximum full scale transition
settling time is 10µsec to within ±1/2LSB when loaded
with 1kΩ in parallel with 100pF.
DS21387B-page 6
 2002 Microchip Technology Inc.
TC1321
FIGURE 3-1:
SMBus PROTOCOLS
Write 1-Byte Format
S
Address
R/W
0
7-Bits
Command
ACK
ACK
8-Bits
Slave Address
Data
ACK
P
8-Bits
Command Byte: selects
which register you are
writing to.
Data Byte: data goes
into the register set
by the command byte.
Write 2-Byte Format
S
Address
R/W
Command
ACK
0
7-Bits
ACK
8-Bits
Slave Address
Data
ACK
8-Bits
Command Byte: selects
which register you are
writing to.
Data
ACK
P
NACK
P
8-Bits
Data Byte: data goes
into the register set
by the command byte.
Read 1-Byte Format
S
Address
7-Bits
R/W ACK Command
ACK
R/W ACK Data
Address
S
NACK
P
1
8-Bits
7-Bits
8-Bits
Command Byte: selects Slave Address: repeated Data Byte: reads from
which register you are due to change in data
the register set by the
reading from.
flow direction.
command byte.
0
Slave Address
Read 2-Byte Format
S
Address
7-Bits
R/W ACK Command
0
8-Bits
ACK
1
7-Bits
Command Byte: selects
which register you are
reading from.
Slave Address
R/W ACK Data
Address
S
8-Bits
ACK
Data
8-Bits
Slave Address: repeated Data Byte: reads from
due to change in data
the register set by the
flow direction.
command byte.
Receive 1-Byte Format
S
Address
7-Bits
R/W ACK
1
Data
NACK P
8-Bits
S = START Condition
Data Byte: reads data from
P = STOP Condition
the register commanded by
Shaded = Slave Transmission the last read byte or write
byte transmission.
Receive 1-Byte Format
S
Address
7-Bits
R/W ACK
1
Data
8-Bits
ACK
Data
NACK
P
8-Bits
Data Byte: reads data from
S = START Condition
the register commanded by
P = STOP Condition
Shaded = Slave Transmission the last read byte or write
byte transmission.
 2002 Microchip Technology Inc.
DS21387B-page 7
TC1321
4.0
SERIAL PORT OPERATION
4.1
START Condition (START)
The Serial Clock input (SCL) and bi-directional data
port (SDA) form a 2-wire bi-directional serial port for
programming and interrogating the TC1321. The
following conventions are used in this bus architecture.
The TC1321 continuously monitors the SDA and SCL
lines for a START condition (a HIGH to LOW transition
of SDA while SCL is HIGH), and will not respond until
this condition is met.
TABLE 4-1:
4.2
Term
TC1321 SERIAL BUS
CONVENTIONS
Explanation
Transmitter The device sending data to the bus.
Receiver
The device receiving data from the bus.
Master
The device which controls the bus: initiating
transfers (START), generating the clock, and
terminating transfers (STOP).
Slave
The device addressed by the master.
START
A unique condition signaling the beginning of
a transfer indicated by SDA falling
(High - Low) while SCL is high.
STOP
A unique condition signaling the end of a
transfer indicated by SDA rising (Low - High)
while SCL is high.
ACK
A Receiver Acknowledges the receipt of each
byte with this unique condition. The Receiver
drives SDA low during SCL high of the ACK
clock pulse. The Master provides the clock
pulse for the ACK cycle.
Busy
Communication is not possible because the
bus is in use.
Not Busy
When the bus is IDLE, both SDA and SCL will
remain high.
Data Valid
The state of SDA must remain stable during
the High period of SCL in order for a data bit
to be considered valid. SDA only changes
state while SCL is low during normal data
transfers. ( See START and STOP
conditions.)
All transfers take place under control of a host, usually
a CPU or microcontroller, acting as the Master, which
provides the clock signal for all transfers. The TC1321
always operates as a Slave. The serial protocol is illustrated in Figure 3-1. All data transfers have two phases;
all bytes are transferred MSB first. Accesses are initiated by a START condition (START), followed by a
device address byte and one or more data bytes. The
device address byte includes a Read/Write selection
bit. Each access must be terminated by a STOP Condition (STOP). A convention called Acknowledge
(ACK) confirms receipt of each byte. Note that SDA can
change only during periods when SCL is LOW (SDA
changes while SCL is HIGH are reserved for START
and STOP conditions).
DS21387B-page 8
Address Byte
Immediately following the START condition, the host
must transmit the address byte to the TC1321. The
7-bit SMBus address for the TC1321 is 1001000. The
7-bit address transmitted in the serial bit stream must
match for the TC1321 to respond with an Acknowledge
(indicating the TC1321 is on the bus and ready to
accept data). The eighth bit in the Address Byte is a
Read-Write bit. This bit is a 1 for a read operation or 0
for a write operation. During the first phase of any
transfer, this bit will be set = 0 to indicate that the
command byte is being written.
4.3
Acknowledge (ACK)
Acknowledge (ACK) provides a positive handshake
between the host and the TC1321. The host releases
SDA after transmitting eight bits, then generates a ninth
clock cycle to allow the TC1321 to pull the SDA line
LOW to Acknowledge that it successfully received the
previous eight bits of data or address.
4.4
Data Byte
After a successful ACK of the address byte, the host
must transmit the data byte to be written or clock out
the data to be read. (See the appropriate timing diagrams.) ACK will be generated after a successful write
of a data byte into the TC1321.
4.5
Stop Condition (STOP)
Communications must be terminated by a STOP condition (a LOW to HIGH transition of SDA while SCL is
HIGH). The STOP condition must be communicated by
the transmitter to the TC1321. Refer to Figure 4-1, Timing Diagrams for serial bus timing.
 2002 Microchip Technology Inc.
TC1321
FIGURE 4-1:
TIMING DIAGRAMS
SMBus Write Timing Diagram
A
ILOW
B
C
IHIGH
D
E
F
G
H
I
K
J
SCL
SDA
tSU(START) tH(START)
tSU(STOP)
tSU-DATA
E = Slave Pulls SDA Line Low
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Master
H = LSB of Data Clocked into Master
A = START Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
tIDLE
I = Acknowledge Clock Pulse
J = STOP Condition
K = New START Condition
SMBus Read Timing Diagram
A
ILOW
B
IHIGH
C
D
E
F
G
H
I
J
K
L
M
SCL
SDA
tSU(START) tH(START)
A = START Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low
 2002 Microchip Technology Inc.
tSU-DATA
tH-DATA
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Slave
H = LSB of Data Clocked into Slave
I = Slave Pulls SDA Line Low
tSU(STOP) tIDLE
J = Acknowledge Clocked into Master
K = Acknowledge Clock Pulse
L = STOP Condition, Data Executed by Slave
M = New START Condition
DS21387B-page 9
TC1321
4.6
Register Set and Programmer’s
Model
TABLE 4-2:
TC1321 COMMAND SET
(SMBus READ_BYTE AND
WRITE_BYTE)
Data Register (DATA) for 1st Byte
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
MSB
X
X
X
X
X
X
X
Data Register (DATA) for 2nd Byte
Command Byte Description
Command
Code
RWD
00h
Read/Write Data (DATA)
RWCR
01h
Read/Write Configuration
(CONFIG)
TABLE 4-3:
Function
CONFIGURATION REGISTER
(CONFIG), 8-BIT, READ/WRITE
D[1]
D[0]
X
X
X
X
X
X
X
LSB
X
X
X
X
X
X
The DAC output voltage is a function of reference voltage and the binary value of the contents of the register
DATA. The transfer function is given by the expression:
EQUATION 4-1:
VOUT = VREF x  DATA 
 1024 
Configuration Register (CONFIG)
D[7] D[6]
D[5]
D[4]
D[3]
D[2]
Reserved
Function
DATA REGISTER (DATA),
10-BIT, READ/WRITE
TABLE 4-4:
D[1]
D[0]
SHDN
Bit
POR
Type
Operation
D[0]
0
Standby Switch
Read/
Write
1 = Standby
0 = Normal
D[7]-D[1]
0
Reserved;
Always returns
Zero when Read
N/A
N/A
4.7
Register Set Summary
The TC1321’s register set is summarized in Table 4-5
below. All registers are 10-bits wide.
TABLE 4-5:
Name
Data
TC1321 REGISTER SET
SUMMARY
Description
POR State
DATA Register
(2-Byte Format)
Config CONFIG Register
DS21387B-page 10
Read Write
0000000000b
X
X
0000 0000b
X
X
 2002 Microchip Technology Inc.
TC1321
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
Package marking data not available at this time.
5.2
Taping Forms
Component Taping Orientation for 8-Pin MSOP Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
8-Pin MSOP
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
12 mm
8 mm
2500
13 in
Component Taping Orientation for 8-Pin SOIC (Narrow) Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
8-Pin SOIC (N)
 2002 Microchip Technology Inc.
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
12 mm
8 mm
2500
13 in
DS21387B-page 11
TC1321
5.3
Package Dimensions
8-Pin MSOP
PIN 1
.122 (3.10)
.114 (2.90)
.197 (5.00)
.189 (4.80)
.026 (0.65) TYP.
.122 (3.10)
.114 (2.90)
.043 (1.10)
MAX.
.016 (0.40)
.010 (0.25)
.008 (0.20)
.005 (0.13)
6° MAX.
.006 (0.15)
.002 (0.05)
.028 (0.70)
.016 (0.40)
Dimensions: inches (mm)
8-Pin SOIC
PIN 1
.157 (3.99)
.150 (3.81)
.244 (6.20)
.228 (5.79)
.050 (1.27) TYP.
.197 (5.00)
.189 (4.80)
.069 (1.75)
.053 (1.35)
.020 (0.51) .010 (0.25)
.013 (0.33) .004 (0.10)
.010 (0.25)
.007 (0.18)
8° MAX..
.050 (1.27)
.016 (0.40)
Dimensions: inches (mm)
DS21387B-page 12
 2002 Microchip Technology Inc.
TC1321
NOTES:
 2002 Microchip Technology Inc.
DS21387B-page 13
TC1321
SALES AND SUPPORT
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
DS21387B-page 14
 2002 Microchip Technology Inc.
TC1321
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© 2002, Microchip Technology Incorporated, Printed in the
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 2002 Microchip Technology Inc.
DS21387B-page 15
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Atlanta
500 Sugar Mill Road, Suite 200B
Atlanta, GA 30350
Tel: 770-640-0034 Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071 Fax: 630-285-0075
Dallas
4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423 Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260
Kokomo
2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387
Los Angeles
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338
China - Chengdu
Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-6766200 Fax: 86-28-6766599
China - Fuzhou
Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521
China - Shanghai
Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
China - Shenzhen
150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: 631-273-5305 Fax: 631-273-5335
Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Shenzhen 518001, China
Tel: 86-755-2350361 Fax: 86-755-2366086
San Jose
Hong Kong
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955
Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431
New York
Toronto
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509
India
Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Korea
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5934
Singapore
Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Microchip Technology Taiwan
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Denmark
Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
France
Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Germany
Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Italy
Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883
United Kingdom
Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
03/01/02
*DS21387B*
DS21387B-page 16
 2002 Microchip Technology Inc.