Ordering number : ENA2121 Bi-CMOS LSI PWM Current Control High-efficient Stepping Motor Driver LV8702V Overview The LV8702V is a 2-channel Full-bridge driver IC that can drive a stepping motor driver, which is capable of microstep drive and supports quarter step. Current is controlled according to motor load and rotational speed at half step, half step full-torque and quarter step excitation, thereby highly efficient drive is realized. Consequently, the reduction of power consumption, heat generation, vibration and noise is achieved. Features • Built-in 1ch PWM current control stepping motor driver (bipolar type) • BiCDMOS process IC • Ron (High-side Ron: 0.3Ω, Low-side Ron: 0.25Ω, total: 0.55Ω, Ta = 25ºC, IO = 2.5A) • Excitation mode is configurable as follows: full step/half step full-torque/half step/quarter step • Excitation step moves forward only with step signal input • IO max=2.5A • Built-in output short protection circuit (latch method) • Built-in thermal shut down circuit • Control power supply is unnecessary • Built-in high-efficient drive function (supports half step full-torque/half step/quarter step excitation mode) • Built-in step-out detection function (Step-out detection may not be accurate during high speed rotation) Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Power supply voltage VM max Output peak current IO peak Output current IO max Logic input voltage VIN -0.3 to +6 V DST1, DST2, MONI, Vdst1, Vdst2, -0.3 to +6 V tw ≤ 10ms, duty 20% 36 V 3 A 2.5 A SST pin input voltage Vmoni, Vsst Allowable power dissipation Pd max 5.5 W Operating temperature Topr -40 to +85 °C Storage temperature Tstg -55 to +150 °C Ta ≤ 25°C * * Specified board : 90.0mm × 90.0mm × 1.6mm, glass epoxy 4-layer board, with backside mounting. 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O1012NKPC 20120823-S00005 No.A2121-1/24 LV8702V Continued from preceding page. Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Recommended Operating Range at Ta = 25°C Parameter Symbol Conditions Ratings Unit Range of power supply voltage VM 9 to 32 Logic input voltage VIN 0 to 5.5 V V Range of VREF input voltage VREF 0 to 3 V Electrical Characteristics at Ta = 25°C, VM = 24V, VREF = 1.5V Parameter Symbol Ratings Conditions min Consumption current during typ IMstn ST = ”L” Consumption current IM ST = ”H”, OE = ”L”, STEP = ”L”, non-load VREG5 output voltage VREG5 IO = -1mA 4.5 150 Unit max 400 μA 4.5 6.5 mA 5 5.5 V 180 210 °C 110 standby Thermal shutdown temperature TSD Design certification Thermal hysteresis width ΔTSD Design certification Ronu IO = 2.5A, Source-side Ron Rond IO = 2.5A, Sink-side Ron IOleak VM = 32V °C 40 Motor driver Output on resistor Output leak current Ω 0.3 0.4 0.25 0.33 Ω 50 μA Forward diode voltage VD ID = -2.5A logic pin input current IINL VIN = 0.8V IINH VIN = 5V ADIN pin input voltage Vadin Ra2 = 100kΩ: refer to 15-4) Logic input ”H” level voltage VINH Logic input ”L” level voltage VINL Current Vtdac0_W Step0 (initial status, 1ch comparator level) 290 300 310 mV Vtdac1_W Step1 (initial + 1) 264 276 288 mV Vtdac2_W Step2 (initial + 2) 199 210 221 mV Vtdac3_W Step3 (initial + 3) 106 114 122 mV Vtdac0_H Step0 (initial status, 1ch comparator level) 290 300 310 mV Vtdac2_H Step2 (initial + 1) 199 210 221 mV Vtdac0_HF Step0 (initial status, 1ch comparator level) 290 300 310 mV mV quarter step selection reference voltage level half step half step 1.2 1.4 V 4 8 12 μA 30 50 70 μA 12 V 0.8 V 0 2.0 V (full-torque) Vtdac2’_HF Step2’ (initial + 1) 290 300 310 full step Vtdac2’_F Step2’ (initial status, 1ch comparator level) 290 300 310 mV Chopping frequency Fchop Cchop = 200pF 35 50 65 kHz CHOP pin charge/discharge Ichop 7 10 13 μA 0.8 1 1.2 V 400 mV current Chopping oscillator circuit Vtup threshold voltage VREF pin input current Iref DST1, DST2, MONI, VREF = 1.5V μA -0.5 Idst1 = Idst2 = Imoni = Isst = 1mA SST pin saturation voltage Charge pump VG output voltage VG Rise time tONG Oscillator frequency Fosc 28 28.7 VG = 0.1μF 90 125 29.8 V 0.5 mS 160 kHz No.A2121-2/24 LV8702V Package Dimensions unit : mm (typ) 3285B TOP VIEW SIDE VIEW BOTTOM VIEW 15.0 44 0.5 (3.6) 7.6 5.6 (7.8) 1 2 0.2 0.65 0.22 1.7 MAX (0.68) 0.05 (1.5) SIDE VIEW Allowable power dissipation, Pd max -- W 6.0 SANYO : SSOP44J(275mil) Pd max -- Ta Four-layer circuit board *1 5.5 5.0 4.0 Four-layer circuit board *2 3.8 3.0 2.9 2.0 2.0 1.0 *1 With components mounted on the exposed die-pad board *2 With no components mounted on the exposed die-pad board 0 --40 --20 0 20 40 60 80 100 Ambient temperature, Ta -- °C No.A2121-3/24 LV8702V Substrate specifications (Substrate recommended for operation of LV8702V) Size : 90mm × 90mm × 1.6mm (Four-layer substrate) Material : Glass epoxy Copper wiring density : L1 = 85%, L2 = 90% L1: Copper wiring pattern diagram L2: Copper wiring pattern diagram L3: GND layer L4: Power supply layer Cautions 1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 90% or more of the Exposed Die-Pad is wet. 2) For the set design, employ the derating design with sufficient margin. Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical stress such as vibration, impact, and tension. Accordingly, the design must ensure these stresses to be as low or small as possible. The guideline for ordinary derating is shown below: (1)Maximum value 80% or less for the voltage rating (2)Maximum value 80% or less for the current rating (However this does not apply to high efficiency drive because operating current is lower than the setting current.) (3)Maximum value 80% or less for the temperature rating 3) After the set design, be sure to verify the design with the actual product. Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc. Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal conduction, possibly resulting in thermal destruction of IC. No.A2121-4/24 LV8702V Pin Assignment SWOUT 1 44 VM CP2 2 43 VG CP1 3 42 PGND1 GMG2 4 41 OUT1A GMG1 5 40 OUT1A GAD 6 39 VM1 FR 7 38 VM1 STEP 8 37 RF1 ST 9 36 RF1 RST 10 35 OUT1B ADIN 11 34 OUT1B LV8702V MD2 12 33 OUT2A MD1 13 32 OUT2A VREG5 14 31 RF2 DST2 15 30 RF2 DST1 16 29 VM2 MONI 17 28 VM2 OE 18 27 OUT2B SST 19 26 OUT2B CHOP 20 25 PGND2 VREF 21 24 GST1 SGND 22 23 GST2 Top view No.A2121-5/24 LV8702V Block Diagram RF2 OUT2B OUT2A VM2 VM1 OUT1B OUT1A RF1 VG CP1 CP2 VM Charge pump Pre-output Pre-output regulator Pre-output Pre-output PGND VREG5 Output control logic MONI + VREF + - + Current (W1-2/1-2/ 1-2Full/2) attenuat Current (W1-2/1-2/ 1-2Full/2) CHOP Oscillator SST TSD DST1 LVS Signal processor2 Signal processor1 High-efficient drive ctrl logic DST2 SGND GAD OE RST STEP FR MD2 MD1 GST2 GST1 GMG2 GMG1 SWOUT ADIN ST No.A2121-6/24 LV8702V Pin Functions Pin No. Pin name Description 1 SWOUT Control signal output pin 2 CP2 Capacitor connection pin for charge pump 3 CP1 Capacitor connection pin for charge pump 4 GMG2 Driving capability margin adjuster pin 5 GMG1 Driving capability margin adjuster pin 6 GAD High-efficient drive switching pin 7 FR Forward/ reverse signal input pin 8 STEP STEP signal input pin 9 ST Chip enable pin 10 RST RESET signal input pin 11 ADIN Control signal input pin 12 MD2 Excitation mode switching pin 13 MD1 Excitation mode switching pin 14 VREG5 Capacitor connection pin for internal power supply 15 DST2 Drive status warning output pin 16 DST1 Drive status warning output pin 17 MONI Position detection monitor pin 18 OE Output enable signal input pin 19 SST Motor stop detection output pin 20 CHOP Capacitor connection pin for chopping frequency setting 21 VREF Constant current control reference voltage input pin 22 SGND Signal GND 23 GST2 Boost-up adjuster pin 24 GST1 Boost-up adjuster pin 25 PGND2 2ch power GND 26, 27 OUT2B 2ch OUTB output pin 28, 29 VM2 2ch motor power supply connection pin 30, 31 RF2 2ch current sense resistor connection pin 32, 33 OUT2A 2ch OUTA output pin 34, 35 OUT1B 1ch OUTB output pin 36, 37 RF1 1ch current sense resistor connection pin 38, 39 VM1 1ch motor power supply connection pin 40, 41 OUT1A 1ch OUTA output pin 42 PGND1 1ch power GND 43 VG Capacitor connection pin for charge pump 44 VM Motor power supply connection pin No.A2121-7/24 LV8702V Pin Description Pin No. Pin name 4 GMG2 5 GMG1 6 GAD 7 FR 8 STEP 10 RST 12 MD2 13 MD1 18 OE 23 GST2 24 GST1 Equivalent Circuit VREG5 10kΩ 100kΩ GND 9 ST VREG5 20kΩ 10kΩ 80kΩ GND 25 PGND2 26, 27 OUT2B 28, 29 VM2 30, 31 RF2 32, 33 OUT2A 34, 35 OUT1B 36, 37 RF1 38, 39 VM1 40, 41 OUT1A 42 PGND1 38 39 28 29 40 41 34 35 32 33 26 27 10kΩ 500Ω 25 42 500Ω 36 37 30 31 GND Continued on next page. No.A2121-8/24 LV8702V Continued from preceding page. Pin No. Pin name 2 CP2 3 CP1 43 VG 44 VM Equivalent Circuit 44 3 VREG5 2 43 100Ω GND 21 VREF VREG5 500Ω GND 14 VREG5 VM 2kΩ 80kΩ 26kΩ GND 15 DST2 16 DST1 17 MONI 19 SST VREG5 100kΩ GND Continued on next page. No.A2121-9/24 LV8702V Continued from preceding page. Pin No. 20 Pin name Equivalent Circuit CHOP VREG5 500Ω 500Ω GND 1 SWOUT VM PGND1 PGND2 11 ADIN VM 2pF 2kΩ 2pF 100kΩ GND 22 SGND No.A2121-10/24 LV8702V Operation description 1. Chip enable function The mode of the IC is switched with ST pin between standby and operation mode. In standby mode, the IC is set to power saving mode and all the logics are reset. During standby mode, the operation of the internal regulator circuit and the charge pump circuit are stopped. ST Status Internal regulator Charge pump L or Open Standby mode Standby Standby H Operating mode Operation Operation 2. STEP pin function The excitation step progresses by inputting the step signal to the STP pin. Input Operation mode ST STEP L or OPEN X* Standby mode H Excitation step forward H Excitation step keep * Don’t care 3. Input timing RST Tds1 (RST→STEP) Tsteph Tstepl STEP Tdh1 Tds1 (MD→STEP) (STEP→MD) MD1/ MD2 Tdh1 Tds1 (FR→STEP) (STEP→FR) FR Tdh1 Tds1 (OE→STEP) (STEP→OE) OE Tdh2 Tds2 (GAD→STEP) (STEP →GAD) GAD Tds2 Tdh2 (GMG→STEP) (STEP→GMG) GMG1/ GMG2 Tds2 Tdh2 (GST→STEP) (STEP →GST) GST1/ GST2 TstepH/TstepL : Clock H/L pulse width (min 12.5μs) Tds1 : Data set-up time (min 12.5μs) Tdh1 : Data hold time (min 12.5μs) Tds2 : Data set-up time (min 25μs) Tdh2 : Data hold time (min 25μs) No.A2121-11/24 LV8702V 4. Position detection monitor function The MONI position detection monitoring pin is of an open drain type. When the excitation position is in the initial position, the MONI output is placed in the ON state. (Refer to "Examples of current waveforms in each of the excitation modes.") 5. Setting constant-current control reference current This IC is designed to automatically exercise PWM constant-current chopping control for the motor current by setting the output current. Based on the voltage input to the VREF pin and the resistance connected between RF and GND, the output current that is subject to the constant-current control is set using the calculation formula below: IOUT = (VREF/5)/RF resistance The above setting is the output current at 100% of each excitation mode. For example, where VREF=1.5V and RF resistance 0.2Ω, we obtain output current as follows. IOUT = 1.5V/5/0.2Ω = 1.5A When high-efficient drive function is on, IOUT is adjusted automatically within the range of the current value set by VREF. 6. Reset function RST Operation mode L or OPEN Normal operation H RESET status RST RESET STEP MONI 1ch output 0% 2ch output Initial position When RST pin = “H”, the excitation position of the output is set to the initial position forcibly and MONI output is turned on. And then by setting RST = “L”, the excitation position moves forward with the next step signal. No.A2121-12/24 LV8702V 7. Output enable function OE Operation mode H Output OFF L or OPEN Output ON OE Power save mode STEP MONI 1ch output 0% 2ch output The output is in high-impedance state. When OE pin = “H”, the output is turned off forcibly and becomes a high-impedance output. However, since the internal logic circuit is in operation, an excitation position moves forward if step signal is input to STEP pin. Therefore, by setting back to OE = “L”, the output pin outputs signal based on the excitation position by step signal. 8. Excitation mode setting function MD1 and MD2 pin set excitation mode of the stepping motor as follows. Initial position MD1 MD2 Excitation mode L or OPEN L or OPEN full step excitation 1ch 2ch 100% -100% 0% H L or OPEN half step excitation 100% L or OPEN H quarter step excitation 100% 0% H H half step excitation 100% 0% (full-torque) The position of excitation mode is set to the initial position when: 1) a power is supplied and 2) counter is reset in each excitation mode. During full step excitation mode, high-efficient drive function is turned off even when GAD = “H”. No.A2121-13/24 LV8702V 9. Forward/reverse switching function FR Operation mode L or OPEN CW H CCW FR CW mode CCW mode CW mode STEP Excitation position (1) (2) (3) (4) (5) (6) (5) (4) (3) (4) (5) 1ch output 2ch output The built-in DA converter moves forward by 1bit with the rise of step signal that is input to STEP pin. Also a mode is switched between CW and CCW by setting FR pin. In CW mode, the phase of 2ch current delays by 90° compared to that of 1ch current. In CCW mode the phase of 2ch current moves forward by 90° compared to 1ch current. 10. Chopping frequency setting When you control constant current of this IC, chopping is performed using the frequency defined in the capacitor (Cchop) connected between CHOP pin and GND. The calculation for the value of chopping frequency is: Fchop = Ichop/ (Cchop×Vtchop×2) (Hz) Ichop: Capacitor charge and discharge current typ: 10μA Vtchop: Charge and discharge hysteresis voltage (Vtup-Vtdown) typ: 0.5V For example, where Cchop = 200pF, we obtain Fchop as follows: Fchop = 10μA/ (200pF×0.5V×2) = 50kHz 11. Blanking time If you attempt to control PWM constant current chopping of the motor current, when the mode shifts from DECAY to CHARGE, noise is generated in sense resistor pin due to the recovery current of parasitic diode flowing into current sense resistor, and this may cause error detection. The blanking time avoids noise at mode switch. During the blanking time, even if noise is generated in sense resistor, a mode does not switch from CHARGE to DECAY. In this IC, the blanking time is fixed to approximately 1μs. No.A2121-14/24 LV8702V 12. Output current vector locus (1step is normalized to 90°) 100 , θ2 (full step, half step full-torque) θ0 θ1 80 1ch phase current ratio (%) θ2 60 40 θ3 20 θ4 0 0 40 20 80 60 100 2ch phase current ratio (%) Setting current ration in each excitation mode STEP quarter step (%) 1ch half step (%) 2ch 1ch θ0 100 0 θ1 92 38 θ2 70 70 θ3 38 92 θ4 0 100 half step full-torque (%) 2ch 1ch full step (%) 2ch 1ch 100 0 100 0 70 70 100 100 0 100 0 100 2ch 100 100 No.A2121-15/24 LV8702V 13. The example of current waveform in each excitation mode full step excitation (CW mode) STEP MONI (%) 100 l1 0 -100 (%) 100 I2 0 -100 half step excitation full-torque (CW mode) STEP MONI (%) 100 I1 0 -100 (%) 100 I2 0 -100 No.A2121-16/24 LV8702V half step excitation (CW mode) STEP MONI (%) 100 I1 0 -100 (%) 100 I2 0 -100 quarter step excitation (CW mode) STEP MONI (%) 100 I1 0 -100 (%) 100 I2 0 -100 No.A2121-17/24 LV8702V 14. Current control operation specification (Sine wave increase) STEP Setting current Setting current Coil current Forced CHARGE fchop Current mode CHARGE SLOW FAST CHARGE SLOW FAST (Sine wave decrease) STEP Setting current Coil current Forced CHARGE Setting current fchop Current mode CHARGE SLOW FAST Forced CHARGE FAST CHARGE SLOW Each current mode is operated according to the following sequence. • At rise of chopping frequency, the CHARGE mode begins. (In the time defined as the “blanking time,” the CHARGE mode is forced regardless of the magnitude of the coil current (ICOIL) and set current (IREF).) • The coil current (ICOIL) and set current (IREF) are compared in this blanking time. When (ICOIL<IREF) state exists ; The CHARGE mode up to ICOIL ≥ IREF, then followed by changeover to the SLOW DECAY mode, and finally by the FAST DECAY mode for approximately 1μs. When (ICOIL<IREF) state does not exist ; The FAST DECAY mode begins. The coil current is attenuated in the FAST DECAY mode till one cycle of chopping is over. Above operations are repeated. Normally, the SLOW (+FAST) DECAY mode continues in the Triangle wave increasing direction, then entering the FAST DECAY mode till the current is attenuated to the set level and followed by the SLOW DECAY mode. No.A2121-18/24 LV8702V 15. High-efficient drive function This IC includes high-efficient drive function. When high-efficient drive function is turned on, IOUT is adjusted automatically within the current value set with VREF pin. When high-efficient drive function is turned off, the current value of IOUT becomes the maximum value set by REF pin. 1) High-efficient drive enable function High-efficient drive function is switched on and off with GAD pin. However, in the case of full step excitation mode (MD1 = MD2 = “L”), even when GAD = “H”, high-efficient drive function is turned off. Even if you adjust the GMG1, GMG2 of 15-2) and GST1, GST2 of 15-3), in the case of abrupt motor acceleration or load variation to the extent that auto adjuster cannot follow up and eventually leads to the rotation stepping-out, it is recommended that you turn off the high-efficient drive function temporally. As high-efficient control may become unstable due to the control signal from the motor is unstable during low speed rotation, it is also recommended to turn off this function as well. GAD Operation mode L or OPEN Normal mode H High-efficient mode (except for full step excitation mode) Recommended speed of high-efficient drive excitation Operating conditions Speed half step HB motor/no-load over 1500pps half step full-torque PM motor/no-load over 1000pps quarter step HB motor/no-load over 3000pps PM motor/no-load over 2500pps When there is a load, the high-efficient drive is enabled at slower speed. 2) High-efficient drive margin adjuster function By setting GMG1 and GMG2 pin, margin for step-out is adjusted. Where GMG1 = GMG2 = “L”, IOUT and consumption current are at the lowest. In some case, as the IOUT becomes lower, the number of boost-up process* may increase triggered by slight change of load. With insufficient driving capability, you need to increase the margin setting. One way to set GMG1 and GMG2 is to minimize boost-up level, then lower the margin from high to low to optimize the margin where motor rotates stably. In the application where load variation is excessive, you need to have a larger margin. GMG1 GMG2 Setting Current consumption Load following capability L or OPEN L or OPEN Margin: small Smallest Ordinary H L or OPEN Margin: middle Smaller Good L or OPEN H Margin: large Small Better H H Setting is inhibited - - *: This is a function to increase IOUT rapidly as soon as a possible stepping out is detected due to load variation during high efficiency drive. No.A2121-19/24 LV8702V 3) Boost-up adjuster function During high-efficient drive, boost-up adjuster function detects a possibility of step-out caused by such factors as abrupt load variation and then boosts up IOUT at once (Boost-up process). You can set a level of boost-up by setting GST1 and GST2 pins. One way to set GST1 and GST2 is to increase boost-up level from minimum to maximum within the maximum load condition and select the optimum boost-up setting where motor rotates without stepping out. Also, boost-up level varies depends on reference current defined by VREF. Therefore, you can increase load following capability by increasing VREF voltage. The higher the boost-up level is, the more the IC becomes tolerant for abrupt load variation. However, rotation stability may become poor (vibration and rotation fluctuation may occur) because excessively high boost-up level leads to rapid increase of IOUT at load variation. You may be able to improve poor rotation stability with high boost-up level by increasing high-efficient drive margin. GST1 GST2 Setting Increase of Iout load following capability Rotation stability L or OPEN L or OPEN Boost-up level minimum {(VREF/5)/RF resistance} Ordinary Best Good Better Better Good Best Ordinary × 1/128 H L or OPEN Boost-up level low {(VREF/5)/RF resistance} × 4/128 L or OPEN H Boost-up level high {(VREF/5)/RF resistance} × 16/128 H H Boost-up level maximum {(VREF/5)/RF resistance} × 64/128 4) External component The resistance value of Ra1, Ra2 (control signal resistors) is adjusted in such a way as to set the maximum SWOUT output voltage during motor rotation to 12V in ADIN pin. Preferably, resistance values of Ra1 and Ra2 are as high as possible to the extent that does not influence waveform. (Recommendation for Ra1: 15kΩ, Ra2: 100kΩ). In some motor where boost-up process occurs at a high speed rotation of 7000pps to 8000pps or higher (HB motor: Half step excitation), you can suppress boost-up by lowering Ra1. Moreover, you can achieve high efficiency at lower speed of 1500pps or lower by increasing resistance for Ra1 (HB motor: Half step excitation). Although it depends on a usage motor, step-out is detectable at higher speed rotation by attaching smaller resistor for Ra1. SWOUT Ra2 ADIN Ca Ra1 No.A2121-20/24 LV8702V 5) Drive status warning function DST1 and DST2 are open-drain output. The driving status can be monitored through a status of DST1 and DST2 pins. When step-out status is detected, DST1 is on for a period of 1 step. Likewise, when small step-out margin status is detected, DST2 turns on for the period of 1 step. In the case of output short status or overheat status, DST1 and DST2 stay on until ST = “L”. Step-out status and small step-out margin status are detectable during high-efficient drive only. In some cases, step-out status may not be detected properly. Hence, make sure to verify the operation with the usage application. If step-out or small step-out margin status occur frequently, make sure to set a large high-efficient drive margin or higher boost-up level. DST1 DST2 Status OFF OFF Normal status ON OFF Step-out status *1(this function is enabled only in high-efficient drive) OFF ON Small step-out margin status *2(this function is enabled only in high-efficient drive) ON ON Output short status or overheat status *1: Although it depends on a usage motor, step-out is detectable at higher speed rotation by attaching smaller resistor for Ra1. *2: If DST2 alone is turned on, boost-up processing is performed. 16. Output short protection circuit Output short protection circuit is included in this IC which sets an output to standby mode and turns on warning output. This protection circuit prevents IC destruction when the output is short due to power short or ground short. 1) Operation overview When output short is detected, short detection circuit operates. If the short status continues for the period of internal timer (≈2μs), the output of 1ch/ 2ch is turned off. If the short status exceeds the timer latch time (≈32μs) set in the internal timer, the output is turned on again and detects short status again. If short is detected again, all the output of 1ch/ 2ch are switched to standby mode and the status is kept. To cancel the standby status, set ST = “L”. 2) Error status warning output pin (DST2, DST1) When the IC detects error status and protection circuit operates, DST2 pin and DST1 pin outputs the error status to CPU side. This pin is open-drain output. When error status is detected, DST2 and DST1 output turn on (DST2 = DST1 = “L”). DST2/DST1 pins are turned on in the following statuses: Error status DST2 DST1 Short is detected in 1ch side. ON ON Short is detected in 2ch side. ON ON When overheat is detected. ON ON No.A2121-21/24 LV8702V 17. Charge pump circuit When ST pin is set to “H”, charge pump circuit operates and VG pin voltage increases from VM voltage to VM + VREG5 voltage. Because the output is not turned on if VM+4V or more is not pressured, the voltage of the VG pin recommends the drive of the motor to put the time of tONG or more, and to begin. ST VG pin voltage VM+VREG5 VM+4V VM tONG Fg. VG pin voltage 18. Current save function when motor is stopped SST pin is the open-drain output. When STEP signal is not input for about 16mS, (min: 13mS, max: 23mS), SST pin detects that the rotation of the motor is stopped and SST pin is turned on. At this time, high-efficient drive function is turned off automatically and full current value is set for IOUT by VREF pin. And then after signal is input to STEP pin, SST pin is turned off and high-efficient control function is enabled. In this driver, the circuit constituent is as follows. By decreasing VREF voltage when the motor is stopped, IOUT current can be saved. However, this function is unusable when you rotate motor at which input cycle of STEP pulse signal is 16mS or longer. Motor stop Rotation Motor stop "Hi-Z" "L" Rref2 VREF Rref1 Rsst "L" SST output SST VREF voltage Time 1) With STEP signal where Rref1 = 30kΩ, Rref2 = 68kΩ and Rsst = 5kΩ VREF1 = 5V×30kΩ/(68k+30kΩ) ≈ 1.53V Where VREF1 = 1.53V, IOUT = VREF/5/0.22Ω ≈ 1.39A 2) Without STEP signal where Rref1 = 30kΩ, Rref2 = 68kΩ, and Rsst = 5kΩ VREF2 = 5V×4.3kΩ/(68k+4.3kΩ) ≈ 0.3V Where VREF2 = 0.3V IOUT = VREF/5/0.22Ω ≈ 0.27A No.A2121-22/24 LV8702V Example of application circuit Make sure that ADIN is 12V or less since constant varies depends on user applications. ADIN = (VM+VD) × Ra1/(Ra1+Ra2) VD: voltage for diode Ca: capacitor for filter Ra1 + - Ra2 1 SWOUT VM 44 2 CP2 VG 43 3 CP1 PGND1 42 4 GMG2 OUT1A 41 5 GMG1 OUT1A 40 10μF 0.1μF 0.1μF Ca logic input 6 GAD VM1 39 7 FR VM1 38 CLOCK input 8 STEP RF1 37 logic input 9 ST RF1 36 11 ADIN logic input 0.1μF 47kΩ 47kΩ 47kΩ short/stepout detection monitor As for Rsst, refer to 18.current save function. 12 MD2 13 MD1 LV8702V 10 RST 0.22Ω OUT1B 35 OUT1B 34 OUT2A 33 M OUT2A 32 14 VREG5 RF2 31 15 DST2 RF2 30 16 DST1 VM2 29 17 MONI VM2 28 18 OE OUT2B 27 19 SST OUT2B 26 20 CHOP PGND2 25 21 VREF GST2 24 22 SGND GST2 23 0.22Ω Rsst 150pF VREF 30kΩ 68kΩ logic input - + 5V Calculation for each constant setting according to the above circuit diagram is as follows. 1) Constant current (100%) setting 2) Chopping frequency setting VREF = 5V×30kΩ/(68kΩ + 30kΩ) ≈ 1.53V Fchop = Ichop/(Cchop×Vtchop×2) When VREF = 1.53V : =10μA/(150pF×0.5V×2) IOUT = VREF/5/0.22Ω ≈ 1.39A ≈ 66.7kHz No.A2121-23/24 LV8702V SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. Regarding monolithic semiconductors, if you should intend to use this IC continuously under high temperature, high current, high voltage, or drastic temperature change, even if it is used within the range of absolute maximum ratings or operating conditions, there is a possibility of decrease reliability. Please contact us for a confirmation. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. 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Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of October, 2012. Specifications and information herein are subject to change without notice. PS No.A2121-24/24