ATS635LSE and ATS636LSE Programmable Back Biased Hall-Effect Switch with TPOS Functionality PACKAGE DIAGRAM Pin 1 = VCC Pin 2 = VOUT Pin 3 = No Connect Pin 4 = GND ABSOLUTE MAXIMUM RATINGS Supply Voltage, VCC ………………….…….. 28 V* Reverse Supply Voltage, VRCC …………… -18 V Overvoltage Supply Current, ICC …..……100 mA Output Off Voltage, VOUT…………………… 26.5V † Output Sink Current, IOUT…...…………. 20 mA Magnetic Flux Density, B…………… Unlimited Package Power Dissipation, PD ….. See Graph Operating Temperature Range, TA Suffix “L”………...……….. -40 °C to +150 °C Junction Temperature, TJ ……..…………..165 °C Storage Temperature Range TS ………………………… -65 °C to +170 °C *Fault conditions that produce supply voltage transients will be clamped by an internal Zener diode. These conditions can be tolerated but should be avoided. † Internal current limiting is intended to protect the device from output short circuits, but is not intended for continuous operation. The ATS635LSE and ATS636LSE programmable, true power-on state (TPOS), sensors are an optimized Hall-effect IC and magnet combination that switch in response to magnetic signals created by ferrous targets in gear-tooth sensing and proximity applications. The devices are externally programmable. A wide range of programmability is available on the magnetic operate point (BOP) while the hysteresis remains fixed. This advanced feature allows for optimization of the sensor switch point and can drastically reduce the effects of mechanical placement tolerances found in production environments . A proprietary dynamic offset cancellation technique, with an internal high-frequency clock, reduces the residual offset voltage, which is normally caused by device overmolding, temperature dependencies, and thermal stress. Having the Hall element and amplifier in a single chip minimizes many problems normally associated with low-level analog signals. This sensor system is ideal for use in gathering speed or position information using gear-tooth-based configurations, or for proximity sensing with ferrous targets. The ATS635LSE switches HIGH in the presence of a ferrous target or tooth and switches LOW in the presence of a target valley, window, or when the ferrous target is removed. The ATS636LSE has the opposite polarity and switches LOW in the presence of a ferrous target or tooth and switches HIGH in the presence of a target valley, window, or when the ferrous target is removed. These devices are available in lead (Pb) free versions, with 100% matte tin leadframe plating. FEATURES Chopper Stabilization Extremely low switch-point drift over temperature On-chip Protection Supply transient protection Output short-circuit protection Reverse-battery protection True Zero-Speed Operation True Power-On State Single-chip Sensing IC for High Reliability Optimized Magnetic Circuit Wide Operating Voltage Range Internal Regulator Use the following complete part numbers when ordering: Part Number Pb-Free Output (Tooth) Packing* ATS635LSETN-T Yes High 13-in. reel, 450 pieces/reel ATS636LSETN-T Yes Low 13-in. reel, 450 pieces/reel *Contact Allegro for additional packing options. ATS635LSE-DS Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES CHARACTERISTICS ELECTRICAL CHARACTERISTICS over operating voltage and junction temperature range (unless otherwise noted) Characteristics Symbol Test Conditions VCC POS Limits Min. Typ. Max. Units Operating 4.2 – 24 V After programming VCC = 0 à VCC(min), t > t ON : B < BOP ATS636 HIGH HIGH HIGH – B < BOP ATS635 LOW LOW LOW – VOUT(SAT) Output on, IOUT = 20 mA – 175 400 mV IOUTM Pulse test method Output on 30 50 90 mA Output Leakage Current IOFF Output off, VOUT = 24 V – – 10 µA Supply Current ICC Output off (HIGH) – 2.5 5.5 mA Output on (LOW) – 2.5 5.5 mA Reverse Supply Current IRCC VRCC = -18V – – -5 mA tON Output off; VCC > VCC(min) – 35 50 µs Output Rise Time tr RL = 820 Ω, CL = 10 pF – 1.2 5 µs Output Fall Time tf RL = 820 Ω, CL = 10 pF – 1.2 5 µs Sampling Frequency fSample - – 250 - kHz Supply Zener Voltage VZsupply 28 – – V Output Zener Voltage VZOutput 30 – – V Supply Voltage 1 Power-Up State Low Output Voltage Output Current Limit Power-On Delay 2 3 Supply Zener Current 4 Output Zener Current ICC = ICC(max) + 3 mA TA = 25°C IOUT = 3 mA TA = 25°C IZsupply VS = 28 V – – 8.5 mA IZOutput VO = 30 V – – 3 mA Note: Typical data is at VCC = 12 V and TA = +25°C. 1 Do not exceed the maximum thermal junction temperature: see power de-rating curve. Short circuit protection is not intended for continuous operation and is tested using pulses. 3 The power on delay is the time that is necessary before the output signal is valid 4 The maximum spec limit for this parameter is equivalent to ICC(max) + 3 mA 2 Page 2 of 15 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES MAGNETIC CHARACTERISTICS over operating voltage and junction temperature range using reference target (Unless otherwise noted) Limits Characteristics Number of Programming Bits Test Conditions Min. Typ. Max. Units Switch Point – 7 – Bit Switch Point Polarity – 1 – Bit Programming Lock – 1 – Bit Symbol - Gear Tooth Sensor / Proximity Sensing Characteristics (Low Switchpoint Only) 1 Programming Air Gap Range Programming Resolution 2 Air Gap Drift Over Full Temperature Range Polarity AGRange AGRes AGDrift P Temp: 25°C Code –127 2.5 – – mm Temp: 25°C Code +127 – – 1.5 mm – 0.05 – mm – 0.2 – mm Over Tooth (ATS635LSE) – HIGH – – Over Valley (ATS635LSE) – LOW – – Over Tooth (ATS636LSE) – LOW – – Over Valley (ATS636LSE) – HIGH – – Temperature: 25°C Program Air Gap = 2.5 mm Device Programmed to 2.5 mm Tooth and Valley Field vs. Air Gap Reference Target Reference Target Flux Density vs. Position 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50 5.75 6.00 Flux Density (Gauss) 1200 1000 800 600 400 200 0 0 30 60 90 120 150 180 210 240 270 300 330 360 Position (º) Reference Target Flux Density vs. Position: Typical 1400 Reference Target Tooth Reference Target Valley 1200 Flux Density [Gauss] 1400 1000 800 600 400 200 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Air Gap [mm] Reference Target Tooth and Valley Field vs. Air Gap 1 The switch point will vary over temperature. A sufficient margin obtained through customer testing is required to guarantee functionality over temperature. Programming at larger air gaps leaves no safety margin for switchpoint drift. See the applications note: “Proximity Sensing Programming Technique” http://www.allegromicro.com/techpub2/proximity_sensing/ or visit the Allegro website at http://www.allegromicro.com for additional information. 2 The switch point will vary over temperature, proportionally to the programmed air gap. This parameter is based on characterization data and is not a tested parameter in production. Switch point air gap generally drifts downward as temperature increases. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES REFERENCE TARGET DIMENSIONS Target Outside Diameter (Do ) Face Width (F) Circular Tooth Length (T) Circular Valley Length (P C – T) Tooth Whole Depth (ht) Reference Target 120mm 6mm 23.5mm 23.5mm 5mm Reference Target Reference Target GEAR PARAMETERS FOR CORRECT OPERATION Characteristic Tooth Whole Depth (ht ) Circular Valley Length (P C – T) Circular Tooth Length (T) Face Width (F) Description Depth of Target Valley Length of Target Valley Length of Target Tooth Thickness or Width of Target Tooth Min. 5 13 5 5 Limits Typ. Max. – – – – – – – – Units mm mm mm mm MATERIAL: CRS 1018 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES ELECTROMAGNETC CAPABILITY (EMC) PERFORMANCE Please contact Allegro MicroSystems for EMC performance Test Name Reference Specification ESD – Human Body Model ESD – Machine Model Conducted Transients Direct RF Injection Bulk Current Injection TEM Cell AEC-Q100-002 AEC-Q100-003 ISO 7637-1 ISO 11452-7 ISO 11452-4 ISO 11452-3 FUNCTIONAL BLOCK DIAGRAM VCC Program / Lock Reg Programmming Logic To all subcircuits Offset Adjust OUT AMP S/H LPF Current Limit Clock/Logic GND 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES FUNCTIONAL DESCRIPTION Chopper-Stabilized Technique. The basic Hall sensor is a small sheet of semiconductor material in which a constant bias current will flow when a constant voltage source is applied. The output will take the form of a voltage measured across the width of the sheet and will have negligible value in the absence of a magnetic field. When a magnetic field with flux lines at right angles to the Hall current is applied, a small signal voltage directly proportional to the strength of the magnetic field will occur at the output terminals. This signal voltage is proportionally small relative to the offset produced at the input of the chip. This makes it very difficult to process the signal and maintain an accurate, reliable output over the specified temperature and voltage range. Therefore, it is important to reduce any offset on the signal that could be amplified when the signal is processed. Chopper Stabilization is a unique approach used to minimize input offset on the chip. This technique removes a key source of output drift with temperature and stress, and produces a 3X reduction in offset over other conventional methods. This offset reduction Chopping Technique is based on a signal modulation-demodulation process. The undesired offset signal is separated from the magnetically induced signal in the frequency domain. The offset (and any low frequency noise) component of the signal can be seen as signal corruption added after the signal modulation process has taken place. Therefore, the DC offset is not modulated and remains a low frequency component. Consequently, the signal demodulation process acts as a modulation process for the offset causing the magnetically induced signal to recover its original spectrum at baseband while the DC offset becomes a high frequency signal. Then, using a low pass filter the signal passes while the modulated DC offset is suppressed. The advantage of this approach is significant offset reduction, which de-sensitizes the chip against the effects of temperature and stress. The disadvantage is that this technique features a demodulator that uses a sample and hold block to store and recover the signal. This sampling process can slightly degrade the Signalto-Noise Ratio (SNR) by producing replicas of the noise spectrum at the baseband. The degradation is a function of the ratio between the white noise spectrum and the sampling frequency. The effect of the degradation of the SNR is higher jitter, a.k.a. signal repeatability. In comparison to a continuous time device, the jitter spec can be increased by a factor of five. Regulator Amplifier Sample/ Hold CLOCK Hall Element Figure 1 – Concept of Chopper-Stabilization Algorithm 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES FUNCTION DESCRIPTION: ADDRESSING / PROGRAMMING PROTOCOL The ATS635LSE and ATS636LSE magnetic operate point (B OP) is programmed by serially addressing the devices through the supply terminal (1). After the correct operate point is determined, the device programming bits are selected and blown, then a lock bit is selected and blown to prevent any further (accidental) programming. Addressing: Bop is programmable in both the positive and negative direction from its initial value. Addressing is used to determine the desired code, while programming is used to lock the code. A unique key is needed to blow fuses, while addressing as described below does not allow for the device to be programmed accidentally. V PH VPL t d(1) Code N (Up to 127) Code N-1 Code N-2 Code 3 VPP Code 2 Code 1 Addressing with positive polarity. The magnetic operate point (B OP) is adjustable using 7 bits or 128 addresses. The Addresses are sequentially selected (Figure 2) until the required operate point is reached. The first address must be selected with a High voltage pulse (V PP), while the remaining pulses should be VPH Pulses. Note that the difference between BOP and the magnetic release point (B RP), the Hysteresis (B HYS), is fixed for all addresses. td(0) 0 Figure 2 – Addressing Pulses: Positive Polarity VPL td(1) Code -N (Up to -127) VPH Code -(N-1) Code -(N-2) Code -3 VPP Code -2 Code -1 Polarity Key Addressing with negative polarity. The magnetic operate point (B OP) is adjustable with negative polarity using 7 bits or 128 addresses. To invert the polarity it is necessary to first apply a keying sequence (Figure 3). Th e polarity key contains a VPP pulse and at least 1 VPH pulse, but no more than 6 VPH pulses; the key in Figure 3 shows 2 VPH pulses. The addresses are then sequentially selected until the required operate point is reached. The first address must be selected with a High voltage pulse (V PP), while the remaining pulses should be VPH Pulses. td(0) 0 Figure 3 – Addressing Pulses: Negative Polarity Page 7 of 15 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES Program Enable. To program the device, a keying sequence is used to activate / enable the programming mode as shown in Figure 4. This program key sequence consisting of a VPP pulse, at least seven VPH pulses, and a VPP pulse with no supply interruptions. The sequence is designed to prevent the device from being programmed accidentally (e.g., as a result of noise on the supply line). VPP PROGRAM ENABLE 7 or More Pulses (8 Pulses Shown) V PH VPL td(1) td(1) td(0) 0 Figure 4 – Program Enable Pulse Sequence VPH VPL 0 td(1) td(1) td(0) Program Enable tdP Bit 1 Program Bit 3 Address 000100 Code 4 Program Enable Bit 1 Address VPP Bit 3 Program Code Programming. After the desired switch point code is selected (0 through 127), each bit of the corresponding binary address should be programmed individually, not at the same time. For example, to program code 5 (binary 000101), bits 1 and 3 need to be programmed. A bit is programmed by addressing the code and then applying a VPP pulse, the programming is not reversible. An appropriate sequence for blowing code 5 is shown in Figure 5. 000001 Code 1 Figure 5 – Code Programming Example Polarity Bit Program Polarity Key Polarity Bit Programming. If the desired switchpoint has negative polarity, the polarity bit must be programmed. To do this it is necessary to first apply the polarity key sequence before the program key sequence (Figure 6). Finally a VPP pulse of duration tdP must be applied to program this bit, the programming is not reversible. The polarity bit is for adjusting programming range only and will not affect the output polarity. The proper output polarity device is determined by ordering the correct part number (ATS635 or ATS636), as they are different ICs. VPP Program Enable VPH VPL 0 td(1) td(1) td(0) tdP Figure 6 – Polarity Bit Programming Page 8 of 15 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES VP P Lock Bit Program Lock-Bit Programming. After the desired code is programmed, the lock bit (code 128), can be programmed (figure 7) to prevent further programming of the device. Again; programming is not reversible. Lock Bit Address 128 Pulses Program Enable V PH VP L 0 t d(1) t d(1) t d(0) tdP Figure 7 – Lock -Bit Programming Pulse Sequence See Allegro website at http://www.allegromicro.com for extensive information on device programming as well as programming products. Programming hardware is available for purchase and programming software is available for free. Valid over operating temperature range unless otherwise noted. Part Number Characteristics Symbol Limits Test Conditions Min. Typ. Max. Units 4.5 5 5.5 V VPH 8.5 – 15 V VPP 25 – 27 V PROGRAMMING PROTOCOL (T A = +25°C) VPL 5,6 Programming Voltage ATS635 / ATS636 Programming Current Pulsewidth Minimum voltage range during programming IPP Maximum supply current during programming – 500 – mA td(0) OFF time between bits 20 – – µs td(1) Enable, address, program, or lock bit ON time 20 – – µs tdP Program pulse ON time 100 300 – µs Pulse Rise Time tr VPL to VPH or VPP – – 11 µs Pulse Fall Time tf VPH or VPP to VPL – – 5 µs 5 Programming Voltages are measured at Pin 1 (VCC) of SIP. A minimum capacitance of 0.1 µF must be connected from VCC to GND of the SIP to provide the current necessary to blow the fuse. 6 Testing is the only method that guarantees successful programming. Page 9 of 15 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES FUNCTIONAL DESCRIPTION (CONT.): TYPICAL APPLICATION CIRCUIT Applications. It is strongly recommended that an external ceramic bypass capacitor in the range of 0.01 µF to 0.1 µF be connected between the supply and ground of the device to reduce both external noise and noise generated by the chopper-stabilization technique. (The diagram below shows a 0.1 µF bypass capacitor.) The series resistor RS in combination with the bypass capacitor creates a filter for EMC pulses. The series resistor will have a drop of approximately 800 mV, this must be considered for the minimum VCC requirement of the ATS635LSE / ATS636LSE. The small capacitor on the output of the device improves the EMC performance of the device. The pull-up resistor should be chosen to limit the current through the output transistor; do not exceed the maximum continuous output current of the device. Note: This circuit cannot be used to program the device, as the series resistance is too large, and a minimum capacitance of 0.1 µF must be connected from VCC to GND of the SIP to provide the current necessary to blow the fuse. Typical Application: RS 100 Ohm 5V 1 VCC RL 1.2k Ohm ATS635/636 VSupply 2 VOUT 0.1 µF 120 pF GND 4 Extensive applications information on magnets and Hall-effect sensors including Chopper-Stabilization is available in the Allegro Electronic Data Book CD, or at the website: http://www.allegromicro.com . 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES CHARACTERISTIC DATA Data taken from 3 lots, 30 pieces/lot Reference Target 8x I CC OFF 6 5 5 4 4 ICC (mA) 6 3 4V 15V 24V 2 3 4V 15V 24V 2 1 1 0 -50 -25 0 25 50 75 100 125 150 0 -50 175 -25 0 25 TEMPERATURE (°C) 50 75 100 125 150 TEMPERATURE (°C) V SAT 500 400 VSAT (mV) I CC (mA) ICC ON 300 200 20mA 100 0 -50 -25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) Page 11 of 15 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. 175 ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES CHARACTERISTIC DATA (continued) Data taken from 3 lots, 30 pieces/lot Reference Target 8x B OP/BRP vs. Program Code 7 6 AIR GAP (mm) 5 Code -8 BOP Code -8 BRP Code Code 4 0 0 BOP BRP Code +32 BOP Code +32 BRP 3 Code +127 BOP Code +127 BRP 2 1 0 -50 0 50 100 150 200 TEMPERATURE (°C) Notes: s Air gaps for Code 127 @ 150°C are interpolated due to test limitations at minimum air gap. s These graphs are intended to provide an understanding of how the program codes affect the switch points. In a production environment, individual devices would be programmed to individual codes to ensure all devices switch at the same air gap. Page 12 of 15 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES POWER DE-RATING – SE Package Power Dissipation versus Ambient Temperature Power De -Rating Due to internal power consumption, the temperature of the IC (junction temperature, TJ ) is higher than the ambient environment temperature, TA . To ensure that the device does not operate above the maximum rated junction temperature use the following calculations: ∴ ∆T = VCC × ICC × RθJA Where ∆T denotes the temperature rise resulting from the IC’s power dissipation: TJ = TA + ∆T RθJA = 77°C/W T J(max) = 165°C Typical T J Calculation: TA = 25°C, VCC = 5 V, ICC(on) = 5.5 mA PD = VCC × ICC PD = 5 V × 5.5 mA = 27.5 mW ∆T = PD × RθJA = 27.5 mW × 77°C/W = 2.0° TJ = TA + ∆T = 25°C + 2.0°C = 27.0°C 4000 3500 Power Dissipation, PD (m W) ∆T=PD × RθJA Where PD = VCC × ICC 4500 3000 2-layer PCB (RθJA = 77 ºC/W) 2500 2000 1500 1000 500 0 20 40 60 80 100 120 Temperature (°C) 140 160 Maximum Allowable Power Dissipation Calculation TJ = TA + ∆T TJ(max) = 165°C, if TA = 150°C then: 165 = 150 + ∆T ∆T = 15°C DT = PD × RθJA (RθJA = 77°C/W) \ P D(max) = 15°C / 77°C/W = 1 95 mW @ TA = 150°C Maximum V CC for P D(max) =111 mW at T A =150°C PD = VCC × ICC ICC = 10mA (max) at 150°C VCC = PD / ICC = 195 mW / 5.5 mA = 35.4 V Page 13 of 15 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. 180 ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES SE PACKAGE DIMENSIONS Reference Dimensions Only 7 .276 10 C .394 B 3.3 .130 E 6.2 .244 4.9 .193 1.3 0.38 .015 A .051 1.08 .043 20.95 .825 11.6 .457 1 2 3 4 A D 0.6 .240 1.27 .050 2 .079 Preliminary dimensions, for reference only Untoleranced dimensions are nominal. Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only Dimensions exclusive of mold flash, burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown Page 14 of 15 A Dambar removal protrusion (16X) B Metallic protrusion, electrically connected to pin 4 and substrate (both sides) C Active Area Depth, 0.43 mm [.017] D Thermoplastic Molded Lead Bar for alignment during shipment E Hall element (not to scale) 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc. ATS635LSE and ATS636LSE PROGRAMMABLE TRUE POWER-ON HALL-EFFECT GEAR-TOOTH SWITCHES The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,719,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support applications, devices, or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use. Page 15 of 15 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2005 Allegro MicroSystems, Inc.