ALSC ASM3P2853AF-08-SR

December 2004
ASM3P2853A
rev 0.7
Peak EMI Reducing Solution
Features
shielding that are required to pass EMI regulations. The
Generates an EMI optimized clock signal at
ASM3P2853A modulates the output of PLL in order to
output.
spread the bandwidth of a synthesized clock, thereby
Input frequency: 25 MHz.
decreasing the peak amplitudes of its harmonics. This
Frequency outputs:
results in significantly lower system EMI compared to the
o
USB Clock (48 MHz unmodulated)
typical narrow band signal produced by oscillators and
o
50 MHz (modulated), ±1% centre spread
most clock generators. Lowering EMI by increasing a
Modulation rate: 39 KHz.
signal’s bandwidth is called spread spectrum clock
Spread Spectrum ON/OFF control
generation.
Supply voltage range 2.5V ± 5%.
Available in 8-pin SOIC package.
Applications
Commercial Temperature range.
ASM3P2853A is targeted towards EMI management for
Product Description
high speed digital applications such as PC peripheral
The ASM3P2853A is a versatile spread spectrum
devices, consumer electronics and embedded controller
frequency
systems.
modulator.
The
ASM3P2853A
reduces
electromagnetic interference (EMI) at the clock source.
The ASM3P2853A allows significant system cost savings
by reducing the number of circuit board layers and
Block Diagram
VDD
XIN
XOUT
Crystal
Oscillator
SSONB
PWDNB
PLL1
USB Clock
(48 MHz
Unmodulated)
PLL2
50 MHz
Modulated
VSS
Alliance Semiconductor
2575 Augustine Drive • Santa Clara CA • Tel: 408-855-4900 • Fax: 408-855-4999 • www.alsc.com
ASM3P2853A
December 2004
rev 0.7
Pin Configuration
8
50 MHz
7
USB Clock
3
6
SSONB
4
5
PWDNB
XIN
1
XOUT
2
VDD
VSS
ASM3P2853A
Pin Description
Pin Name
Type
XIN
I
Description
Connection to crystal or external reference frequency input. This pin has dual
functions. It can be connected either to an external crystal or an external
reference clock.
Connection to crystal. If using an external reference clock, this pin must be left
XOUT
O
VDD
P
Power supply for the analog and digital blocks
VSS
P
Ground to entire chip.
PWDNB
I
SSONB
I
USB Clock
O
Clock output -1 (48 MHz unmodulated)
50 MHz
O
Clock output -2 (50 MHz modulated)
unconnected.
Power-down control pin. Pull low to enable the power-down mode. Connect to
VDD, if not used.
Digital logic input used to enable spread spectrum function (Active LOW).
Spread spectrum is enabled when LOW, disabled when HIGH.
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ASM3P2853A
December 2004
rev 0.7
Absolute Maximum Ratings
Symbol
VDD
Parameter
Rating
Supply voltage, DC
Unit
(VSS – 0.5) to 7
V
VI
Input voltage, DC
(VSS-0.5) to (VDD+0.5)
V
VO
Output voltage, DC
(VSS-0.5) to (VDD + 0.5)
V
IIK
Input clamp current (VI<0 or VI>VDD)
-50 to +50
mA
IOK
Output clamp current (VI<0 or VI>VDD)
-50 to +50
mA
TJ
Junction temperature
150
°C
Lead temperature (soldering 10 sec)
260
°C
2
kV
Input static discharge voltage protection
(MIL –STD 883E, Method 3015.7)
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for extended periods may affect device
reliability.
Operating Conditions
Parameter
Symbol
Supply Voltage
VDD
Ambient Operating
TA
Condition / Description
2.5V ± 5%
Min
Typ
Max
Unit
2.375
2.5
2.625
V
0
-
+70
°C
Temperature Range
Crystal Resonator Frequency
Output Driver Load
FXIN
25
CL
-
-
MHz
15
pF
Capacitance
Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
25 MHz
Frequency tolerance
± 50 ppm or better at 25°C
Operating temperature range
-25°C to +85°C
Storage temperature
-40°C to +85°C
Load capacitance
18pF
Shunt capacitance
7pF maximum
ESR
25
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ASM3P2853A
December 2004
rev 0.7
DC Electrical Characteristics
Parameter
Symbol
Conditions / Description
Min
Typ
Max
Unit
IDD
VDD=2.5V, FXIN=25MHz, CL=15pF
15
20
25
mA
-
1.5
-
mA
Overall
Supply Current,
Dynamic
Supply Current,
Static
IDDL
VDD = 2.5V, XIN = 0, PWDNB =0
All input pins
High-Level Input
Voltage
Low-Level Input
Voltage
High-Level Input
Current
Low-Level Input
Current (pull-up)
VIH
VDD=2.5V
1.7
-
-
V
VIL
VDD=2.5V
-
-
0.7
V
IIH
-
-
25
µA
IIL
-
-
-25
µA
Clock Outputs
High-Level Output
Source Current
Low-Level Output
Sink Current
High-Level Output
Source Current
Low-Level Output
Sink Current
Output Impedance
IxOH
VDD= 2.5V ,V(XIN) = 0, VO=2V
-10
-12
-15
mA
IxOL
VDD= V(XIN) =2.5V, VO=0.4V
10
12
15
mA
IOH
VO=2V
-
8
-
mA
IOL
VO=0.4V
-
8
-
mA
-
42
-
ZO
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ASM3P2853A
December 2004
rev 0.7
AC Electrical Characteristics
Parameter
Symbol
Conditions/ Description
Min
Typ
Max
Unit
-
2
-
nS
-
1.2
-
nS
tjc
-
-
200
pS
tp
-
175
-
pS
45
50
55
%
Measured from 20% to 80% of the signal
Rise Time*
tr
level
Measured from 80% to 20% of the signal
Fall Time*
tf
level
Jitter
(Cycle to
Cycle)
Jitter
(Period)
Clock Duty
Cycle
Ratio of pulse width (as measured from
td
rising edge to next falling edge at VDD/2) to
one clock period
* CL = 15 pF, Input clock frequency = 25 MHz
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ASM3P2853A
December 2004
rev 0.7
Package Information
8-Pin SOIC package
H
E
D
A2
A
A1
D
C
e
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A1
0.004
0.010
0.10
0.25
A
0.053
0.069
1.35
1.75
A2
0.049
0.059
1.25
1.50
B
0.012
0.020
0.31
0.51
C
0.007
0.010
0.18
0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L
0.016
0.050
0.41
1.27
O
0°
8°
0°
8°
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ASM3P2853A
December 2004
rev 0.7
Ordering Codes
Part number
Package Configuration
Temperature Range
ASM3P2853AF-08-ST
8-pin SOIC ,TUBE
Commercial
ASM3P2853AF-08-SR
8-pin SOIC, TAPE & REEL
Commercial
Ordering Information
A S M 3 P 2 8 5 3 A F - 0 8 - S R
OR - SOT23/T/R
TT - TSSOP, TUBE
TR – TSSOP, T/R
QT – QFN, TUBE
BT – BGA, TUBE
BR – BGA, T/R
ST – SOIC, TUBE
SR – SOIC, T/R
QR – QFN, T/R
VT – TVSOP, TUBE
VR – TVSOP, T/R
JR – SSOP, T/R
JT – SSOP, TUBE
PIN COUNT
Pb FREE
PART NUMBER
X = Automotive
(-40C to +125C)
I = Industrial
(-40C to +85C)
1 – reserved
2 - Non PLL based
3 – EMI Reduction
4 – DDR support products
P or n/c = Commercial
(0C to +70C)
6 – power management
7 – power management
8 – power management
9 – Hi performance
Alliance Semiconductor Mixed Signal Product
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
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ASM3P2853A
December 2004
rev 0.7
Alliance Semiconductor Corporation
2575, Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Fax: 408-855-4999
www.alsc.com
Copyright © Alliance Semiconductor
All Rights Reserved
Preliminary Information
Part Number: ASM3P2853A
Document Version: v0.7
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their
respective companies. Alliance reserves the right to make changes to this document and its products at any time without
notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein
represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this
data at any time, without notice. If the product described herein is under development, significant changes to these
specifications are possible. The information in this product data sheet is intended to be general descriptive information for
potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or
customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product
described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products
including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual
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other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical
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assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
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