TI TPS715A01DRBT

TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
HIGH INPUT VOLTAGE, MICROPOWER SON PACKAGED, 80mA
LDO LINEAR REGULATORS
Check for Samples: TPS715Axx
FEATURES
DESCRIPTION
•
•
•
•
•
The TPS715Axx low-dropout (LDO) voltage
regulators offer the benefits of high input voltage,
low-dropout voltage, low-power operation, and
miniaturized packaging. The devices, which operate
over an input range of 2.5V to 24V, are stable with
any capacitor (≥ 0.47μF). The high maximum input
voltage combined with excellent power dissipation
capability makes this part particularly well-suited to
industrial and automotive applications.
1
2
•
•
•
•
24V Maximum Input Voltage
Low 3.2μA Quiescent Current at 80mA
Stable With Any Capacitor (> 0.47μF)
80mA Specified Current
Available in Fixed and Adjustable (1.2V to 15V)
Versions
Specified Current Limit
3mm × 3mm and 2mm x 2mm SON Packages
–40°C to +125°C Specified Junction
Temperature Range
For MSP430-Specific Output Voltages See the
TPS715xx
APPLICATIONS
•
•
•
•
•
The TPS715Axx is available in 3mm x 3mm package
ideal for high power dissipation and small 2mm x
2mm package ideal for handheld and ultra-portable
applications. The 3mm × 3mm package is also
available as a non-magnetic package for medical
imaging applications.
Ultralow Power Microcontrollers
Industrial/Automotive Applications
PDAs
Portable, Battery-Powered Equipment
Medical Imaging
IN
NC
GND
GND
DRV PACKAGE
2mm x 2mm SON
(TOP VIEW)
OUT
NC
FB/NC
A PMOS pass element behaves as a low-value
resistor. The low dropout voltage, typically 670mV at
80mA of load current, is directly proportional to the
load current. The low quiescent current (3.2μA
typically) is nearly constant over the entire range of
output load current (0mA to 80mA).
DRB PACKAGE
3mm x 3mm SON
(TOP VIEW)
IN
OUT
NC
NC
NC
NC
GND
IN
TPS715A33
OUT
GND
MSP430
Li+
FB/NC
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2011, Texas Instruments Incorporated
TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS (1)
PRODUCT
VOUT
XX is nominal output voltage (for example 33 = 3.3V, 01 = Adjustable)
YY is Package Designator
Z is Package Quantity
TPS715Axxyyz
(1)
(2)
(2)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
Custom output voltages from 1.25V to 5.4V in 50mV increments are available on a quick-turn basis for prototyping. Production quantities
are available; minimum package order quantities apply. Contact factory for details and availability.
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range, unless otherwise noted. (1)
TPS715Axx
UNIT
–0.3 to +24
VIN range
Peak output current
V
Internally limited
ESD rating, HBM
2
kV
ESD rating, CDM
500
V
Continuous total power dissipation
See Power Dissipation Rating table
Junction temperature range, TJ
–40 to +150
°C
Storage temperature range
–65 to +150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
POWER DISSIPATION RATING TABLE
BOARD
PACKAGE
RθJA°C/W
DERATING FACTOR
ABOVE TA = +25°C
TA ≤ 25°C POWER
RATING
High-K (1)
DRB
40
25.0mW/°C
2.50W
1.38W
1.00W
High-K (1)
DRV
65
15.4mW/°C
1.54W
0.85W
0.62W
(1)
2
TA = +70°C POWER TA = +85°C POWER
RATING
RATING
The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch × 3 inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
Copyright © 2004–2011, Texas Instruments Incorporated
TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
Over operating junction temperature range (TJ = –40°C to +125°C), VIN = VOUT(NOM) + 1V, IOUT = 1mA, COUT = 1μF, unless
otherwise noted. The TPS715A01 is tested with VOUT = 2.8V. Typical values are at TJ = +25°C.
TPS715Axx
PARAMETER
TEST CONDITIONS
Input voltage (1)
VIN
Voltage range
(TPS715A01)
VOUT
2.5
24
3
24
1.2
15
TPS715A33
4.3V < VIN < 24V, 0 ≤ IOUT ≤ 80mA
Output voltage
line regulation (1)
ΔVOUT/ΔVIN
Load regulation
Dropout voltage
VIN = VOUT(NOM) – 0.1V
Output current limit
0.96 ×
VOUT(nom)
VOUT(nom)
1.04 ×
VOUT(nom)
3.135
3.3
3.465
VOUT + 1V < VIN ≤ 24V
20
60
ΔVOUT/ΔIOUT
IOUT = 100μA to 80mA
35
VDO
IOUT = 80mA
ICL
VOUT = 0V
IGND
670
160
4.8
VIN
BW = 200Hz to 100kHz,
COUT = 10μF, IOUT = 50mA
mV
mA
3.2
Output noise voltage
V
1100
0mA ≤ IOUT ≤ 80mA
f = 100kHz, COUT = 10μF
V
mV
4.2
PSRR
V
1120
3.2
Power-supply ripple
rejection
UNIT
mV
TJ = –40°C to +85°C, 0mA ≤ IOUT ≤ 80mA
VIN = 24V, 0mA ≤ IOUT ≤ 80mA
(1)
MAX
IOUT = 80mA
VOUT + 1.0V ≤ VIN ≤ 24V,
1.2V ≤ VOUT ≤ 15V, 0 ≤ IOUT ≤ 80mA
Ground pin current
TYP
IOUT = 10mA
TPS715A01
Output voltage accuracy (1)
MIN
μA
5.8
60
dB
575
μVrms
Minimum VIN = VOUT + VDO, or the value shown for Input voltage, whichever is greater.
Copyright © 2004–2011, Texas Instruments Incorporated
3
TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION
V(OUT)
V(IN)
Current
Sense
ILIM
_
R1
+
GND
FB
R2
Vref = 1.205 V
Bandgap
Reference
FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION
V(OUT)
V(IN)
Current
Sense
ILIM
_
R1
+
GND
Vref = 1.205 V
Bandgap
Reference
R2
R2 = 840 kΩ
Table 1. Pin Descriptions
TPS715Axx
DRB
NAME
FIXED
FB
4
DRV
ADJ.
FIXED
5
ADJ.
4
DESCRIPTION
Adjustable version. This terminal is used to set the output voltage.
GND
4, Pad
4, Pad
3, Pad
3, Pad
NC
2, 3, 5, 6, 7
2, 3, 6, 7
2, 4, 5
2, 5
Ground
IN
1
1
1
1
Unregulated input voltage.
OUT
8
8
6
6
Regulated output voltage, any output capacitor ≥ 0.47μF can be used for stability.
No connection. May be left open or tied to Ground for improved thermal performance.
Copyright © 2004–2011, Texas Instruments Incorporated
TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
TYPICAL CHARACTERISTICS
TPS715A33
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.399
3.366
3.333
3.300
3.267
3.234
3.201
3.399
3.366
3.333
IOUT = 10 mA
3.300
3.267
3.234
IOUT = 80 mA
3.201
3.5
3.0
2.5
3.135
3.135
0
10
20
30
40
50
60
70
2.0
−40 −25 −10 5 20 35 50 65 80 95 110 125
80
−40 −25 −10 5
TJ - Junction Temperature - ° C
I OUT - Output Current - mA
Figure 2.
Figure 3.
OUTPUT SPECTRAL
NOISE DENSITY
vs
FREQUENCY
OUTPUT IMPEDANCE
vs
FREQUENCY
TPS715A33
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
1000
18
IOUT = 1 mA
6
IOUT = 50 mA
4
3
2
1
14
12
10
8
6
IOUT = 1 mA
4
2
10
100 k
TJ = +25_C
500
400
300
200
TJ = −40_C
100
1k
10k
100k
1M
0
10 M
10
20
30
40
50
60
Figure 5.
Figure 6.
TPS715A01
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
TPS715A33
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
CURRENT LIMIT
vs
VOUT
1000
TJ = +125_C
800
600
TJ = +25_C
400
TJ = −40_C
200
VDO - Dropout Voltage - mV
900
1200
700
IOUT = 80 mA
600
500
400
300
200
IOUT = 10 mA
100
0
0
5
6
7
8
9 10 11 12 13 14 15
VIN − Input Voltage − V
Figure 7.
Copyright © 2004–2011, Texas Instruments Incorporated
80
3.5
VIN = 4.3 V
VIN = 4.3 V
VOUT = 3.3 V
3.0
800
70
I OUT − Output Current − mA
f − Frequency − Hz
1000
4
600
Figure 4.
1400
3
700
0
IOUT = 50 mA
0
1k
10 k
f − Frequency − Hz
TJ = +125_C
800
100
0
100
VIN = 4.3 V
900
VOUT − Output Voltage − V
5
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 µF
TJ = 25°C
16
VDO − Dropout Voltage − mV
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 µF
Zo − Output Impedance − Ω
7
20 35 50 65 80 95 110 125
TJ − Junction Temperature − °C
Figure 1.
8
Output Spectral Noise Density − µV/√Hz
VIN = 4.3 V
VOUT = 3.3 V
IOUT = 1 µF
4.0
3.168
3.168
VDO − Dropout Voltage − mV
4.5
VIN = 4.3 V
3.432
VDO - Dropout Voltage - mV
VOUT - Output Voltage - V
3.465
VIN = 4.3 V
3.432
QUIESCENT CURRENT
vs
JUNCTION TEMPERATURE
IGND − Ground Current − µ A
3.465
TPS715A33
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
−40 −25 −10 5 20 35 50 65 80 95 110 125
TJ - Junction Temperature - ° C
Figure 8.
2.5
2.0
1.5
1.0
0.5
0
0
100
200
300
400
500
IOUT − Current Limit − mA
Figure 9.
5
TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
LINE TRANSIENT RESPONSE
VIN = 4.3 V
VOUT = 3.3 V
COUT = 10 µF
TJ = 25°C
80
70
60
VOUT = 3.3 V
RL = 66 Ω
COUT = 10 µF
7
IOUT = 1 mA
50
40
30
20
IOUT = 50 mA
6
VIN − Input Voltage − V
90
5
3
VIN
2
VOUT
1
0
10
100
1k
10k
100k
1M
10 M
VOUT = 3.3 V
IOUT = 50 mA
COUT = 10 µF
100
50
0
−50
4
10
0
VIN − Input Voltage − V
VOUT − Output Voltage − mV
POWER-UP/POWER-DOWN
8
100
VOUT − Output Voltage − V
PSRR − Power Supply Ripple Rejection − dB
POWER-SUPPLY
RIPPLE REJECTION
vs
FREQUENCY
0
f − Frequency − Hz
Figure 10.
2
4
6
8 10 12 14
t − Time − ms
16 18
20
Figure 11.
5.3
4.3
0
50 100 150 200 250 300 350 400 450 500
t − Time − ms
Figure 12.
VOUT − Output Voltage − mV
IOUT − Output Current − mA
LOAD TRANSIENT RESPONSE
V IN = 4.3 V
200
V OUT = 3.3 V
COUT = 10 µF
0
−200
100
50
0
−0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
t − Time − ms
Figure 13.
6
Copyright © 2004–2011, Texas Instruments Incorporated
TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
APPLICATION INFORMATION
The TPS715Axx family of LDO regulators has been optimized for ultra low-power applications such as the
MSP430 microcontroller. Its ultralow supply current maximizes efficiency at light loads, and its high input voltage
range makes it suitable for supplies such as unconditioned solar panels.
VIN
IN
C1
0.1 µF
TPS715A33
OUT
GND
VOUT
0.47 µF
Figure 14. Typical Application Circuit (Fixed Voltage Version)
External Capacitor Requirements
Although not required, a 0.047μF or larger input bypass capacitor, connected between IN and GND and located
close to the device, is recommended to improve transient response and noise rejection of the power supply as a
whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and
if the device is located several inches from the power source.
The TPS715Axx requires an output capacitor connected between OUT and GND to stabilize the internal control
loop. Any capacitor (including ceramic and tantalum) that is ≥ 0.47μF properly stabilizes this loop.
Power Dissipation and Junction Temperature
To ensure reliable operation, worst-case junction temperature should not exceed +150°C. This restriction limits
the power dissipation the regulator can handle in any given application. To ensure the junction temperature is
within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD,
which must be less than or equal to PD(max).
The maximum-power-dissipation limit is determined using Equation 1:
T max * T A
P D(max) + J
R qJA
(1)
where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package (see the Power Dissipation Rating table).
TA is the ambient temperature.
The regulator dissipation is calculated using Equation 2:
P D + ǒVIN * VOUTǓ
I OUT
(2)
Power dissipation resulting from quiescent current is negligible.
Regulator Protection
The TPS715Axx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (for example, during power-down). Current is conducted from the output
to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting
might be appropriate.
The TPS715Axx features internal current limiting. During normal operation, the TPS715Axx limits output current
to approximately 500mA. When current limiting engages, the output voltage scales back linearly until the
overcurrent condition ends. Take care not to exceed the power dissipation ratings of the package.
Copyright © 2004–2011, Texas Instruments Incorporated
7
TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
Programming the TPS715A01 Adjustable LDO Regulator
The output voltage of the TPS715A01 adjustable regulator is programmed using an external resistor divider as
shown in Figure 15. The output voltage is calculated using Equation 3:
V OUT + VREF
Ǔ
ǒ1 ) R1
R2
(3)
where:
VREF = 1.205V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 1.5μA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially
increases/decreases the feedback voltage and thus erroneously decreases/increases VO. The recommended
design procedure is to choose R2 = 1MΩ to set the divider current at 1.5μA, and then calculate R1 using
Equation 4:
V OUT
R1 +
*1
R2
V REF
ǒ
Ǔ
(4)
TPS715A01
VIN
OUTPUT VOLTAGE
PROGRAMMING GUIDE
IN
0.1 µF
OUT
VOUT
R1
FB
GND
0.47 µF
OUTPUT
VOLTAGE
R1
R2
1.8 V
392 MΩ
806 kΩ
2.8 V
1.07 MΩ
806 kΩ
5.0 V
2.55 MΩ
806 kΩ
R2
Figure 15. TPS715A01 Adjustable LDO Regulator Programming
8
Copyright © 2004–2011, Texas Instruments Incorporated
TPS715Axx
SBVS047E – MAY 2004 – REVISED JUNE 2011
www.ti.com
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (May, 2007) to Revision E
Page
•
Added last Applications bullet ............................................................................................................................................... 1
•
Added last sentence to Description section .......................................................................................................................... 1
Copyright © 2004–2011, Texas Instruments Incorporated
9
PACKAGE OPTION ADDENDUM
www.ti.com
27-Jan-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
(Requires Login)
TPS715A01DRBR
ACTIVE
SON
DRB
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A01DRBRG4
ACTIVE
SON
DRB
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A01DRBT
ACTIVE
SON
DRB
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A01DRBT-NM
ACTIVE
SON
DRB
8
250
Green (RoHS
& no Sb/Br)
TPS715A01DRBTG4
ACTIVE
SON
DRB
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A01DRVR
PREVIEW
SON
DRV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A01DRVT
PREVIEW
SON
DRV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A30DRVR
ACTIVE
SON
DRV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A30DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A33DRBR
ACTIVE
SON
DRB
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A33DRBRG4
ACTIVE
SON
DRB
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A33DRBT
ACTIVE
SON
DRB
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A33DRBTG4
ACTIVE
SON
DRB
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A33DRVR
ACTIVE
SON
DRV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A33DRVRG4
ACTIVE
SON
DRV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A33DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS715A33DRVTG4
ACTIVE
SON
DRV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Addendum-Page 1
CU SN
Samples
Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com
27-Jan-2012
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPS715A01DRBR
SON
DRB
8
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS715A01DRBT
SON
DRB
8
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS715A01DRBT-NM
SON
DRB
8
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS715A30DRVR
SON
DRV
6
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS715A30DRVT
SON
DRV
6
250
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS715A33DRBR
SON
DRB
8
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS715A33DRBT
SON
DRB
8
250
180.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
TPS715A33DRVR
SON
DRV
6
3000
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
TPS715A33DRVT
SON
DRV
6
250
179.0
8.4
2.2
2.2
1.2
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Jan-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS715A01DRBR
SON
DRB
8
3000
346.0
346.0
29.0
TPS715A01DRBT
SON
DRB
8
250
210.0
185.0
35.0
TPS715A01DRBT-NM
SON
DRB
8
250
210.0
185.0
35.0
TPS715A30DRVR
SON
DRV
6
3000
195.0
200.0
45.0
TPS715A30DRVT
SON
DRV
6
250
195.0
200.0
45.0
TPS715A33DRBR
SON
DRB
8
3000
346.0
346.0
29.0
TPS715A33DRBT
SON
DRB
8
250
210.0
185.0
35.0
TPS715A33DRVR
SON
DRV
6
3000
195.0
200.0
45.0
TPS715A33DRVT
SON
DRV
6
250
195.0
200.0
45.0
Pack Materials-Page 2
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