OPA860 SBOS331 – JUNE 2005 Wide Bandwidth OPERATIONAL TRANSCONDUCTANCE AMPLIFIER (OTA) and BUFFER OTA FEATURES DESCRIPTION • • • • The OPA860 is a versatile monolithic component designed for wide-bandwidth systems, including high performance video, RF and IF circuitry. It includes a wideband, bipolar operational transconductance amplifier (OTA), and voltage buffer amplifier. Wide Bandwidth (80MHz, Open-Loop, G = +5) High Slew Rate (900V/µs) High Transconductance (95mA/V) External IQ-Control BUFFER FEATURES • • • • Closed-Loop Buffer Wide Bandwidth (1600MHz, VO = 1VPP) High Slew Rate (4000V/µs) 60mA Output Current OPA860 FEATURES • • Low Quiescent Current (11.2mA) Versatile Circuit Function APPLICATIONS • • • • • • • • • Baseline Restore Circuits Video/Broadcast Equipment Communications Equipment High-Speed Data Acquisition Wideband LED Driver AGC-Multiplier ns-Pulse Integrator Control Loop Amplifier OPA660 Upgrade The OTA or voltage-controlled current source can be viewed as an ideal transistor. Like a transistor, it has three terminals—a high impedance input (base), a low-impedance input/output (emitter), and the current output (collector). The OTA, however, is self-biased and bipolar. The output collector current is zero for a zero base-emitter voltage. AC inputs centered about zero produce an output current, which is bipolar and centered about zero. The transconductance of the OTA can be adjusted with an external resistor, allowing bandwidth, quiescent current, and gain trade-offs to be optimized. Also included in the OPA860 is an uncommited closed-loop, unity-gain buffer. This provides 1600MHz bandwidth and 4000V/µs slew rate. Used as a basic building block, the OPA860 simplifies the design of AGC amplifiers, LED driver circuits for fiber optic transmission, integrators for fast pulses, fast control loop amplifiers and control amplifiers for capacitive sensors and active filters. The OPA860 is available in an SO-8 surface-mount package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2005, Texas Instruments Incorporated OPA860 www.ti.com SBOS331 – JUNE 2005 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) (1) PRODUCT PACKAGE PACKAGE DESIGNATOR OPA860 SO-8 D SPECIFIED TEMPERATURE RANGE PACKAGE MARKING –45°C to +85°C OPA860 ORDERING NUMBER TRANSPORT MEDIA, QUANTITY OPA860ID Rails, 75 OPA860IDR Tape and Reel, 2500 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) ±6.5VDC Power Supply Internal Power Dissipation See Thermal Information ±1.2V Differential Input Voltage ±VS Input Common-Mode Voltage Range Storage Temperature Range: D –40°C to +125°C Lead Temperature (soldering, 10s) +300°C Junction Temperature (TJ) +150°C ESD Rating: (1) (2) Human Body Model (HBM) (2) 1500V Charge Device Model (CDM) 1000V Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress Ratings only, and functional operations of the device at these and any other conditions beyond those specified is not supported. Pin 2 > 500V HBM. PIN CONFIGURATION Top View 2 SO IQ Adjust 1 8 C E 2 7 V+ = +5V B 3 6 Out V− = −5V 4 5 In +1 OPA860 www.ti.com SBOS331 – JUNE 2005 ELECTRICAL CHARACTERISTICS: VS = ±5V RL = 500Ω and RADJ = 250Ω, unless otherwise noted. OPA860ID TYP PARAMETER MIN/MAX OVER TEMPERATURE +25°C +25°C (2) 0°C to 70°C (3) –40°C to +85°C (3) UNITS MIN/ MAX VO = 200mVPP 470 380 375 370 MHz min B VO = 1VPP 470 MHz typ C CONDITIONS TEST LEVEL (1) Closed Loop OTA + BUFFER (see Figure 53) AC PERFORMANCE Bandwidth G = +2, See Figure 53 VO = 5VPP 350 MHz typ C Bandwidth for 0.1dB Gain Flatness VO = 200mVPP 42 MHz typ C Slew Rate VO = 5V Step 3500 V/µs typ C Rise Time and Fall Time VO = 1V Step 0.7 ns typ C RL = 100Ω –54 dBc typ C RL = 500Ω –77 dBc typ C RL = 100Ω –66 dBc typ C RL = 500Ω –79 dBc typ C G = +5, VO = 200mVPP, RL = 500Ω 80 MHz min B G = +5, VO = 1VPP 80 MHz typ C G = +5, VO = 5VPP 80 MHz typ C G = +5, VO = 5V Step 900 V/µs min B VO = 1V Step 4.4 ns typ C Harmonic Distortion 2nd-Harmonic 3rd-Harmonic 3000 2800 2700 G = +2, VO = 2VPP, 5MHz OTA - Open-Loop (see Figure 48) AC PERFORMANCE Bandwidth Slew Rate Rise Time and Fall Time Harmonic Distortion 77 860 75 850 74 840 G = +5, VO = 2VPP, 5MHz 2nd-Harmonic RL = 500Ω –68 –55 –54 –53 dB max B 3rd-Harmonic RL = 500Ω –57 –52 –51 –49 dB max B Base Input Voltage Noise f > 100kHz 2.4 3.0 3.3 3.4 nV/√Hz max B Base Input Current Noise f > 100kHz 1.65 2.4 2.45 2.5 pA/√Hz max B Emitter Input Current Noise f > 100kHz 5.2 15.3 16.6 17.5 pA/√Hz max B Min OTA Transconductance VO = ±10mV, RC = 0Ω, RE = 0Ω 95 80 77 75 mA/V min A Max OTA Transconductance VO = ±10mV, RC = 0Ω, RE = 0Ω 95 150 155 160 mA/V min A VB = 0V, RC = 0Ω, RE = 100Ω ±3 ±12 ±15 ±20 mV max A VB = 0V, RC = 0Ω, RE = 100Ω ±3 ±67 ±120 µV/°C max B VB = 0V, RC = 0Ω, RE = 100Ω ±1 ±6 ±6.6 µA max A ±20 ±25 nA/°C max B ±125 ±140 µA max A ±500 ±600 nA/°C max B ±30 ±38 µA max A ±250 ±300 nA/°C max B ±3.6 ±3.6 V min B kΩ || pF typ C OTA DC PERFORMANCE (4) (see Figure 48) B-Input Offset Voltage Average B-Input Offset Voltage Drift B-Input Bias Current Average B-Input Bias Current Drift E-Input Bias Current Average E-Input Bias Current Drift C-Output Bias Current Average C-Output Bias Current Drift ±5 VB = 0V, RC = 0Ω, RE = 100Ω VB = 0V, VC = 0V ±30 ±100 VB = 0V, VC = 0V VB = 0V, VC = 0V ±5 ±18 VB = 0V, VC = 0V OTA INPUT (see Figure 48) B-Input Voltage Range B-Input Impedance ±4.2 ±3.7 455 || 2.1 Min E-Input Input Resistance 10.5 12.5 13.0 13.3 Ω min B Max E-Input Input Resistance 10.5 6.7 6.5 6.3 Ω max B (1) (2) (3) (4) Test levels: (A) 100% tested at 25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value only for information. Junction temperature = ambient for 25°C specifications. Junction temperature = ambient at low temperature limit; junction temperature = ambient + 8°C at high temperature limit for over temperature specifications. Current is considered positive out of node. VCM is the input common-mode voltage. 3 OPA860 www.ti.com SBOS331 – JUNE 2005 ELECTRICAL CHARACTERISTICS: VS = ±5V (continued) RL = 500Ω and RADJ = 250Ω, unless otherwise noted. OPA860ID TYP PARAMETER MIN/MAX OVER TEMPERATURE CONDITIONS +25°C +25°C (2) 0°C to 70°C (3) –40°C to +85°C (3) UNITS MIN/ MAX TEST LEVEL (1) IE = ±1mA ±4.2 ±3.7 ±3.6 VE = 0 ±15 ±10 ±9 ±3.6 V min A ±9 mA min IC = ±1mA ±4.7 ±4.0 A ±3.9 ±3.9 V min VC = 0 ±15 ±10 A ±9 ±9 mA min A kΩ || pF typ C MHz min B MHz typ C MHz typ C V/µs min B OTA OUTPUT E-Output Voltage Compliance E-Output Current, Sinking/Sourcing C-Output Voltage Compliance C-Output Current, Sinking/Sourcing C-Output Impedance 54 || 2 BUFFER (see Figure Figure 45) AC PERFORMANCE Bandwidth VO = 200mVPP 1200 VO = 1VPP 1600 750 720 700 VO = 5VPP 1000 Slew Rate VO = 5V Step 4000 Rise Time and Fall Time VO = 1V Step 0.4 ns typ C VO = 1V Step 6 ns typ C Settling Time to 0.05% Harmonic Distortion 2nd-Harmonic 3500 3200 3000 VO = 2VPP, 5MHz RL = 100Ω –52 –47 –46 –44 dBc max B RL≥ 500Ω –72 –65 –63 –61 dBc max B RL = 100Ω –67 –63 –63 –62 dBc max B RL≥ 500Ω –96 –86 –85 –83 dBc max B Input Voltage Noise f > 100kHz 4.8 5.1 5.6 6.0 nV/√Hz max B Input Current Noise f > 100kHz 2.1 2.6 2.7 2.8 pA/√Hz max B Differential Gain NTSC, PAL 0.06 % typ C Differential Phase NTSC, PAL 0.02 Degrees typ C RL = 500Ω 1 0.98 0.98 0.98 V/V min A RL = 500Ω 1 1 1 1 V/V max A ±16 ±30 ±36 ±38 mV max A ±125 ±125 µV/°C max B ±8 ±8.5 µA max A ±20 ±20 nA/°C max B MΩ || pF typ C A 3rd-Harmonic BUFFER DC PERFORMANCE Gain Input Offset Voltage Average Input Offset Voltage Drift ±3 Input Bias Current ±7 Average Input Bias Current Drift BUFFER INPUT Input Impedance 1.0 || 2.1 BUFFER OUTPUT Output Voltage Swing Output Current Closed-Loop Output Impedance RL = 500Ω ±4.0 ±3.8 ±3.8 ±3.8 V min VO = 0 ±60 ±50 ±49 ±48 mA min A f ≤ 100kHz 1.4 Ω typ C POWER SUPPLY (OTA + BUFFER) ±5 Specified Operating Voltage V typ C Maximum Operating Voltage ±6.5 ±6.5 ±6.5 V max A Minimum Operating Voltage ±2.5 ±2.5 ±2.5 V min B Maximum Quiescent Current RADJ = 250Ω 11.2 12 13.5 14.5 mA max A Minimum Quiescent Current RADJ = 250Ω 11.2 10.5 9.5 7.9 mA min A OTA Power-Supply Rejection Ratio (+PSRR) ∆IC/∆VS ±20 ±50 ±60 ±65 µA/V max A Buffer Power-Supply Rejection Ratio (–PSRR) ∆VO/∆VS 54 48 46 45 dB min A –40 to +85 °C typ C 125 °C/W typ C THERMAL CHARACTERISTICS Specification: ID Thermal Resistance θJA D 4 SO-8 Junction-to-Ambient OPA860 www.ti.com SBOS331 – JUNE 2005 TYPICAL CHARACTERISTICS: VS = ±5V At TA = +25°C, IQ = 11.2mA, and RL = 500Ω, unless otherwise noted. (See Figure 53.) OTA + BUF Performance SMALL-SIGNAL FREQUENCY RESPONSE 9 LARGE-SIGNAL FREQUENCY RESPONSE 9 G = +2V/V RL = 500Ω 6 6 3 0 Gain (dB) 3 Gain (dB) G = +2V/V RL = 500Ω VOUT = 0.5VPP −3 0 VOUT = 1VPP −3 VOUT = 0.2VPP VOUT = 2VPP −6 −6 −9 −9 VOUT = 5VPP 1M 10M 100M 1G 2G 1M 1G Figure 1. Figure 2. SMALL-SIGNAL FREQUENCY RESPONSE vs QUIESCENT CURRENT GAIN FLATNESS vs QUIESCENT CURRENT 2G 6.5 G = +2V/V R L = 500Ω VO = 0.2VPP 6.4 6 6.3 IQ = 12mA 6.2 Gain (dB) 3 Gain (dB) 100M Frequency (Hz) 9 0 IQ = 8mA −3 6.1 IQ = 11.2mA 6.0 5.9 IQ = 8mA 5.8 G = +2V/V RL = 500Ω VO = 0.2VPP −6 −9 IQ = 9mA 5.7 IQ = 11.2mA 5.6 I Q = 12mA IQ = 9mA 5.5 1M 10M 100M 1G 2G 1 Frequency (MHz) Figure 3. Figure 4. 100 1.0 Output Voltage (V) 1.5 50 0 −50 −150 G = +2V/V VIN = 0.125VPP fIN = 20MHz 0.5 0 −0.5 −1.0 −1.5 Time (5ns/div) Figure 5. 100 LARGE-SIGNAL PULSE RESPONSE 150 −100 10 Frequency (Hz) SMALL-SIGNAL PULSE RESPONSE Output Voltage (mV) 10M Frequency (Hz) G = +2V/V VIN = 1.25VPP fIN = 20MHz Time (5ns/div) Figure 6. 5 OPA860 www.ti.com SBOS331 – JUNE 2005 TYPICAL CHARACTERISTICS: VS = ±5V (continued) At TA = +25°C, IQ = 11.2mA, and RL = 500Ω, unless otherwise noted. (See Figure 53.) HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs OUTPUT RESISTANCE −55 −50 G = +2V/V R L = 500Ω VO = 2VPP See Figure 53 −65 −55 −70 Harmonic Distortion (dBc) Harmonic Distortion (dBc) −60 2nd−Harmonic −75 −80 3rd−Harmonic −85 −65 3rd−Harmonic −70 −75 G = +2V/V VO = 2VPP f = 5MHz See Figure 53 −80 −90 0.1 1 10 −85 100 20 1k Frequency (MHz) Output Resistance (Ω) Figure 7. Figure 8. HARMONIC DISTORTION vs OUTPUT VOLTAGE HARMONIC DISTORTION vs SUPPLY VOLTAGE −65 −60 −75 Harmonic Distortion (dBc) G = +2V/V RL = 500Ω f = 5MHz See Figure 53 −70 Harmonic Distortion (dBc) 2nd−Harmonic −60 −80 2nd−Harmonic −85 3rd−Harmonic −90 −95 −100 G = +2V/V RL = 500Ω VO = 2VPP f = 5MHz See Figure 53 −65 −70 3rd−Harmonic −75 −80 2nd−Harmonic −85 −90 0.1 1 10 2.0 2.5 3.0 3.5 Figure 9. −55 12 −60 2nd−Harmonic −70 −80 −85 −90 G = +2V/V RL = 500Ω VO = 2VPP f = 5MHz See Figure 53 5.5 6.0 3rd−Harmonic 11 10 9 8 +IQ 7 6 −IQ 5 8.0 8.5 9.0 9.5 10.0 10.5 IQ (mA) Figure 11. 6 5.0 QUIESCENT CURRENT vs RADJ 13 Quiescent Current (mA) Harmonic Distortion (dBc) HARMONIC DISTORTION vs QUIESCENT CURRENT −75 4.5 Figure 10. −50 −65 4.0 ±Supply Voltage (±VS) Output Voltage (VPP) 11.0 11.5 12.0 0.1 1 10 100 RADJ (Ω) Figure 12. 1k 10k 100k OPA860 www.ti.com SBOS331 – JUNE 2005 TYPICAL CHARACTERISTICS: VS = ±5V At TA = +25°C, IQ = 11.2mA, and RL = 500Ω, unless otherwise noted. OTA Performance OTA TRANSCONDUCTANCE vs FREQUENCY 1000 OTA TRANSCONDUCTANCE vs QUIESCENT CURRENT 150 IQ = 12.5mA (117mA/V) VIN = 100mVPP Transconductance (mA/V) Transconductance (mA/V) IQ = 11.2mA (102mA/V) IQ = 9mA (79mA/V) 100 IQ = 7.5mA (51mA/V) IO U T VIN 50Ω 120 90 IOUT 60 VIN 50Ω RL = 50Ω VIN = 10mVPP 50Ω 10 0 1M 10M 100M 1G 6 7 Frequency (Hz) 140 6 IQ = 12mA 100 IQ = 9mA 80 60 IQ = 7mA 40 Small signal around input voltage. −40 −30 −20 −10 0 20 30 IQ = 11.2mA 2 IQ = 9mA 0 I Q = 7mA −2 IOUT VIN −4 50Ω 50Ω −70 −60 −50 −40 −30 −20 −10 40 10 20 30 OTA Input Voltage (mV) Figure 15. Figure 16. 40 50 60 70 OTA LARGE-SIGNAL PULSE RESPONSE 3 0.2 0 G = +5V/V RL = 500Ω VIN = 0.25VPP fIN = 20MHz See Figure 48 Time (10ns/div) Figure 17. Output Voltage (V) 2 0.4 −0.8 0 Input Voltage (mV) 0.6 −0.6 13 4 OTA SMALL-SIGNAL PULSE RESPONSE −0.4 12 −8 10 0.8 −0.2 11 I Q = 12mA −6 20 Output Voltage (V) 10 OTA TRANSFER CHARACTERISTICS 8 OTA Output Current (mA) Transconductance (mA/V) OTA TRANSCONDUCTANCE vs INPUT VOLTAGE IQ = 11.2mA 9 Figure 14. 160 120 8 Quiescent Current (mA) Figure 13. 0 50Ω 30 1 0 −1 −2 −3 G = +5V/V RL = 500Ω VIN = 1VPP fIN = 20MHz See Figure 48 Time (10ns/div) Figure 18. 7 OPA860 www.ti.com SBOS331 – JUNE 2005 TYPICAL CHARACTERISTICS: VS = ±5V (continued) At TA = +25°C, IQ = 11.2mA, and RL = 500Ω, unless otherwise noted. C-OUTPUT RESISTANCE vs QUIESCENT CURRENT 120 490 110 OTA C−Output Resistance (kΩ ) OTA B−Input Resistance (kΩ ) B-INPUT RESISTANCE vs QUIESCENT CURRENT 500 480 470 460 450 440 100 430 80 70 60 50 40 7 8 9 10 11 12 13 7 8 9 11 Quiescent Current (mA) Figure 19. Figure 20. E-OUTPUT RESISTANCE vs QUIESCENT CURRENT 12 13 INPUT VOLTAGE AND CURRENT NOISE DENSITY Input Voltage Noise Density (nV/√Hz) Input Current Noise Density (pA/√Hz) 100 50 40 30 20 10 0 E−Input Current Noise (5.2pA/√Hz) 10 B−Input Voltage Noise (2.4nV/√Hz) B−Input Current Noise (1.65pA/√Hz) 1 7 8 9 10 11 12 13 100 1k Quiescent Current (mA) 100k Figure 22. 1MHz OTA VOLTAGE AND CURRENT NOISE DENSITY vs QUIESCENT CURRENT ADJUST RESISTOR 16 Input Voltage Noise Density (nV/√Hz) Input Current Noise Density (pA/√Hz) 10k Frequency (Hz) Figure 21. E−Input Current Noise (pA/√Hz) 14 12 10 8 B−Input Voltage Noise (nV/√Hz) 6 B−Input Current Noise (pA/√Hz) 4 2 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Quiescent Current Adjust Resistor (Ω ) Figure 23. 8 10 Quiescent Current (mA) 60 OTA E−Output Resistance (Ω ) 90 1M 10M OPA860 www.ti.com SBOS331 – JUNE 2005 TYPICAL CHARACTERISTICS: VS = ±5V At TA = +25°C, IQ = 11.2mA, and RL = 500Ω, unless otherwise noted. BUF Performance BUFFER BANDWIDTH vs OUTPUT VOLTAGE BUFFER BANDWIDTH vs LOAD RESISTANCE 6 6 RL = 500Ω 3 Gain (dB) 3 Gain (dB) RL = 1kΩ VO = 0.2VPP VO = 0.6VPP 0 VO = 5VPP −3 VO = 2.8VPP −3 RL = 500Ω VO = 1.4VPP −6 0 −6 VO = 0.2VPP RL = 100Ω −9 −9 1M 10M 100M 1G 2G 1M 100M Frequency (Hz) Figure 24. Figure 25. BUFFER GAIN FLATNESS 1G 2G BUFFER SMALL-SIGNAL PULSE RESPONSE 0.5 0.20 0.4 0.15 Output Voltage (V) 0.3 0.2 Gain (dB) 10M Frequency (Hz) 0.1 0 −0.1 −0.2 −0.3 RL = 500Ω VIN = 0.2VPP fIN = 20MHz 0.10 Output Voltage Input Voltage 0.05 0 −0.05 −0.10 −0.15 −0.4 −0.20 −0.5 1 10 100 400 Time (10ns/div) Frequency (MHz) Figure 26. Figure 27. BUFFER LARGE-SIGNAL PULSE RESPONSE Output Voltage (V) 2 1 0 HARMONIC DISTORTION vs FREQUENCY −40 RL = 500Ω VIN = 3VPP fIN = 20MHz Input Voltage Output Voltage −1 −2 Harmonic Distortion (dBc) 3 RL = 500Ω VO = 2VPP −50 2nd−Harmonic −60 −70 −80 3rd−Harmonic −90 −100 −3 Time (10ns/div) 1 10 100 Frequency (MHz) Figure 28. Figure 29. 9 OPA860 www.ti.com SBOS331 – JUNE 2005 TYPICAL CHARACTERISTICS: VS = ±5V (continued) At TA = +25°C, IQ = 11.2mA, and RL = 500Ω, unless otherwise noted. 5MHz HARMONIC DISTORTION vs LOAD RESISTANCE Harmonic Distortion (dBc) −50 HARMONIC DISTORTION vs OUTPUT VOLTAGE −60 R L = 500Ω VO = 2VPP −60 Harmonic Distortion (dBc) −40 2nd−Harmonic −70 −80 3rd−Harmonic −90 −100 100 RL = 500Ω f = 5MHz 2nd−Harmonic −70 −80 −90 3rd−Harmonic −100 −110 1k 0.5 1.0 1.5 2.0 Figure 30. 5MHz HARMONIC DISTORTION vs SUPPLY VOLTAGE 4.0 4.5 5.0 BUFFER TRANSFER FUNCTION RL = 500Ω VO = 2VPP 4 2nd−Harmonic −70 3 Output Voltage (V) Harmonic Distortion (dBc) 3.5 5 −65 −75 −80 −85 3rd−Harmonic −90 2 1 0 −1 −2 −3 −95 −4 −100 −5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 −5 −4 −3 ±Supply Voltage (±VS) −2 −1 0 1 2 3 4 5 Input Voltage (V) Figure 32. Figure 33. INPUT VOLTAGE AND CURRENT NOISE DENSITY BUFFER OUTPUT IMPEDANCE 100 Output Impedance (Ω ) 100 Input Voltage Noise Density (nV/√Hz) Input Current Noise Density (pA/√Hz) 3.0 Figure 31. −60 10 Input Current Noise (2.1pA/√Hz) 10 Input Voltage Noise (4.8nV/√Hz) 1 1 100 1k 10k 100k Frequency (Hz) Figure 34. 10 2.5 Output Voltage (VPP) Load Resistance (Ω ) 1M 10M 10k 100k 1M 10M Frequency (Hz) Figure 35. 100M 1G OPA860 www.ti.com SBOS331 – JUNE 2005 TYPICAL CHARACTERISTICS: VS = ±5V (continued) At TA = +25°C, IQ = 11.2mA, and RL = 500Ω, unless otherwise noted. BUFFER GROUP DELAY TIME vs FREQUENCY BUFFER OUTPUT VOLTAGE AND CURRENT LIMITATIONS 1.2 5 3 0.8 Output Voltage (V) 0.6 0.4 0.2 100Ω Load Line 2 25Ω Load Line 1 50Ω Load Line 0 −1 −2 −3 250 100 50 0 −50 Frequency (MHz) −100 700 800 900 1000 −150 400 500 600 −250 100 200 300 −300 −5 0 200 −0.2 300 1W Internal Power Limit −4 150 0 −200 Group Delay Time (ns) 1W Internal Power Limit 4 1.0 Output Current (mA) Figure 36. Figure 37. POWER-SUPPLY REJECTION RATIO vs FREQUENCY 50 15 45 14 40 13 35 PSRR (dB) Quiescent Current (mA) QUIESCENT CURRENT vs TEMPERATURE 16 12 11 10 30 25 20 9 15 8 10 7 5 6 −40 −20 +PSRR −PSRR 0 0 20 40 60 80 100 120 10k 100k Ambient Temperature ( C) 1M 10M 100M Frequency (Hz) Figure 38. Figure 39. VOLTAGE RANGE vs TEMPERATURE OUTPUT CURRENT vs TEMPERATURE 4.10 56.0 55.6 4.05 Output Current (mA) ±Output Voltage Swing (V) 55.8 +VO 4.00 −VO 3.95 55.4 55.2 Output Current Sinking, Sourcing 55.0 54.8 54.6 54.4 54.2 3.90 −40 −20 0 20 40 60 80 100 120 54.0 −40 −20 0 20 40 60 Ambient Temperature ( C) Temperature ( C) Figure 40. Figure 41. 80 100 120 11 OPA860 www.ti.com SBOS331 – JUNE 2005 TYPICAL CHARACTERISTICS: VS = ±5V (continued) At TA = +25°C, IQ = 11.2mA, and RL = 500Ω, unless otherwise noted. DC DRIFT vs TEMPERATURE C-OUTPUT BIAS CURRENT vs TEMPERATURE 6 5 20 4 Buffer Input Offset Voltage (VOS) 15 3 Buffer Input Bias Current (IB) 10 2 5 1 0 −40 −20 0 0 20 40 60 80 Ambient Temperature ( C) Figure 42. 12 100 120 OTA C−Output Bias Current (µA) 25 40 Input Bias Current (µA) Input Offset Voltage (mV) 30 Five Representative Units 30 20 10 0 −10 −20 −30 −40 −40 −20 0 20 40 60 80 Ambient Temperature ( C) Figure 43. 100 120 OPA860 www.ti.com SBOS331 – JUNE 2005 APPLICATION INFORMATION The OPA860 combines a high-performance buffer with a transconductance section. This transconductance section is discussed in the OTA (Operational Transconductance Amplifier) section of this data sheet. Over the years and depending on the writer, the OTA section of an op amp has been referred to as a Diamond Transistor, Voltage-Controlled Current source, Transconductor, Macro Transistor, or positive second-generation current conveyor (CCII+). Corresponding symbols for these terms are shown in Figure 44. 3 1 C VIN1 IOUT E VIN2 Diamond Transistor Voltage−Controlled Current Source Transconductor Macro Transistor Current Conveyor II+ C VIN1 VIN2 Z CCII+ I OUT The buffer section of the OPA860 is an 1600MHz, 4000V/µs closed-loop buffer that can be used as a building block for AGC amplifiers, LED driver circuit, integrator for fast pulse, fast control loop amplifiers, and control amplifiers for capacitive sensors and active filters. The Buffer section does not share the bias circuit of the OTA section; thus, it is not affected by changes in the IQ adjust resistor (RADJ). TRANSCONDUCTANCE (OTA) SECTION—AN OVERVIEW B 2 BUFFER SECTION—AN OVERVIEW B E Figure 44. Symbols and Terms Regardless of its depiction, the OTA section has a high-input impedance (B input), a low-input/output impedance (E input), and a high impedance current source output (C output). The symbol for the OTA section is similar to a transistor (see Figure 44). Applications circuits for the OTA look and operate much like transistor circuits—the transistor is also a voltage-controlled current source. Not only does this characteristic simplify the understanding of application circuits, it aids the circuit optimization process as well. Many of the same intuitive techniques used with transistor designs apply to OTA circuits. The three terminals of the OTA are labeled B, E, and C. This labeling calls attention to its similarity to a transistor, yet draws distinction for clarity. While the OTA is similar to a transistor, one essential difference is the sense of the C-output current: it flows out the C terminal for positive B-to-E input voltage and in the C terminal for negative B-to-E input voltage. The OTA offers many advantages over a discrete transistor. The OTA is self-biased, simplifying the design process and reducing component count. In addition, the OTA is far more linear than a transistor. Transconductance of the OTA is constant over a wide range of collector currents—this feature implies a fundamental improvement of linearity. 13 OPA860 www.ti.com SBOS331 – JUNE 2005 BASIC CONNECTIONS Figure 46 shows basic connections required for operation. These connections are not shown in subsequent circuit diagrams. Power-supply bypass capacitors should be located as close as possible to the device pins. Solid tantalum capacitors are generally best. It is also possible to vary the quiescent current with a control signal. The control loop in Figure 45 shows 1/2 of a REF200 current source used to develop 100mV on R1. The loop forces 125mV to appear on R2. Total quiescent current of the OPA860 is approximately 37 × I1, where I1 is the current made to flow out of pin 1. QUIESCENT CURRENT CONTROL PIN V+ The quiescent current of the transconductance portion of the OPA860 is set with a resistor, RADJ, connected from pin 1 to –VS. It affects only the operating currents of OTA sections. The bias circuitry of the Buffer section is independent of the bias circuitry for the OTA section; therefore, the quiescent current cannot go below 5.8mA. The maximum quiescent current is 12.7mA. RADJ should be set between 50Ω and 1kΩ for optimal performance of the OTA section. This range corresponds to the 12.5mA quiescent current for RADJ = 50Ω, and 9mA for RADJ = 1kΩ. If the IQ adjust pin is connected to the negative supply, the quiescent current will be set by the 250Ω internal resistor. Reducing or increasing the quiescent current for the OTA section controls the bandwidth and AC behavior as well as the transconductance. With RADJ = 250Ω, this sets approximately 11.2mA total quiescent current at 25°C. It may be appropriate in some applications to trim this resistor to achieve the desired quiescent current or AC performance. Applications circuits generally do not show the resistor RQ, but it is required for proper operation. With a fixed RADJ resistor, quiescent current increases with temperature (see Figure 43 in the Typical Characteristics section). This variation of current with temperature holds the transconductance, gm, of the OTA relatively constant with temperature (another advantage over a transistor). 14 OPA860 1/2 REF200 100µA R1 1.25kΩ IQ Adjust 1 I1 R2 425Ω TLV2262 Figure 45. Optional Control Loop for Setting Quiescent Current OPA860 www.ti.com SBOS331 – JUNE 2005 RQ = 250Ω, roughly sets IQ = 11.2mA. RS (25Ωto 200Ω) RADJ 250Ω +5V(1) 1 8 2 7 + +1 3 −VS −5V(1) 0.1µF +VS 2.2µF 6 Solid Tantalum 4 5 49.9Ω 0.1µF + VO RS (25Ωto 200Ω) 2.2µF VI Solid Tantalum 49.9Ω NOTE: (1) VS = ±6.5V absolute maximum. Figure 46. Basic Connections With this control loop, quiescent current will be nearly constant with temperature. Since this differs from the temperature-dependent behavior of the internal current source, other temperature-dependent behavior may differ from that shown in the Typical Characteristics. The circuit of Figure 45 will control the IQ of the OTA section of the OPA860 somewhat more accurately than with a fixed external resistor, RQ. Otherwise, there is no fundamental advantage to using this more complex biasing circuitry. It does, however, demonstrate the possibility of signal-controlled quiescent current. This capability may suggest other possibilities such as AGC, dynamic control of AC behavior, or VCO. BASIC APPLICATIONS CIRCUITS Most applications circuits for the OTA section consist of a few basic types, which are best understood by analogy to a transistor. Used in voltage-mode, the OTA section can operate in three basic operating states—common emitter, common base, and common collector. In the current-mode, the OTA can be useful for analog computation such as current amplifier, current differentiator, current integrator, and current summer. Common-E Amplifier or Forward Amplifier Figure 47 compares the common-emitter configuration for a BJT with the common-E amplifier for the OTA section. There are several advantages in using the OTA section in place of a BJT in this configuration. Notably, the OTA does not require any biasing, and the transconductance gain remains constant over temperature. The output offset voltage is close to 0, compared with several volts for the common-emitter amplifier. The gain is set in a similar manner as for the BJT equivalent with Equation 1: R G 1 L gm R E (1) Just as transistor circuits often use emitter degeneration, OTA circuits may also use degeneration. This option can be used to reduce the effects that offset voltage and offset current might otherwise have on the DC operating point of the OTA. The E-degeneration resistor may be bypassed with a large capacitor to maintain high AC gain. Other circumstances may suggest a smaller value capacitor used to extend or optimize high-frequency performance. 15 OPA860 www.ti.com SBOS331 – JUNE 2005 The forward amplifier shown in Figure 48 and Figure 49 corresponds to one of the basic circuits used to characterize the OPA860. Extended characterization of this topology appears in the Typical Characteristics section of this datasheet. V+ RS RL VO VO VI R1 160Ω Inverting Gain VOS = Several Volts RS VI 8 C 3 B RC 500Ω OTA RE E 2 G = 5V/V IQ = 11.2mA RE 78Ω V− (a) Common−Emitter Amplifier Transconductance varies over temperature. 100Ω VI 8 C 3 B Figure 48. Forward Amplifier Configuration and Test Circuit VO OTA RL E 2 RL1 RE VO Noninverting Gain VOS = 0V 3 (b) Common−E Amplifier Transconductance remains constant over temperature. RIN 50Ω OTA R1 100Ω RL2 rE 2 VI RL = RL1 + RL2 || RIN RE Figure 47. Common-Emitter vs Common-E Amplifier The transconductance of the OTA with degeneration can be calculated by Equation 2: g m_deg 1 1 gm R E (2) A positive voltage at the B-input, pin 3, causes a positive current to flow out of the C-input, pin 8. Figure 47b shows an amplifier connection of the OTA, the equivalent of a common-emitter transistor amplifier. Input and output can be ground-referenced without any biasing. The amplifier is non-inverting because of the sense of the output current. 16 Network Analyzer 8 G RL r E g1 m RE rE At I Q 11.2mA G rE 1 8 125mAV RL at I Q 11.2mA R E 8 Figure 49. Forward Amplifier Design Equations OPA860 www.ti.com SBOS331 – JUNE 2005 Common-C Amplifier Figure 50b shows the OTA connected as an E-follower—a voltage buffer. It is interesting to notice that the larger the RE resistor, the closer to unity gain the buffer will be. If the OTA section is to be used as a buffer, use RE ≥ 500Ω for best results. For the OTA section used as a buffer, the gain is given by Equation 3: 1 G 1 1 1 g R m (3) E V+ G=1 VOS = 0.7V G RL R L 1 RE R E gm This low impedance can be converted to a high impedance by inserting the buffer amplifier in series. Current-Mode Analog Computations As mentioned earlier, the OTA section of the OPA860 can be used advantageously for analog computation. Among the application possibilities are functionality as a current amplifier, current differentiator, current integrator, current summer, and weighted current summer. Table 1 lists these different uses with the associated transfer functions. These functions can easily be combined to form active filters. Some examples using these current-mode functions are shown later in this document. VI VO RE OPA860 APPLICATIONS V− (a) Common−Collector Amplifier (Emitter Follower) G 1 1g 1 1 mR E The OPA860 is comprised of both the OTA section and the Buffer section. This applications information focuses more on using both sections together to form various useful amplifiers. A more thorough description of the OTA section in filter applications can be found in the OPA861 datasheet, available for download at www.ti.com. R O g1 m 100Ω VI V+ 8 C 3 B RE (4) OTA VO G=1 VO = 0V RL E 2 Noninverting Gain VOS = Several Volts VO RE (b) Common−C Amplifier (Buffer) V− (a) Common−Base Amplifier Figure 50. Common-Collector vs Common-C Amplifier A low value resistor in series with the B OTA and buffer inputs is recommended. This resistor helps isolate trace parasitic from the inputs, reduces any tendency to oscillate, and controls frequency response peaking. Typical resistor values are from 25Ω to 200Ω. G 100Ω 8 C 3 B VO OTA E 2 Inverting Gain VOS = 0V RL RE Common-B Amplifier Figure 51 shows the Common-B amplifier. This configuration produces an inverting gain and a low impedance input. Equation 4 shows the gain for this configuration. RL R L RE R E g1m V− (b) Common−B Amplifier Figure 51. Common-Base Transistor vs Common-B OTA 17 OPA860 www.ti.com SBOS331 – JUNE 2005 Direct Feedback Amplifier The gain for this topology is given by Equation 5: R3 The direct feedback amplifier (shown in Figure 53) topology has been used to characterize the OPA860. Extended characterization of this topology appears in the Typical Characteristics section of this data sheet. This topology is obtained by closing the loop between the C-output and the E-input of the common-E topology, and then buffered. G 2 R5 R5 1 2g m 1 R3 2R5 (5) Table 1. Current-Mode Analog Computation Using the OTA Section FUNCTIONAL ELEMENT TRANSFER FUNCTION Current Amplifier R I OUT 1 I IN R2 IMPLEMENTATION WITH THE OTA SECTION IOUT IIN R1 R2 IOUT 1 I OUT Current Integrator CR IIN I dt C IN R IOUT n I OUT I j j1 Current Summer I1 I2 In I OUT n I OUT I RR j j j1 Weighted Current Summer R R1 I1 18 R Rn In OPA860 www.ti.com SBOS331 – JUNE 2005 Current-Feedback Amplifier portional) behavior versus frequency. The control loop amplifiers show an integrator behavior from DC to the frequency, represented by the RC time constant of the network from the C-output to GND. Above this frequency, they operate as an amp with constant gain. The series connection increases the overall gain to about 110dB and thus minimizes the control loop deviation. The differential configuration at the inputs enables one to apply the measured output signal and the reference voltage to two identical high-impedance inputs. The output buffer decouples the C-output of the second OTA in order to insure the AC performance and to drive subsequent output stages. Building a current-feedback amplifier with the OPA860 is extremely simple. One advantage of building a current-feedback amplifier with the OPA860 instead of getting an off-the-shelf current-feedback amplifier is the control gained on the bandwidth though the use of external capacitors. Figure 54 shows a typical circuit for the OPA860 in a noninverting current-feedback amplifier configuration. Input and output parasitic capacitances are shown. R1 is the output impedance of the C-output of the OTA section. C1 is the output parasitic capacitance on the C-output pin of the OTA-section. C2 is the input parasitic capacitance for the input of the Buffer section. As shown in Equation 6, the poles formed by R1, C1, R2, and C2 control the frequency response. The frequency response in this configuration is shown in Figure 52. Setting an external capacitor on the C-output to ground allows adjusting the bandwidth. 1R RF 1 1R G 1 g mR 1 6 3 Gain (dB) V OUT V IN RF 9 G [1 s(R 1C1 R1C 2 R 2C 2) s R1C 1C 2] 2 0 −3 (6) −6 Note that both peaking and bandwidth can be adjusted by changing the feedback resistance, RF. −9 −12 Control-Loop Amplifier 1M R1 100Ω VI 7 3 B 50Ω 8 C OTA 1 4 RQ 250Ω 100M 1G Figure 52. Current-Feedback Architecture Frequency Response R2 80.6Ω +5V 10M Frequency (Hz) A new type of control loop amplifier for fast and precise control circuits can be designed with the OPA860. The circuit of Figure 55 shows a series connection of two voltage control current sources that have an integral (and at higher frequencies, a pro- 50Ω Source G = +2V/V RL = 500Ω VO = 2VPP R3 301Ω E 2 5 +1 6 VO R4 453Ω Network Analyzer RIN 50Ω G = +2V/V I Q = 20mA R5 133Ω −5V Figure 53. Direct Feedback Amplifier Specification and Test Circuit 19 OPA860 www.ti.com SBOS331 – JUNE 2005 OPA860 R2 50Ω VOUT +1 200Ω VIN C1 R1 C2 500Ω 50Ω rE RF 259Ω RG 249Ω Figure 54. OPA860 Used in a Noninverting Current-Feedback Architecture 8 5 6 +1 3 8 180Ω 2 10pF VREF 10pF 3 2 10Ω 180Ω VIN 5 33Ω 10Ω 33Ω 6 +1 Figure 55. Control-Loop Amplifier Using Two OPA860s 20 VOUT OPA860 www.ti.com SBOS331 – JUNE 2005 DC-Restore Circuit Comparator The OPA860 can be used advantageously with an operational amplifier, here the OPA820, as a DC-restore circuit. Figure 56 illustrates this design. Depending on the collector current of the transconductance amplifier (OTA) of the OPA860, a switching function is realized with the diodes D1 and D2. An interesting and also cost-effective circuit solution using the OPA860 as a low-jitter comparator is shown in Figure 57. At the same time, this circuit uses a positive and negative feedback. The input is connected to the inverting E-input. The output signal is applied in a direct feedback over the two antiparallel, connected gallium-arsenide diodes back to the emitter. A second feedback path over the RC combination to the base, which is a positive feedback, accelerates the output voltage change when the input voltage crosses the threshold voltage. The output voltage is limited to the threshold voltage of the back-to-back diodes. When the C-output is sourcing current, the capacitor C1 is being charged. When the C-output is sinking current, D1 is turned off and D2 is turned on, letting the voltage across C1 be discharged through R2. The condition to charge C1 is set by the voltage difference between VREF and VOUT. For the OTA C-output to source current, VREF has to be greater than VOUT. The rate of charge of C1 is set by both R1 and C1. The discharge rate is given by R2 and C1. 150Ω VIN 5 +1 6 C1 100pF 20Ω D1 D 1, D2 = 1N4148 RQ = 1kΩ OPA656 R2 100kΩ VOUT 20Ω D2 CCII 8 C The OTA amplifier works as a current conveyor (CCII) in this circuit, with a current gain of 1. R1 and C1 set the DC restoration time constant. D1 adds a propogation delay to the DC restoration. R2 and C1 set the decay time constant. E 2 R1 40.2Ω B 3 R2 100Ω VREF Figure 56. DC Restorer Circuit 21 OPA860 www.ti.com SBOS331 – JUNE 2005 C3 2.2pF Offset Trim 0.5pF …2.5pF +5V R5 47kΩ R2 10kΩ R8 27kΩ +5V −5V R1 100kΩ RC5 150Ω VIN 5 +1 R2 100kΩ 6 RC5 150Ω 3 2 +5V C3 2.2µF RC5 150Ω 7 OTA 8 RS 47Ω 1 4 1 VOUT BUF602 5 4 RQ 250Ω C3 2.2µF C3 2.2µF C3 2.2µF −5V −5V D1 D2 DMF3068A Figure 57. Comparator (Low Jitter) T Integrator for ns Pulse One very interesting application using the OPA860 in physical measurement technology is an open-loop ns-integrator (shown in Figure 58) which can process pulses with an amplitude of ±2.5V, have a rise/fall time of as little as 2ns, and also have a pulse width of more than 8ns. The voltage-controlled current source charges the integration capacitor linearly according to Equation 7: V C VBE gm t C (7) Where: • VC = Voltage At Pin 8 • VBE = Base-Emitter Voltage • gm = Transconductance • t = Time • C = Integration Capacitance gm VO C V BE dt (8) O Where: • VO = Output Voltage • T = Integration Time • C = Integration Capacitance 200Ω 780Ω VI 8 C 3 B The output voltage is the time integral of the input voltage. It can be calculated from Equation 8: 27pF 620Ω 820Ω 1µF 50Ω +5V +1 OTA E 2 50Ω 5 −5V Figure 58. Integrator for ns-Pulses 22 6 VO OPA860 www.ti.com SBOS331 – JUNE 2005 Video Luminance Matrix The inverting amplifier in Figure 59 amplifies the three input voltages that correspond to the luminance section of the RGB color signal. Different feedback resistances weight the voltages differently, resulting in an output voltage consisting of 30% of the red, 59% of the green, and 11% of the blue section of the input voltage. The way in which the signal is weighted corresponds to the transformation equation for converting RGB pictures into B/W pictures. The output signal is the black/white replay. It might drive a monochrome control monitor or an analog printer (hardcopy output). VIN VOUT Figure 60. State Variable Filter Block Diagram C 200Ω 150Ω 5 +1 6 E C VLUMINANCE 8 C 3 B OTA VBLUE R2 x1 R3 665Ω(1) 200Ω RV 1820Ω(1) C1 E x1 VRED VGREEN C1 B E 2 340Ω(1) B RQ = 250Ω (IQ = 11.2mA) NOTE: (1) Resistors shown are 1% values that produce 30%/59%/11% R/G/B mix. R1 VIN VOUT Figure 61. State Variable Filter Using the OPA860 The transfer function is then: Figure 59. Video Luminance Matrix H(s) a0 R 1 s 2 C 1s C 0 R V 1 sC R3 1 s 2C 1C 2R 1R 2 (9) State-Variable Filters The ability of the OPA860 to easily drive a capacitor can be put to good use in implementing state-variable filters. A state-variable filter, or KHN filter, can be represented with integrators and coefficients. For example, the filter represented in the block diagram of Figure 60 can easily be implemented with two OPA860s, as shown in Figure 61. R 1R 2 2 0 Q 1 C1C 2R 1R2 C1 R3 C 2 R 1R2 (10) (11) 23 OPA860 www.ti.com SBOS331 – JUNE 2005 DESIGN-IN TOOLS DEMONSTRATION BOARDS A printed circuit board (PCB) is available to assist in the initial evaluation of circuit performance using the OPA860. This module is available free, as an unpopulated PCB delivered with descriptive documentation. The summary information for the board is shown below: PRODUCT PACKAGE BOARD PART NUMBER OPA860ID SO-8 DEM-OPA86xD LITERATURE REQUEST NUMBER SBOU035 The total output spot noise voltage can be computed as the square root of the sum of all squared output noise voltage contributors. Equation 12 shows the general form for the output noise voltage using the terms shown in Figure 62. eO 2 e RSi bn 4kTR S 2 n RL RG g1m 2 2 R R Gibi 4kTR G 1L gm (12) For the buffer, the noise model is shown in Figure 63. Equation 13 shows the general form for the output noise voltage using the terms shown in Figure 63. The board can be requested on Texas Instruments web site (www.ti.com). en VO MACROMODELS AND APPLICATIONS SUPPORT RS Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of analog circuits and systems. This principle is particularly true for Video and RF amplifier circuits where parasitic capacitance and inductance can have a major effect on circuit performance. A SPICE model for the OPA860 is available through the Texas Instruments web page (www.ti.com). These models do a good job of predicting small-signal AC and transient performance under a wide variety of operating conditions. They do not do as well in predicting the harmonic distortion. These models do not attempt to distinguish between the package types in their small-signal AC performance. NOISE PERFORMANCE The OTA noise model consists of three elements: a voltage noise on the B-input; a current noise on the B-input; and a current noise on the E-input. Figure 62 shows the OTA noise analysis model with all the noise terms included. In this model, all noise terms are taken to be noise voltage or current density terms in either nV/√Hz or pA/√Hz. en VO RL RS √4kTRS ibn RG ibi √4kTRS Figure 62. OTA Noise Analysis Model 24 in √4kTRS Figure 63. Buffer Noise Analysis Model eO e 2 n 2 inR S 4kTR S (13) THERMAL ANALYSIS Due to the high output power capability of the OPA860, heatsinking or forced airflow may be required under extreme operating conditions. Maximum desired junction temperature will set the maximum allowed internal power dissipation as described below. In no case should the maximum junction temperature be allowed to exceed 150°C. Operating junction temperature (TJ) is given by TA + PD ×θJA. The total internal power dissipation (PD) is the sum of quiescent power (PDQ) and additional power dissipated in the output stage (PDL) to deliver load power. Quiescent power is simply the specified no-load supply current times the total supply voltage across the part. PDL will depend on the required output signal and load but would, for a grounded resistive load, be at a maximum when the output is fixed at a voltage equal to 1/2 of either supply voltage (for equal bipolar supplies). Under this condition, PDL = VS2/(4 × RL) where RL includes feedback network loading. Note that it is the power in the output stage and not into the load that determines internal power dissipation. OPA860 www.ti.com SBOS331 – JUNE 2005 As a worst-case example, compute the maximum TJ using an OPA860ID in the circuit of Figure 53 operating at the maximum specified ambient temperature of +85°C and driving a grounded 20Ω load. PD = 10V × 11.2mA + 52/(4 × 20Ω) = 424mW Maximum TJ = +85°C + (0.43W × 125°C/W) = 139°C. Although this is still well below the specified maximum junction temperature, system reliability considerations may require lower tested junction temperatures. The highest possible internal dissipation will occur if the load requires current to be forced into the output for positive output voltages or sourced from the output for negative output voltages. This puts a high current through a large internal voltage drop in the output transistors. The output V-I plot shown in the Typical Characteristics include a boundary for 1W maximum internal power dissipation under these conditions. BOARD LAYOUT GUIDELINES Achieving optimum performance with a high-frequency amplifier like the OPA860 requires careful attention to board layout parasitics and external component types. Recommendations that will optimize performance include: a) Minimize parasitic capacitance to any AC ground for all of the signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability: on the noninverting input, it can react with the source impedance to cause unintentional bandlimiting. To reduce unwanted capacitance, a window around the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise, ground and power planes should be unbroken elsewhere on the board. b) Minimize the distance (< 0.25") from the power-supply pins to high-frequency 0.1µF decoupling capacitors. At the device pins, the ground and power-plane layout should not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections should always be decoupled with these capacitors. An optional supply decoupling capacitor (0.1µF) across the two power supplies (for bipolar operation) will improve 2nd-harmonic distortion performance. Larger (2.2µF to 6.8µF) decoupling capacitors, effective at lower frequency, should also be used on the main supply pins. These may be placed somewhat farther from the device and may be shared among several devices in the same area of the PC board. c) Careful selection and placement of external components will preserve the high-frequency performance of the OPA860. Resistors should be a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal film or carbon composition, axially-leaded resistors can also provide good high-frequency performance. Again, keep their leads and PC board traces as short as possible. Never use wirewound type resistors in a high-frequency application. d) Connections to other wideband devices on the board may be made with short, direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50mils to 100mils) should be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and set RS from the plot of Recommended RS vs Capacitive Load. Low parasitic capacitive loads (< 5pF) may not need an RS since the OPA860 is nominally compensated to operate with a 2pF parasitic load. Higher parasitic capacitive loads without an RS are allowed as the signal gain increases (increasing the unloaded phase margin). If a long trace is required, and the 6dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched impedance transmission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50Ω environment is normally not necessary on board, and in fact, a higher impedance environment will improve distortion as shown in the distortion versus load plots. e) Socketing a high-speed part like the OPA860 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network that makes it almost impossible to achieve a smooth, stable frequency response. Best results are obtained by soldering the OPA860 onto the board. 25 OPA860 www.ti.com SBOS331 – JUNE 2005 INPUT AND ESD PROTECTION The OPA860 is built using a very high-speed complementary bipolar process. The internal junction breakdown voltages are relatively low for these very small geometry devices. These breakdowns are reflected in the Absolute Maximum Ratings table. All device pins are protected with internal ESD protection diodes to the power supplies as shown in Figure 64. +VCC External Pin Internal Circuitry −VCC Figure 64. Internal ESD Protection 26 These diodes provide moderate protection to input overdrive voltages above the supplies as well. The protection diodes can typically support 30mA continuous current. Where higher currents are possible (for example, in systems with ±15V supply parts driving into the OPA860), current-limiting series resistors should be added into the two inputs. Keep these resistor values as low as possible since high values degrade both noise performance and frequency response. PACKAGE OPTION ADDENDUM www.ti.com 29-Jun-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty OPA860ID ACTIVE SOIC D 8 75 TBD Call TI Call TI OPA860IDR ACTIVE SOIC D 8 2500 TBD Call TI Call TI Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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